FEB_4202 15.07.25 10:24:48
Info
10:24:48:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:24:48:ST3_Shared:INFO: FEB-Microcable
10:24:48:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:24:48:febtest:INFO: Testing FEB with SN 4202
10:24:49:smx_tester:INFO: Scanning setup
10:24:49:elinks:INFO: Disabling clock on downlink 0
10:24:49:elinks:INFO: Disabling clock on downlink 1
10:24:49:elinks:INFO: Disabling clock on downlink 2
10:24:49:elinks:INFO: Disabling clock on downlink 3
10:24:49:elinks:INFO: Disabling clock on downlink 4
10:24:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:24:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:24:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:24:49:elinks:INFO: Disabling clock on downlink 0
10:24:49:elinks:INFO: Disabling clock on downlink 1
10:24:49:elinks:INFO: Disabling clock on downlink 2
10:24:49:elinks:INFO: Disabling clock on downlink 3
10:24:49:elinks:INFO: Disabling clock on downlink 4
10:24:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:24:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:24:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:24:50:elinks:INFO: Disabling clock on downlink 0
10:24:50:elinks:INFO: Disabling clock on downlink 1
10:24:50:elinks:INFO: Disabling clock on downlink 2
10:24:50:elinks:INFO: Disabling clock on downlink 3
10:24:50:elinks:INFO: Disabling clock on downlink 4
10:24:50:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:24:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:24:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:24:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:24:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:24:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:24:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:24:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:24:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:24:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:24:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:24:50:elinks:INFO: Disabling clock on downlink 0
10:24:50:elinks:INFO: Disabling clock on downlink 1
10:24:50:elinks:INFO: Disabling clock on downlink 2
10:24:50:elinks:INFO: Disabling clock on downlink 3
10:24:50:elinks:INFO: Disabling clock on downlink 4
10:24:50:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:24:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:24:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:24:50:elinks:INFO: Disabling clock on downlink 0
10:24:50:elinks:INFO: Disabling clock on downlink 1
10:24:50:elinks:INFO: Disabling clock on downlink 2
10:24:50:elinks:INFO: Disabling clock on downlink 3
10:24:50:elinks:INFO: Disabling clock on downlink 4
10:24:50:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:24:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:24:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:24:50:setup_element:INFO: Scanning clock phase
10:24:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:24:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:24:50:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:24:50:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXX____
Clock Delay: 32
10:24:50:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXX____
Clock Delay: 32
10:24:50:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:24:50:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:24:50:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:24:50:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXX___
Clock Delay: 34
10:24:50:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXX____
Clock Delay: 32
10:24:50:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXX____
Clock Delay: 32
10:24:50:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
10:24:50:setup_element:INFO: Scanning data phases
10:24:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:24:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:24:55:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:24:55:setup_element:INFO: Eye window for uplink 24: _______XXXXXX___________________________
Data delay found: 29
10:24:55:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
10:24:55:setup_element:INFO: Eye window for uplink 26: __________XXXXXXX_______________________
Data delay found: 33
10:24:55:setup_element:INFO: Eye window for uplink 27: _____________XXXXXX_____________________
Data delay found: 35
10:24:55:setup_element:INFO: Eye window for uplink 28: _______________XXXXXX___________________
Data delay found: 37
10:24:55:setup_element:INFO: Eye window for uplink 29: _______________XXXXX____________________
Data delay found: 37
10:24:55:setup_element:INFO: Eye window for uplink 30: ______________XXXXXX____________________
Data delay found: 36
10:24:55:setup_element:INFO: Eye window for uplink 31: ______________XXXX______________________
Data delay found: 35
10:24:55:setup_element:INFO: Setting the data phase to 29 for uplink 24
10:24:55:setup_element:INFO: Setting the data phase to 31 for uplink 25
10:24:55:setup_element:INFO: Setting the data phase to 33 for uplink 26
10:24:55:setup_element:INFO: Setting the data phase to 35 for uplink 27
10:24:55:setup_element:INFO: Setting the data phase to 37 for uplink 28
10:24:55:setup_element:INFO: Setting the data phase to 37 for uplink 29
10:24:55:setup_element:INFO: Setting the data phase to 36 for uplink 30
10:24:55:setup_element:INFO: Setting the data phase to 35 for uplink 31
10:24:55:setup_element:INFO: Beginning SMX ASICs map scan
10:24:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:24:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:24:55:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:24:55:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:24:55:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
10:24:56:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:24:56:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:24:56:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:24:56:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:24:56:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:24:56:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:24:57:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:24:57:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:24:58:setup_element:INFO: Performing Elink synchronization
10:24:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:24:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:24:58:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:24:58:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:24:58:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:24:58:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:24:58:febtest:INFO: Init all SMX (CSA): 30
10:25:06:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:25:06:febtest:INFO: 30-01 | XA-000-09-004-037-006-006-05 | 37.7 | 1165.6
10:25:06:febtest:INFO: 28-03 | XA-000-09-004-037-012-004-10 | 25.1 | 1206.9
10:25:06:febtest:INFO: 26-05 | XA-000-09-004-037-015-005-04 | 31.4 | 1183.3
10:25:06:febtest:INFO: 24-07 | XA-000-09-004-037-015-006-04 | 31.4 | 1177.4
10:25:07:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:25:09:ST3_smx:INFO: chip: 30-1 37.726682 C 1171.483840 mV
10:25:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:25:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:25:09:ST3_smx:INFO: Electrons
10:25:09:ST3_smx:INFO: # loops 0
10:25:11:ST3_smx:INFO: # loops 1
10:25:12:ST3_smx:INFO: # loops 2
10:25:14:ST3_smx:INFO: Total # of broken channels: 0
10:25:14:ST3_smx:INFO: List of broken channels: []
10:25:14:ST3_smx:INFO: Total # of broken channels: 0
10:25:14:ST3_smx:INFO: List of broken channels: []
10:25:16:ST3_smx:INFO: chip: 28-3 25.062742 C 1212.728715 mV
10:25:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:25:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:25:16:ST3_smx:INFO: Electrons
10:25:16:ST3_smx:INFO: # loops 0
10:25:17:ST3_smx:INFO: # loops 1
10:25:19:ST3_smx:INFO: # loops 2
10:25:20:ST3_smx:INFO: Total # of broken channels: 0
10:25:20:ST3_smx:INFO: List of broken channels: []
10:25:20:ST3_smx:INFO: Total # of broken channels: 0
10:25:20:ST3_smx:INFO: List of broken channels: []
10:25:22:ST3_smx:INFO: chip: 26-5 31.389742 C 1195.082160 mV
10:25:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:25:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:25:22:ST3_smx:INFO: Electrons
10:25:22:ST3_smx:INFO: # loops 0
10:25:23:ST3_smx:INFO: # loops 1
10:25:25:ST3_smx:INFO: # loops 2
10:25:26:ST3_smx:INFO: Total # of broken channels: 0
10:25:26:ST3_smx:INFO: List of broken channels: []
10:25:26:ST3_smx:INFO: Total # of broken channels: 0
10:25:26:ST3_smx:INFO: List of broken channels: []
10:25:28:ST3_smx:INFO: chip: 24-7 34.556970 C 1189.190035 mV
10:25:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:25:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:25:28:ST3_smx:INFO: Electrons
10:25:28:ST3_smx:INFO: # loops 0
10:25:30:ST3_smx:INFO: # loops 1
10:25:31:ST3_smx:INFO: # loops 2
10:25:33:ST3_smx:INFO: Total # of broken channels: 0
10:25:33:ST3_smx:INFO: List of broken channels: []
10:25:33:ST3_smx:INFO: Total # of broken channels: 0
10:25:33:ST3_smx:INFO: List of broken channels: []
10:25:33:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:25:33:febtest:INFO: 30-01 | XA-000-09-004-037-006-006-05 | 37.7 | 1195.1
10:25:33:febtest:INFO: 28-03 | XA-000-09-004-037-012-004-10 | 25.1 | 1242.0
10:25:34:febtest:INFO: 26-05 | XA-000-09-004-037-015-005-04 | 31.4 | 1212.7
10:25:34:febtest:INFO: 24-07 | XA-000-09-004-037-015-006-04 | 34.6 | 1206.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_07_15-10_24_48
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4202| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7972', '1.850', '1.3040']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0110', '1.850', '1.2900']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9909', '1.850', '0.2609']