FEB_4205 18.07.25 13:59:18
Info
13:59:18:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:59:18:ST3_Shared:INFO: FEB-Microcable
13:59:18:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:59:18:febtest:INFO: Testing FEB with SN 4205
13:59:20:smx_tester:INFO: Scanning setup
13:59:20:elinks:INFO: Disabling clock on downlink 0
13:59:20:elinks:INFO: Disabling clock on downlink 1
13:59:20:elinks:INFO: Disabling clock on downlink 2
13:59:20:elinks:INFO: Disabling clock on downlink 3
13:59:20:elinks:INFO: Disabling clock on downlink 4
13:59:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:59:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:59:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:59:20:elinks:INFO: Disabling clock on downlink 0
13:59:20:elinks:INFO: Disabling clock on downlink 1
13:59:20:elinks:INFO: Disabling clock on downlink 2
13:59:20:elinks:INFO: Disabling clock on downlink 3
13:59:20:elinks:INFO: Disabling clock on downlink 4
13:59:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:59:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:59:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:59:20:elinks:INFO: Disabling clock on downlink 0
13:59:20:elinks:INFO: Disabling clock on downlink 1
13:59:20:elinks:INFO: Disabling clock on downlink 2
13:59:20:elinks:INFO: Disabling clock on downlink 3
13:59:20:elinks:INFO: Disabling clock on downlink 4
13:59:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:59:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:59:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:59:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:59:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:59:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:59:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:59:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:59:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:59:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:59:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:59:20:elinks:INFO: Disabling clock on downlink 0
13:59:20:elinks:INFO: Disabling clock on downlink 1
13:59:20:elinks:INFO: Disabling clock on downlink 2
13:59:20:elinks:INFO: Disabling clock on downlink 3
13:59:20:elinks:INFO: Disabling clock on downlink 4
13:59:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:59:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:59:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:59:20:elinks:INFO: Disabling clock on downlink 0
13:59:20:elinks:INFO: Disabling clock on downlink 1
13:59:20:elinks:INFO: Disabling clock on downlink 2
13:59:20:elinks:INFO: Disabling clock on downlink 3
13:59:20:elinks:INFO: Disabling clock on downlink 4
13:59:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:59:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:59:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:59:20:setup_element:INFO: Scanning clock phase
13:59:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:59:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:59:21:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:59:21:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:59:21:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:59:21:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:59:21:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:59:21:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXX____
Clock Delay: 33
13:59:21:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXX____
Clock Delay: 33
13:59:21:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:59:21:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:59:21:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
13:59:21:setup_element:INFO: Scanning data phases
13:59:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:59:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:59:26:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:59:26:setup_element:INFO: Eye window for uplink 24: ________XXXXXX__________________________
Data delay found: 30
13:59:26:setup_element:INFO: Eye window for uplink 25: __________XXXXXX________________________
Data delay found: 32
13:59:26:setup_element:INFO: Eye window for uplink 26: __________XXXXXXX_______________________
Data delay found: 33
13:59:26:setup_element:INFO: Eye window for uplink 27: ____________XXXXXXX_____________________
Data delay found: 35
13:59:26:setup_element:INFO: Eye window for uplink 28: _____________XXXXXX_____________________
Data delay found: 35
13:59:26:setup_element:INFO: Eye window for uplink 29: _____________XXXXXX_____________________
Data delay found: 35
13:59:26:setup_element:INFO: Eye window for uplink 30: __________________XXXXXXX_______________
Data delay found: 1
13:59:26:setup_element:INFO: Eye window for uplink 31: __________________XXXXX_________________
Data delay found: 0
13:59:26:setup_element:INFO: Setting the data phase to 30 for uplink 24
13:59:26:setup_element:INFO: Setting the data phase to 32 for uplink 25
13:59:26:setup_element:INFO: Setting the data phase to 33 for uplink 26
13:59:26:setup_element:INFO: Setting the data phase to 35 for uplink 27
13:59:26:setup_element:INFO: Setting the data phase to 35 for uplink 28
13:59:26:setup_element:INFO: Setting the data phase to 35 for uplink 29
13:59:26:setup_element:INFO: Setting the data phase to 1 for uplink 30
13:59:26:setup_element:INFO: Setting the data phase to 0 for uplink 31
13:59:26:setup_element:INFO: Beginning SMX ASICs map scan
13:59:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:59:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:59:26:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:59:26:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:59:26:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:59:26:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:59:26:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:59:26:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:59:26:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:59:27:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:59:27:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:59:27:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:59:27:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:59:28:setup_element:INFO: Performing Elink synchronization
13:59:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:59:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:59:28:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:59:28:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:59:29:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:59:29:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:59:29:febtest:INFO: Init all SMX (CSA): 30
13:59:37:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:59:38:febtest:INFO: 30-01 | XA-000-09-004-037-017-007-01 | 31.4 | 1183.3
13:59:38:febtest:INFO: 28-03 | XA-000-09-004-037-008-007-12 | 28.2 | 1189.2
13:59:38:febtest:INFO: 26-05 | XA-000-09-004-037-008-005-12 | 18.7 | 1230.3
13:59:38:febtest:INFO: 24-07 | XA-000-09-004-037-014-007-09 | 31.4 | 1177.4
13:59:39:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:59:41:ST3_smx:INFO: chip: 30-1 31.389742 C 1195.082160 mV
13:59:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:59:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:59:41:ST3_smx:INFO: Electrons
13:59:41:ST3_smx:INFO: # loops 0
13:59:43:ST3_smx:INFO: # loops 1
13:59:45:ST3_smx:INFO: # loops 2
13:59:47:ST3_smx:INFO: Total # of broken channels: 0
13:59:47:ST3_smx:INFO: List of broken channels: []
13:59:47:ST3_smx:INFO: Total # of broken channels: 0
13:59:47:ST3_smx:INFO: List of broken channels: []
13:59:49:ST3_smx:INFO: chip: 28-3 31.389742 C 1200.969315 mV
13:59:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:59:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:59:49:ST3_smx:INFO: Electrons
13:59:49:ST3_smx:INFO: # loops 0
13:59:51:ST3_smx:INFO: # loops 1
13:59:53:ST3_smx:INFO: # loops 2
13:59:55:ST3_smx:INFO: Total # of broken channels: 0
13:59:55:ST3_smx:INFO: List of broken channels: []
13:59:55:ST3_smx:INFO: Total # of broken channels: 0
13:59:55:ST3_smx:INFO: List of broken channels: []
13:59:57:ST3_smx:INFO: chip: 26-5 18.745682 C 1242.040240 mV
13:59:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:59:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:59:57:ST3_smx:INFO: Electrons
13:59:57:ST3_smx:INFO: # loops 0
13:59:59:ST3_smx:INFO: # loops 1
14:00:01:ST3_smx:INFO: # loops 2
14:00:02:ST3_smx:INFO: Total # of broken channels: 0
14:00:02:ST3_smx:INFO: List of broken channels: []
14:00:02:ST3_smx:INFO: Total # of broken channels: 0
14:00:02:ST3_smx:INFO: List of broken channels: []
14:00:04:ST3_smx:INFO: chip: 24-7 31.389742 C 1183.292940 mV
14:00:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:00:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:00:04:ST3_smx:INFO: Electrons
14:00:04:ST3_smx:INFO: # loops 0
14:00:06:ST3_smx:INFO: # loops 1
14:00:08:ST3_smx:INFO: # loops 2
14:00:10:ST3_smx:INFO: Total # of broken channels: 0
14:00:10:ST3_smx:INFO: List of broken channels: []
14:00:10:ST3_smx:INFO: Total # of broken channels: 0
14:00:10:ST3_smx:INFO: List of broken channels: []
14:00:10:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:00:10:febtest:INFO: 30-01 | XA-000-09-004-037-017-007-01 | 31.4 | 1212.7
14:00:11:febtest:INFO: 28-03 | XA-000-09-004-037-008-007-12 | 31.4 | 1224.5
14:00:11:febtest:INFO: 26-05 | XA-000-09-004-037-008-005-12 | 18.7 | 1265.4
14:00:11:febtest:INFO: 24-07 | XA-000-09-004-037-014-007-09 | 34.6 | 1206.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_07_18-13_59_18
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4205| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7633', '1.850', '1.1340']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0020', '1.850', '1.2690']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9859', '1.850', '0.2621']