Go Back
FEB_4208 18.07.25 07:57:11
TextEdit.txt
07:57:11:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:57:11:ST3_Shared:INFO: FEB-Microcable
07:57:11:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:57:11:febtest:INFO: Testing FEB with SN 4208
07:57:13:smx_tester:INFO: Scanning setup
07:57:13:elinks:INFO: Disabling clock on downlink 0
07:57:13:elinks:INFO: Disabling clock on downlink 1
07:57:13:elinks:INFO: Disabling clock on downlink 2
07:57:13:elinks:INFO: Disabling clock on downlink 3
07:57:13:elinks:INFO: Disabling clock on downlink 4
07:57:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:57:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:57:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:57:13:elinks:INFO: Disabling clock on downlink 0
07:57:13:elinks:INFO: Disabling clock on downlink 1
07:57:13:elinks:INFO: Disabling clock on downlink 2
07:57:13:elinks:INFO: Disabling clock on downlink 3
07:57:13:elinks:INFO: Disabling clock on downlink 4
07:57:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:57:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:57:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:57:13:elinks:INFO: Disabling clock on downlink 0
07:57:13:elinks:INFO: Disabling clock on downlink 1
07:57:13:elinks:INFO: Disabling clock on downlink 2
07:57:13:elinks:INFO: Disabling clock on downlink 3
07:57:13:elinks:INFO: Disabling clock on downlink 4
07:57:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:57:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:57:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
07:57:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
07:57:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
07:57:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
07:57:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
07:57:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
07:57:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
07:57:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
07:57:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:57:13:elinks:INFO: Disabling clock on downlink 0
07:57:13:elinks:INFO: Disabling clock on downlink 1
07:57:13:elinks:INFO: Disabling clock on downlink 2
07:57:13:elinks:INFO: Disabling clock on downlink 3
07:57:13:elinks:INFO: Disabling clock on downlink 4
07:57:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:57:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:57:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:57:13:elinks:INFO: Disabling clock on downlink 0
07:57:13:elinks:INFO: Disabling clock on downlink 1
07:57:13:elinks:INFO: Disabling clock on downlink 2
07:57:13:elinks:INFO: Disabling clock on downlink 3
07:57:13:elinks:INFO: Disabling clock on downlink 4
07:57:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:57:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:57:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:57:13:setup_element:INFO: Scanning clock phase
07:57:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:57:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:57:14:setup_element:INFO: Clock phase scan results for group 0, downlink 2
07:57:14:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXX____
Clock Delay: 32
07:57:14:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXX____
Clock Delay: 32
07:57:14:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXX____
Clock Delay: 33
07:57:14:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXX____
Clock Delay: 33
07:57:14:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXX____
Clock Delay: 33
07:57:14:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXX____
Clock Delay: 33
07:57:14:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXX___
Clock Delay: 34
07:57:14:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXX___
Clock Delay: 34
07:57:14:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
07:57:14:setup_element:INFO: Scanning data phases
07:57:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:57:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:57:19:setup_element:INFO: Data phase scan results for group 0, downlink 2
07:57:19:setup_element:INFO: Eye window for uplink 24: ________XXXXX___________________________
Data delay found: 30
07:57:19:setup_element:INFO: Eye window for uplink 25: __________XXXXX_________________________
Data delay found: 32
07:57:19:setup_element:INFO: Eye window for uplink 26: _________XXXXXXX________________________
Data delay found: 32
07:57:19:setup_element:INFO: Eye window for uplink 27: ___________XXXXXXX______________________
Data delay found: 34
07:57:19:setup_element:INFO: Eye window for uplink 28: _______________XXXXX____________________
Data delay found: 37
07:57:19:setup_element:INFO: Eye window for uplink 29: ______________XXXXX_____________________
Data delay found: 36
07:57:19:setup_element:INFO: Eye window for uplink 30: _______________XXXXXXXX_________________
Data delay found: 38
07:57:19:setup_element:INFO: Eye window for uplink 31: ______________XXXXXXX___________________
Data delay found: 37
07:57:19:setup_element:INFO: Setting the data phase to 30 for uplink 24
07:57:19:setup_element:INFO: Setting the data phase to 32 for uplink 25
07:57:19:setup_element:INFO: Setting the data phase to 32 for uplink 26
07:57:19:setup_element:INFO: Setting the data phase to 34 for uplink 27
07:57:19:setup_element:INFO: Setting the data phase to 37 for uplink 28
07:57:19:setup_element:INFO: Setting the data phase to 36 for uplink 29
07:57:19:setup_element:INFO: Setting the data phase to 38 for uplink 30
07:57:19:setup_element:INFO: Setting the data phase to 37 for uplink 31
07:57:19:setup_element:INFO: Beginning SMX ASICs map scan
07:57:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:57:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:57:19:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
07:57:19:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
07:57:19:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
07:57:19:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
07:57:19:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
07:57:19:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
07:57:19:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
07:57:20:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
07:57:20:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
07:57:20:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
07:57:20:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
07:57:21:setup_element:INFO: Performing Elink synchronization
07:57:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:57:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:57:21:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
07:57:21:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
07:57:21:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
07:57:21:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
07:57:22:febtest:INFO: Init all SMX (CSA): 30
07:57:28:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:57:29:febtest:INFO: 30-01 | XA-000-09-004-037-013-020-00 | 25.1 | 1189.2
07:57:29:febtest:INFO: 28-03 | XA-000-09-004-037-002-010-03 | 28.2 | 1177.4
07:57:29:febtest:INFO: 26-05 | XA-000-09-004-037-010-020-08 | 37.7 | 1153.7
07:57:29:febtest:INFO: 24-07 | XA-000-09-004-037-007-020-15 | 34.6 | 1171.5
07:57:30:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
07:57:32:ST3_smx:INFO: chip: 30-1 25.062742 C 1200.969315 mV
07:57:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:57:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:57:32:ST3_smx:INFO: Electrons
07:57:32:ST3_smx:INFO: # loops 0
07:57:34:ST3_smx:INFO: # loops 1
07:57:35:ST3_smx:INFO: # loops 2
07:57:37:ST3_smx:INFO: Total # of broken channels: 0
07:57:37:ST3_smx:INFO: List of broken channels: []
07:57:37:ST3_smx:INFO: Total # of broken channels: 0
07:57:37:ST3_smx:INFO: List of broken channels: []
07:57:39:ST3_smx:INFO: chip: 28-3 28.225000 C 1189.190035 mV
07:57:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:57:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:57:39:ST3_smx:INFO: Electrons
07:57:39:ST3_smx:INFO: # loops 0
07:57:41:ST3_smx:INFO: # loops 1
07:57:42:ST3_smx:INFO: # loops 2
07:57:44:ST3_smx:INFO: Total # of broken channels: 0
07:57:44:ST3_smx:INFO: List of broken channels: []
07:57:44:ST3_smx:INFO: Total # of broken channels: 0
07:57:44:ST3_smx:INFO: List of broken channels: []
07:57:45:ST3_smx:INFO: chip: 26-5 37.726682 C 1165.571835 mV
07:57:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:57:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:57:45:ST3_smx:INFO: Electrons
07:57:45:ST3_smx:INFO: # loops 0
07:57:47:ST3_smx:INFO: # loops 1
07:57:48:ST3_smx:INFO: # loops 2
07:57:50:ST3_smx:INFO: Total # of broken channels: 0
07:57:50:ST3_smx:INFO: List of broken channels: []
07:57:50:ST3_smx:INFO: Total # of broken channels: 0
07:57:50:ST3_smx:INFO: List of broken channels: []
07:57:51:ST3_smx:INFO: chip: 24-7 34.556970 C 1177.390875 mV
07:57:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:57:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:57:51:ST3_smx:INFO: Electrons
07:57:51:ST3_smx:INFO: # loops 0
07:57:53:ST3_smx:INFO: # loops 1
07:57:54:ST3_smx:INFO: # loops 2
07:57:56:ST3_smx:INFO: Total # of broken channels: 0
07:57:56:ST3_smx:INFO: List of broken channels: []
07:57:56:ST3_smx:INFO: Total # of broken channels: 0
07:57:56:ST3_smx:INFO: List of broken channels: []
07:57:56:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:57:56:febtest:INFO: 30-01 | XA-000-09-004-037-013-020-00 | 28.2 | 1224.5
07:57:57:febtest:INFO: 28-03 | XA-000-09-004-037-002-010-03 | 28.2 | 1212.7
07:57:57:febtest:INFO: 26-05 | XA-000-09-004-037-010-020-08 | 37.7 | 1183.3
07:57:57:febtest:INFO: 24-07 | XA-000-09-004-037-007-020-15 | 34.6 | 1201.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_07_18-07_57_11
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4208| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7478', '1.847', '1.3920']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0480', '1.850', '1.2840']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0000', '1.850', '0.2679']