DTL-STS tests database

FEB_4210 29.07.25 13:34:36

link: XA-000-09-004-037-005-011-11
...SMX_0.root
link: XA-000-09-004-037-005-012-11
...SMX_2.root
link: XA-000-09-004-037-014-010-09
...SMX_4.root
link: XA-000-09-004-037-002-011-03
...SMX_6.root
link: XA-000-09-004-037-017-011-01
...SMX_1.root
link: XA-000-09-004-037-008-011-12
...SMX_3.root
link: XA-000-09-004-037-008-012-12
...SMX_5.root
link: XA-000-09-004-037-017-010-01
...SMX_7.root
link: XA-000-09-004-037-017-010-01
...VddmCSAstatus.root
TextEdit.txt
            13:34:36:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:34:36:ST3_Shared:INFO:	                         FEB-Sensor                         
13:34:36:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:34:46:ST3_ModuleSelector:INFO:	http://web-docs.gsi.de/~dtl-sts/?m=module&n=M8UR5B4011234B2

13:34:46:ST3_ModuleSelector:INFO:	12124

13:34:46:febtest:INFO:	Testing FEB with SN 4210
13:34:47:smx_tester:INFO:	Scanning setup
13:34:47:elinks:INFO:	Disabling clock on downlink 0
13:34:47:elinks:INFO:	Disabling clock on downlink 1
13:34:47:elinks:INFO:	Disabling clock on downlink 2
13:34:47:elinks:INFO:	Disabling clock on downlink 3
13:34:47:elinks:INFO:	Disabling clock on downlink 4
13:34:47:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:34:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:34:47:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:34:47:elinks:INFO:	Disabling clock on downlink 0
13:34:47:elinks:INFO:	Disabling clock on downlink 1
13:34:47:elinks:INFO:	Disabling clock on downlink 2
13:34:47:elinks:INFO:	Disabling clock on downlink 3
13:34:47:elinks:INFO:	Disabling clock on downlink 4
13:34:47:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:34:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:34:48:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:34:48:elinks:INFO:	Disabling clock on downlink 0
13:34:48:elinks:INFO:	Disabling clock on downlink 1
13:34:48:elinks:INFO:	Disabling clock on downlink 2
13:34:48:elinks:INFO:	Disabling clock on downlink 3
13:34:48:elinks:INFO:	Disabling clock on downlink 4
13:34:48:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:34:48:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:34:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
13:34:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
13:34:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
13:34:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
13:34:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
13:34:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
13:34:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
13:34:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
13:34:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
13:34:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
13:34:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
13:34:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
13:34:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
13:34:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
13:34:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
13:34:48:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
13:34:48:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:34:48:elinks:INFO:	Disabling clock on downlink 0
13:34:48:elinks:INFO:	Disabling clock on downlink 1
13:34:48:elinks:INFO:	Disabling clock on downlink 2
13:34:48:elinks:INFO:	Disabling clock on downlink 3
13:34:48:elinks:INFO:	Disabling clock on downlink 4
13:34:48:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:34:48:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:34:48:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:34:48:elinks:INFO:	Disabling clock on downlink 0
13:34:48:elinks:INFO:	Disabling clock on downlink 1
13:34:48:elinks:INFO:	Disabling clock on downlink 2
13:34:48:elinks:INFO:	Disabling clock on downlink 3
13:34:48:elinks:INFO:	Disabling clock on downlink 4
13:34:48:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:34:48:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:34:48:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:34:48:setup_element:INFO:	Scanning clock phase
13:34:48:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:34:48:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:34:48:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
13:34:48:setup_element:INFO:	Eye window for uplink 16: _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:34:48:setup_element:INFO:	Eye window for uplink 17: _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:34:48:setup_element:INFO:	Eye window for uplink 18: _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:34:48:setup_element:INFO:	Eye window for uplink 19: _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:34:48:setup_element:INFO:	Eye window for uplink 20: _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:34:48:setup_element:INFO:	Eye window for uplink 21: _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:34:48:setup_element:INFO:	Eye window for uplink 22: ________________________________________________________________________XXXXX___
Clock Delay: 34
13:34:48:setup_element:INFO:	Eye window for uplink 23: ________________________________________________________________________XXXXX___
Clock Delay: 34
13:34:48:setup_element:INFO:	Eye window for uplink 24: ________________________________________________________________________XXXXX___
Clock Delay: 34
13:34:48:setup_element:INFO:	Eye window for uplink 25: ________________________________________________________________________XXXXX___
Clock Delay: 34
13:34:48:setup_element:INFO:	Eye window for uplink 26: ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:34:48:setup_element:INFO:	Eye window for uplink 27: ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:34:48:setup_element:INFO:	Eye window for uplink 28: ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:34:48:setup_element:INFO:	Eye window for uplink 29: ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:34:48:setup_element:INFO:	Eye window for uplink 30: ___________________________________________________________________________XXXX_
Clock Delay: 36
13:34:48:setup_element:INFO:	Eye window for uplink 31: ___________________________________________________________________________XXXX_
Clock Delay: 36
13:34:48:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 2
13:34:48:setup_element:INFO:	Scanning data phases
13:34:48:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:34:48:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:34:53:setup_element:INFO:	Data phase scan results for group 0, downlink 2
13:34:53:setup_element:INFO:	Eye window for uplink 16: XXX_________________________________XXXX
Data delay found: 19
13:34:53:setup_element:INFO:	Eye window for uplink 17: XX_________________________________XXXXX
Data delay found: 18
13:34:53:setup_element:INFO:	Eye window for uplink 18: ___________________________________XXXX_
Data delay found: 16
13:34:53:setup_element:INFO:	Eye window for uplink 19: ___________________________________XXXXX
Data delay found: 17
13:34:53:setup_element:INFO:	Eye window for uplink 20: _________________________________XXXX___
Data delay found: 14
13:34:53:setup_element:INFO:	Eye window for uplink 21: _________________________________XXXXX__
Data delay found: 15
13:34:53:setup_element:INFO:	Eye window for uplink 22: X__________________________________XXXXX
Data delay found: 17
13:34:53:setup_element:INFO:	Eye window for uplink 23: ________________________________XXXXX___
Data delay found: 14
13:34:53:setup_element:INFO:	Eye window for uplink 24: ________XXXXX___________________________
Data delay found: 30
13:34:53:setup_element:INFO:	Eye window for uplink 25: __________XXXXX_________________________
Data delay found: 32
13:34:54:setup_element:INFO:	Eye window for uplink 26: ______XXXXXX____________________________
Data delay found: 28
13:34:54:setup_element:INFO:	Eye window for uplink 27: _______XXXXXXX__________________________
Data delay found: 30
13:34:54:setup_element:INFO:	Eye window for uplink 28: ______________XXXX______________________
Data delay found: 35
13:34:54:setup_element:INFO:	Eye window for uplink 29: _____________XXXX_______________________
Data delay found: 34
13:34:54:setup_element:INFO:	Eye window for uplink 30: _________________XXXXXXX________________
Data delay found: 0
13:34:54:setup_element:INFO:	Eye window for uplink 31: ________________XXXXXX__________________
Data delay found: 38
13:34:54:setup_element:INFO:	Setting the data phase to 19 for uplink 16
13:34:54:setup_element:INFO:	Setting the data phase to 18 for uplink 17
13:34:54:setup_element:INFO:	Setting the data phase to 16 for uplink 18
13:34:54:setup_element:INFO:	Setting the data phase to 17 for uplink 19
13:34:54:setup_element:INFO:	Setting the data phase to 14 for uplink 20
13:34:54:setup_element:INFO:	Setting the data phase to 15 for uplink 21
13:34:54:setup_element:INFO:	Setting the data phase to 17 for uplink 22
13:34:54:setup_element:INFO:	Setting the data phase to 14 for uplink 23
13:34:54:setup_element:INFO:	Setting the data phase to 30 for uplink 24
13:34:54:setup_element:INFO:	Setting the data phase to 32 for uplink 25
13:34:54:setup_element:INFO:	Setting the data phase to 28 for uplink 26
13:34:54:setup_element:INFO:	Setting the data phase to 30 for uplink 27
13:34:54:setup_element:INFO:	Setting the data phase to 35 for uplink 28
13:34:54:setup_element:INFO:	Setting the data phase to 34 for uplink 29
13:34:54:setup_element:INFO:	Setting the data phase to 0 for uplink 30
13:34:54:setup_element:INFO:	Setting the data phase to 38 for uplink 31
13:34:54:setup_element:INFO:	Beginning SMX ASICs map scan
13:34:54:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:34:54:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:34:54:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:34:54:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:34:54:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13:34:54:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
13:34:54:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
13:34:54:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:34:54:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:34:54:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
13:34:54:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
13:34:54:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:34:54:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:34:54:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
13:34:54:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
13:34:55:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:34:55:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:34:55:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
13:34:55:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
13:34:55:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:34:55:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:34:56:setup_element:INFO:	Performing Elink synchronization
13:34:56:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:34:56:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:34:56:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:34:56:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:34:56:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
13:34:56:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:34:57:febtest:INFO:	Init all SMX (CSA): 30
13:35:14:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:35:14:febtest:INFO:	23-00 | XA-000-09-004-037-005-011-11 |  21.9 | 1212.7
13:35:14:febtest:INFO:	30-01 | XA-000-09-004-037-017-011-01 |  28.2 | 1195.1
13:35:14:febtest:INFO:	21-02 | XA-000-09-004-037-005-012-11 |  34.6 | 1159.7
13:35:14:febtest:INFO:	28-03 | XA-000-09-004-037-008-011-12 |  37.7 | 1171.5
13:35:15:febtest:INFO:	19-04 | XA-000-09-004-037-014-010-09 |  40.9 | 1153.7
13:35:15:febtest:INFO:	26-05 | XA-000-09-004-037-008-012-12 |  37.7 | 1171.5
13:35:15:febtest:INFO:	17-06 | XA-000-09-004-037-002-011-03 |  34.6 | 1165.6
13:35:15:febtest:INFO:	24-07 | XA-000-09-004-037-017-010-01 |  34.6 | 1183.3
13:35:16:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:35:18:ST3_smx:INFO:	chip: 23-0 	 21.902970 C 	 1224.468235 mV
13:35:18:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:35:18:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:35:18:ST3_smx:INFO:		Electrons
13:35:18:ST3_smx:INFO:	# loops 0
13:35:20:ST3_smx:INFO:	# loops 1
13:35:21:ST3_smx:INFO:	# loops 2
13:35:23:ST3_smx:INFO:	Total # of broken channels: 0
13:35:23:ST3_smx:INFO:	List of broken channels: []
13:35:23:ST3_smx:INFO:	Total # of broken channels: 0
13:35:23:ST3_smx:INFO:	List of broken channels: []
13:35:25:ST3_smx:INFO:	chip: 30-1 	 25.062742 C 	 1212.728715 mV
13:35:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:35:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:35:25:ST3_smx:INFO:		Electrons
13:35:25:ST3_smx:INFO:	# loops 0
13:35:26:ST3_smx:INFO:	# loops 1
13:35:28:ST3_smx:INFO:	# loops 2
13:35:29:ST3_smx:INFO:	Total # of broken channels: 0
13:35:29:ST3_smx:INFO:	List of broken channels: []
13:35:29:ST3_smx:INFO:	Total # of broken channels: 0
13:35:29:ST3_smx:INFO:	List of broken channels: []
13:35:31:ST3_smx:INFO:	chip: 21-2 	 34.556970 C 	 1171.483840 mV
13:35:31:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:35:31:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:35:31:ST3_smx:INFO:		Electrons
13:35:31:ST3_smx:INFO:	# loops 0
13:35:32:ST3_smx:INFO:	# loops 1
13:35:34:ST3_smx:INFO:	# loops 2
13:35:35:ST3_smx:INFO:	Total # of broken channels: 0
13:35:35:ST3_smx:INFO:	List of broken channels: []
13:35:35:ST3_smx:INFO:	Total # of broken channels: 1
13:35:35:ST3_smx:INFO:	List of broken channels: [101]
13:35:37:ST3_smx:INFO:	chip: 28-3 	 37.726682 C 	 1183.292940 mV
13:35:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:35:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:35:37:ST3_smx:INFO:		Electrons
13:35:37:ST3_smx:INFO:	# loops 0
13:35:39:ST3_smx:INFO:	# loops 1
13:35:41:ST3_smx:INFO:	# loops 2
13:35:43:ST3_smx:INFO:	Total # of broken channels: 0
13:35:43:ST3_smx:INFO:	List of broken channels: []
13:35:43:ST3_smx:INFO:	Total # of broken channels: 3
13:35:43:ST3_smx:INFO:	List of broken channels: [20, 32, 98]
13:35:44:ST3_smx:INFO:	chip: 19-4 	 40.898880 C 	 1159.654860 mV
13:35:44:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:35:44:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:35:44:ST3_smx:INFO:		Electrons
13:35:44:ST3_smx:INFO:	# loops 0
13:35:46:ST3_smx:INFO:	# loops 1
13:35:48:ST3_smx:INFO:	# loops 2
13:35:49:ST3_smx:INFO:	Total # of broken channels: 0
13:35:49:ST3_smx:INFO:	List of broken channels: []
13:35:49:ST3_smx:INFO:	Total # of broken channels: 0
13:35:49:ST3_smx:INFO:	List of broken channels: []
13:35:51:ST3_smx:INFO:	chip: 26-5 	 37.726682 C 	 1183.292940 mV
13:35:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:35:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:35:51:ST3_smx:INFO:		Electrons
13:35:51:ST3_smx:INFO:	# loops 0
13:35:52:ST3_smx:INFO:	# loops 1
13:35:54:ST3_smx:INFO:	# loops 2
13:35:56:ST3_smx:INFO:	Total # of broken channels: 0
13:35:56:ST3_smx:INFO:	List of broken channels: []
13:35:56:ST3_smx:INFO:	Total # of broken channels: 0
13:35:56:ST3_smx:INFO:	List of broken channels: []
13:35:57:ST3_smx:INFO:	chip: 17-6 	 37.726682 C 	 1171.483840 mV
13:35:57:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:35:57:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:35:57:ST3_smx:INFO:		Electrons
13:35:57:ST3_smx:INFO:	# loops 0
13:35:59:ST3_smx:INFO:	# loops 1
13:36:01:ST3_smx:INFO:	# loops 2
13:36:03:ST3_smx:INFO:	Total # of broken channels: 0
13:36:03:ST3_smx:INFO:	List of broken channels: []
13:36:03:ST3_smx:INFO:	Total # of broken channels: 0
13:36:03:ST3_smx:INFO:	List of broken channels: []
13:36:04:ST3_smx:INFO:	chip: 24-7 	 37.726682 C 	 1195.082160 mV
13:36:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:36:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:36:04:ST3_smx:INFO:		Electrons
13:36:05:ST3_smx:INFO:	# loops 0
13:36:06:ST3_smx:INFO:	# loops 1
13:36:08:ST3_smx:INFO:	# loops 2
13:36:10:ST3_smx:INFO:	Total # of broken channels: 0
13:36:10:ST3_smx:INFO:	List of broken channels: []
13:36:10:ST3_smx:INFO:	Total # of broken channels: 0
13:36:10:ST3_smx:INFO:	List of broken channels: []
13:36:10:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:36:10:febtest:INFO:	23-00 | XA-000-09-004-037-005-011-11 |  25.1 | 1253.7
13:36:10:febtest:INFO:	30-01 | XA-000-09-004-037-017-011-01 |  28.2 | 1230.3
13:36:11:febtest:INFO:	21-02 | XA-000-09-004-037-005-012-11 |  37.7 | 1195.1
13:36:11:febtest:INFO:	28-03 | XA-000-09-004-037-008-011-12 |  40.9 | 1206.9
13:36:11:febtest:INFO:	19-04 | XA-000-09-004-037-014-010-09 |  44.1 | 1183.3
13:36:11:febtest:INFO:	26-05 | XA-000-09-004-037-008-012-12 |  40.9 | 1206.9
13:36:11:febtest:INFO:	17-06 | XA-000-09-004-037-002-011-03 |  37.7 | 1195.1
13:36:12:febtest:INFO:	24-07 | XA-000-09-004-037-017-010-01 |  37.7 | 1218.6
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_07_29-13_34_36
OPERATOR  : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4210| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_ID:	12124

MODULE_NAME:	http://web-docs.gsi.de/~dtl-sts/?m=module&n=M8UR5B4011234B2

MODULE_TYPE:	
MODULE_LADDER:	
MODULE_MODULE:	
MODULE_SIZE:	0
MODULE_GRADE:	
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.449', '1.4780', '1.849', '2.3860']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0660', '1.850', '2.4470']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9790', '1.850', '0.5197']
Comment.txt