
FEB_4212 23.07.25 13:40:24
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13:40:24:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:40:24:ST3_Shared:INFO: FEB-Microcable 13:40:24:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:40:24:febtest:INFO: Testing FEB with SN 4212 13:40:25:smx_tester:INFO: Scanning setup 13:40:25:elinks:INFO: Disabling clock on downlink 0 13:40:25:elinks:INFO: Disabling clock on downlink 1 13:40:25:elinks:INFO: Disabling clock on downlink 2 13:40:25:elinks:INFO: Disabling clock on downlink 3 13:40:25:elinks:INFO: Disabling clock on downlink 4 13:40:25:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:40:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 13:40:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:40:25:elinks:INFO: Disabling clock on downlink 0 13:40:25:elinks:INFO: Disabling clock on downlink 1 13:40:25:elinks:INFO: Disabling clock on downlink 2 13:40:25:elinks:INFO: Disabling clock on downlink 3 13:40:25:elinks:INFO: Disabling clock on downlink 4 13:40:25:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:40:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:40:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:40:25:elinks:INFO: Disabling clock on downlink 0 13:40:25:elinks:INFO: Disabling clock on downlink 1 13:40:25:elinks:INFO: Disabling clock on downlink 2 13:40:25:elinks:INFO: Disabling clock on downlink 3 13:40:25:elinks:INFO: Disabling clock on downlink 4 13:40:25:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:40:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:40:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 13:40:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 13:40:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 13:40:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 13:40:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 13:40:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 13:40:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 13:40:26:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 13:40:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:40:26:elinks:INFO: Disabling clock on downlink 0 13:40:26:elinks:INFO: Disabling clock on downlink 1 13:40:26:elinks:INFO: Disabling clock on downlink 2 13:40:26:elinks:INFO: Disabling clock on downlink 3 13:40:26:elinks:INFO: Disabling clock on downlink 4 13:40:26:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:40:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 13:40:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:40:26:elinks:INFO: Disabling clock on downlink 0 13:40:26:elinks:INFO: Disabling clock on downlink 1 13:40:26:elinks:INFO: Disabling clock on downlink 2 13:40:26:elinks:INFO: Disabling clock on downlink 3 13:40:26:elinks:INFO: Disabling clock on downlink 4 13:40:26:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:40:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 13:40:26:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:40:26:setup_element:INFO: Scanning clock phase 13:40:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:40:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:40:26:setup_element:INFO: Clock phase scan results for group 0, downlink 2 13:40:26:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 13:40:26:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 13:40:26:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXX____ Clock Delay: 32 13:40:26:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXX____ Clock Delay: 32 13:40:26:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXX____ Clock Delay: 32 13:40:26:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXX____ Clock Delay: 32 13:40:26:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 13:40:26:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXXX___ Clock Delay: 33 13:40:26:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2 13:40:26:setup_element:INFO: Scanning data phases 13:40:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:40:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:40:31:setup_element:INFO: Data phase scan results for group 0, downlink 2 13:40:31:setup_element:INFO: Eye window for uplink 24: ______XXXXXX____________________________ Data delay found: 28 13:40:31:setup_element:INFO: Eye window for uplink 25: _________XXXX___________________________ Data delay found: 30 13:40:31:setup_element:INFO: Eye window for uplink 26: _________XXXXXXX________________________ Data delay found: 32 13:40:31:setup_element:INFO: Eye window for uplink 27: ___________XXXXXXX______________________ Data delay found: 34 13:40:31:setup_element:INFO: Eye window for uplink 28: ______________XXXXX_____________________ Data delay found: 36 13:40:31:setup_element:INFO: Eye window for uplink 29: _______________XXXX_____________________ Data delay found: 36 13:40:31:setup_element:INFO: Eye window for uplink 30: ________________XXXXXX__________________ Data delay found: 38 13:40:31:setup_element:INFO: Eye window for uplink 31: _______________XXXXXX___________________ Data delay found: 37 13:40:31:setup_element:INFO: Setting the data phase to 28 for uplink 24 13:40:31:setup_element:INFO: Setting the data phase to 30 for uplink 25 13:40:31:setup_element:INFO: Setting the data phase to 32 for uplink 26 13:40:31:setup_element:INFO: Setting the data phase to 34 for uplink 27 13:40:31:setup_element:INFO: Setting the data phase to 36 for uplink 28 13:40:31:setup_element:INFO: Setting the data phase to 36 for uplink 29 13:40:31:setup_element:INFO: Setting the data phase to 38 for uplink 30 13:40:31:setup_element:INFO: Setting the data phase to 37 for uplink 31 13:40:31:setup_element:INFO: Beginning SMX ASICs map scan 13:40:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:40:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:40:31:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 13:40:31:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 13:40:31:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31] 13:40:32:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 13:40:32:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 13:40:32:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 13:40:32:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 13:40:32:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 13:40:32:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 13:40:33:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 13:40:33:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 13:40:34:setup_element:INFO: Performing Elink synchronization 13:40:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:40:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:40:34:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 13:40:34:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 13:40:34:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 13:40:34:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 13:40:35:febtest:INFO: Init all SMX (CSA): 30 13:40:43:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:40:43:febtest:INFO: 30-01 | XA-000-09-004-037-004-016-01 | 25.1 | 1206.9 13:40:44:febtest:INFO: 28-03 | XA-000-09-004-037-007-016-15 | 47.3 | 1124.0 13:40:44:febtest:INFO: 26-05 | XA-000-09-004-037-007-017-15 | 40.9 | 1153.7 13:40:44:febtest:INFO: 24-07 | XA-000-09-004-037-004-015-06 | 21.9 | 1212.7 13:40:45:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 13:40:47:ST3_smx:INFO: chip: 30-1 25.062742 C 1218.600960 mV 13:40:47:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:40:47:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:40:47:ST3_smx:INFO: Electrons 13:40:47:ST3_smx:INFO: # loops 0 13:40:49:ST3_smx:INFO: # loops 1 13:40:51:ST3_smx:INFO: # loops 2 13:40:53:ST3_smx:INFO: Total # of broken channels: 0 13:40:53:ST3_smx:INFO: List of broken channels: [] 13:40:53:ST3_smx:INFO: Total # of broken channels: 0 13:40:53:ST3_smx:INFO: List of broken channels: [] 13:40:55:ST3_smx:INFO: chip: 28-3 47.250730 C 1135.937260 mV 13:40:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:40:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:40:55:ST3_smx:INFO: Electrons 13:40:55:ST3_smx:INFO: # loops 0 13:40:57:ST3_smx:INFO: # loops 1 13:40:59:ST3_smx:INFO: # loops 2 13:41:01:ST3_smx:INFO: Total # of broken channels: 0 13:41:01:ST3_smx:INFO: List of broken channels: [] 13:41:01:ST3_smx:INFO: Total # of broken channels: 0 13:41:01:ST3_smx:INFO: List of broken channels: [] 13:41:03:ST3_smx:INFO: chip: 26-5 40.898880 C 1165.571835 mV 13:41:03:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:41:03:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:41:03:ST3_smx:INFO: Electrons 13:41:03:ST3_smx:INFO: # loops 0 13:41:05:ST3_smx:INFO: # loops 1 13:41:07:ST3_smx:INFO: # loops 2 13:41:09:ST3_smx:INFO: Total # of broken channels: 0 13:41:09:ST3_smx:INFO: List of broken channels: [] 13:41:09:ST3_smx:INFO: Total # of broken channels: 0 13:41:09:ST3_smx:INFO: List of broken channels: [] 13:41:11:ST3_smx:INFO: chip: 24-7 25.062742 C 1224.468235 mV 13:41:11:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:41:11:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:41:11:ST3_smx:INFO: Electrons 13:41:11:ST3_smx:INFO: # loops 0 13:41:13:ST3_smx:INFO: # loops 1 13:41:15:ST3_smx:INFO: # loops 2 13:41:16:ST3_smx:INFO: Total # of broken channels: 0 13:41:16:ST3_smx:INFO: List of broken channels: [] 13:41:16:ST3_smx:INFO: Total # of broken channels: 0 13:41:16:ST3_smx:INFO: List of broken channels: [] 13:41:17:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:41:17:febtest:INFO: 30-01 | XA-000-09-004-037-004-016-01 | 25.1 | 1236.2 13:41:17:febtest:INFO: 28-03 | XA-000-09-004-037-007-016-15 | 50.4 | 1159.7 13:41:17:febtest:INFO: 26-05 | XA-000-09-004-037-007-017-15 | 40.9 | 1201.0 13:41:18:febtest:INFO: 24-07 | XA-000-09-004-037-004-015-06 | 25.1 | 1247.9 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_07_23-13_40_24 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4212| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7620', '1.850', '1.2600'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0170', '1.850', '1.2410'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9945', '1.850', '0.2671']