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FEB_4214 28.07.25 11:47:41
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11:47:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:47:41:ST3_Shared:INFO: FEB-Microcable
11:47:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:47:41:febtest:INFO: Testing FEB with SN 4214
11:47:42:smx_tester:INFO: Scanning setup
11:47:42:elinks:INFO: Disabling clock on downlink 0
11:47:42:elinks:INFO: Disabling clock on downlink 1
11:47:42:elinks:INFO: Disabling clock on downlink 2
11:47:42:elinks:INFO: Disabling clock on downlink 3
11:47:42:elinks:INFO: Disabling clock on downlink 4
11:47:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:47:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:47:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:47:43:elinks:INFO: Disabling clock on downlink 0
11:47:43:elinks:INFO: Disabling clock on downlink 1
11:47:43:elinks:INFO: Disabling clock on downlink 2
11:47:43:elinks:INFO: Disabling clock on downlink 3
11:47:43:elinks:INFO: Disabling clock on downlink 4
11:47:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:47:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:47:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:47:43:elinks:INFO: Disabling clock on downlink 0
11:47:43:elinks:INFO: Disabling clock on downlink 1
11:47:43:elinks:INFO: Disabling clock on downlink 2
11:47:43:elinks:INFO: Disabling clock on downlink 3
11:47:43:elinks:INFO: Disabling clock on downlink 4
11:47:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:47:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:47:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
11:47:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
11:47:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
11:47:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
11:47:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
11:47:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
11:47:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
11:47:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
11:47:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:47:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:47:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:47:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:47:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:47:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:47:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:47:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:47:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:47:43:elinks:INFO: Disabling clock on downlink 0
11:47:43:elinks:INFO: Disabling clock on downlink 1
11:47:43:elinks:INFO: Disabling clock on downlink 2
11:47:43:elinks:INFO: Disabling clock on downlink 3
11:47:43:elinks:INFO: Disabling clock on downlink 4
11:47:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:47:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:47:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:47:43:elinks:INFO: Disabling clock on downlink 0
11:47:43:elinks:INFO: Disabling clock on downlink 1
11:47:43:elinks:INFO: Disabling clock on downlink 2
11:47:43:elinks:INFO: Disabling clock on downlink 3
11:47:43:elinks:INFO: Disabling clock on downlink 4
11:47:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:47:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:47:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:47:43:setup_element:INFO: Scanning clock phase
11:47:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:47:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:47:43:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:47:43:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________XXXXX___
Clock Delay: 34
11:47:43:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________XXXXX___
Clock Delay: 34
11:47:43:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:47:43:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:47:43:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:47:43:setup_element:INFO: Eye window for uplink 21: _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
11:47:43:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:47:43:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:47:43:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:47:43:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:47:43:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:47:43:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:47:43:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:47:43:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:47:43:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:47:43:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:47:43:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
11:47:43:setup_element:INFO: Scanning data phases
11:47:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:47:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:47:49:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:47:49:setup_element:INFO: Eye window for uplink 16: X___________________________________XXXX
Data delay found: 18
11:47:49:setup_element:INFO: Eye window for uplink 17: __________________________________XXXXX_
Data delay found: 16
11:47:49:setup_element:INFO: Eye window for uplink 18: XX__________________________________XXXX
Data delay found: 18
11:47:49:setup_element:INFO: Eye window for uplink 19: XX_________________________________XXXXX
Data delay found: 18
11:47:49:setup_element:INFO: Eye window for uplink 20: X__________________________________XXXXX
Data delay found: 17
11:47:49:setup_element:INFO: Eye window for uplink 21: XX__________________________________XXXX
Data delay found: 18
11:47:49:setup_element:INFO: Eye window for uplink 22: XX__________________________________XXXX
Data delay found: 18
11:47:49:setup_element:INFO: Eye window for uplink 23: __________________________________XXXX__
Data delay found: 15
11:47:49:setup_element:INFO: Eye window for uplink 24: _______XXXXX____________________________
Data delay found: 29
11:47:49:setup_element:INFO: Eye window for uplink 25: ________XXXXX___________________________
Data delay found: 30
11:47:49:setup_element:INFO: Eye window for uplink 26: __________XXXXX_________________________
Data delay found: 32
11:47:49:setup_element:INFO: Eye window for uplink 27: ___________XXXXXXX______________________
Data delay found: 34
11:47:49:setup_element:INFO: Eye window for uplink 28: ____________XXXXX_______________________
Data delay found: 34
11:47:49:setup_element:INFO: Eye window for uplink 29: ____________XXXXX_______________________
Data delay found: 34
11:47:49:setup_element:INFO: Eye window for uplink 30: ______________XXXXXXX___________________
Data delay found: 37
11:47:49:setup_element:INFO: Eye window for uplink 31: _____________XXXXX______________________
Data delay found: 35
11:47:49:setup_element:INFO: Setting the data phase to 18 for uplink 16
11:47:49:setup_element:INFO: Setting the data phase to 16 for uplink 17
11:47:49:setup_element:INFO: Setting the data phase to 18 for uplink 18
11:47:49:setup_element:INFO: Setting the data phase to 18 for uplink 19
11:47:49:setup_element:INFO: Setting the data phase to 17 for uplink 20
11:47:49:setup_element:INFO: Setting the data phase to 18 for uplink 21
11:47:49:setup_element:INFO: Setting the data phase to 18 for uplink 22
11:47:49:setup_element:INFO: Setting the data phase to 15 for uplink 23
11:47:49:setup_element:INFO: Setting the data phase to 29 for uplink 24
11:47:49:setup_element:INFO: Setting the data phase to 30 for uplink 25
11:47:49:setup_element:INFO: Setting the data phase to 32 for uplink 26
11:47:49:setup_element:INFO: Setting the data phase to 34 for uplink 27
11:47:49:setup_element:INFO: Setting the data phase to 34 for uplink 28
11:47:49:setup_element:INFO: Setting the data phase to 34 for uplink 29
11:47:49:setup_element:INFO: Setting the data phase to 37 for uplink 30
11:47:49:setup_element:INFO: Setting the data phase to 35 for uplink 31
11:47:49:setup_element:INFO: Beginning SMX ASICs map scan
11:47:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:47:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:47:49:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:47:49:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:47:49:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:47:49:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
11:47:49:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
11:47:49:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:47:49:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:47:49:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:47:49:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:47:49:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:47:49:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:47:50:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:47:50:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:47:50:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:47:50:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:47:50:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:47:50:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:47:50:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:47:50:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:47:51:setup_element:INFO: Performing Elink synchronization
11:47:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:47:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:47:51:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:47:51:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:47:51:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:47:51:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:47:52:febtest:INFO: Init all SMX (CSA): 30
11:48:08:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:48:08:febtest:INFO: 23-00 | XA-000-09-004-037-004-017-01 | 37.7 | 1159.7
11:48:09:febtest:INFO: 30-01 | XA-000-09-004-037-016-018-11 | 18.7 | 1230.3
11:48:09:febtest:INFO: 21-02 | XA-000-09-004-037-013-019-00 | 31.4 | 1189.2
11:48:09:febtest:INFO: 28-03 | XA-000-09-004-037-004-018-01 | 31.4 | 1189.2
11:48:09:febtest:INFO: 19-04 | XA-000-09-004-037-010-019-08 | 40.9 | 1165.6
11:48:09:febtest:INFO: 26-05 | XA-000-09-004-037-016-019-11 | 28.2 | 1206.9
11:48:10:febtest:INFO: 17-06 | XA-000-09-004-037-008-017-11 | 37.7 | 1171.5
11:48:10:febtest:INFO: 24-07 | XA-000-09-004-037-007-019-15 | 37.7 | 1171.5
11:48:11:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:48:13:ST3_smx:INFO: chip: 23-0 40.898880 C 1171.483840 mV
11:48:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:48:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:48:13:ST3_smx:INFO: Electrons
11:48:13:ST3_smx:INFO: # loops 0
11:48:15:ST3_smx:INFO: # loops 1
11:48:16:ST3_smx:INFO: # loops 2
11:48:18:ST3_smx:INFO: Total # of broken channels: 0
11:48:18:ST3_smx:INFO: List of broken channels: []
11:48:18:ST3_smx:INFO: Total # of broken channels: 0
11:48:18:ST3_smx:INFO: List of broken channels: []
11:48:20:ST3_smx:INFO: chip: 30-1 18.745682 C 1247.887635 mV
11:48:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:48:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:48:20:ST3_smx:INFO: Electrons
11:48:20:ST3_smx:INFO: # loops 0
11:48:22:ST3_smx:INFO: # loops 1
11:48:24:ST3_smx:INFO: # loops 2
11:48:25:ST3_smx:INFO: Total # of broken channels: 0
11:48:25:ST3_smx:INFO: List of broken channels: []
11:48:25:ST3_smx:INFO: Total # of broken channels: 0
11:48:25:ST3_smx:INFO: List of broken channels: []
11:48:27:ST3_smx:INFO: chip: 21-2 31.389742 C 1200.969315 mV
11:48:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:48:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:48:27:ST3_smx:INFO: Electrons
11:48:27:ST3_smx:INFO: # loops 0
11:48:29:ST3_smx:INFO: # loops 1
11:48:31:ST3_smx:INFO: # loops 2
11:48:32:ST3_smx:INFO: Total # of broken channels: 0
11:48:32:ST3_smx:INFO: List of broken channels: []
11:48:32:ST3_smx:INFO: Total # of broken channels: 0
11:48:32:ST3_smx:INFO: List of broken channels: []
11:48:34:ST3_smx:INFO: chip: 28-3 31.389742 C 1200.969315 mV
11:48:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:48:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:48:34:ST3_smx:INFO: Electrons
11:48:34:ST3_smx:INFO: # loops 0
11:48:36:ST3_smx:INFO: # loops 1
11:48:38:ST3_smx:INFO: # loops 2
11:48:39:ST3_smx:INFO: Total # of broken channels: 0
11:48:39:ST3_smx:INFO: List of broken channels: []
11:48:39:ST3_smx:INFO: Total # of broken channels: 0
11:48:39:ST3_smx:INFO: List of broken channels: []
11:48:41:ST3_smx:INFO: chip: 19-4 40.898880 C 1177.390875 mV
11:48:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:48:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:48:41:ST3_smx:INFO: Electrons
11:48:41:ST3_smx:INFO: # loops 0
11:48:43:ST3_smx:INFO: # loops 1
11:48:45:ST3_smx:INFO: # loops 2
11:48:47:ST3_smx:INFO: Total # of broken channels: 0
11:48:47:ST3_smx:INFO: List of broken channels: []
11:48:47:ST3_smx:INFO: Total # of broken channels: 2
11:48:47:ST3_smx:INFO: List of broken channels: [119, 125]
11:48:48:ST3_smx:INFO: chip: 26-5 31.389742 C 1218.600960 mV
11:48:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:48:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:48:48:ST3_smx:INFO: Electrons
11:48:48:ST3_smx:INFO: # loops 0
11:48:50:ST3_smx:INFO: # loops 1
11:48:52:ST3_smx:INFO: # loops 2
11:48:54:ST3_smx:INFO: Total # of broken channels: 1
11:48:54:ST3_smx:INFO: List of broken channels: [68]
11:48:54:ST3_smx:INFO: Total # of broken channels: 13
11:48:54:ST3_smx:INFO: List of broken channels: [23, 25, 27, 29, 31, 33, 35, 37, 41, 43, 45, 49, 68]
11:48:55:ST3_smx:INFO: chip: 17-6 40.898880 C 1177.390875 mV
11:48:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:48:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:48:55:ST3_smx:INFO: Electrons
11:48:55:ST3_smx:INFO: # loops 0
11:48:57:ST3_smx:INFO: # loops 1
11:48:59:ST3_smx:INFO: # loops 2
11:49:00:ST3_smx:INFO: Total # of broken channels: 0
11:49:00:ST3_smx:INFO: List of broken channels: []
11:49:00:ST3_smx:INFO: Total # of broken channels: 0
11:49:00:ST3_smx:INFO: List of broken channels: []
11:49:02:ST3_smx:INFO: chip: 24-7 40.898880 C 1177.390875 mV
11:49:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:49:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:49:02:ST3_smx:INFO: Electrons
11:49:02:ST3_smx:INFO: # loops 0
11:49:04:ST3_smx:INFO: # loops 1
11:49:06:ST3_smx:INFO: # loops 2
11:49:08:ST3_smx:INFO: Total # of broken channels: 0
11:49:08:ST3_smx:INFO: List of broken channels: []
11:49:08:ST3_smx:INFO: Total # of broken channels: 0
11:49:08:ST3_smx:INFO: List of broken channels: []
11:49:08:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:49:08:febtest:INFO: 23-00 | XA-000-09-004-037-004-017-01 | 40.9 | 1206.9
11:49:08:febtest:INFO: 30-01 | XA-000-09-004-037-016-018-11 | 18.7 | 1265.4
11:49:08:febtest:INFO: 21-02 | XA-000-09-004-037-013-019-00 | 34.6 | 1218.6
11:49:09:febtest:INFO: 28-03 | XA-000-09-004-037-004-018-01 | 34.6 | 1218.6
11:49:09:febtest:INFO: 19-04 | XA-000-09-004-037-010-019-08 | 44.1 | 1195.1
11:49:09:febtest:INFO: 26-05 | XA-000-09-004-037-016-019-11 | 31.4 | 1242.0
11:49:09:febtest:INFO: 17-06 | XA-000-09-004-037-008-017-11 | 40.9 | 1201.0
11:49:09:febtest:INFO: 24-07 | XA-000-09-004-037-007-019-15 | 40.9 | 1201.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_07_28-11_47_41
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4214| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9710', '1.847', '2.3480']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0110', '1.849', '2.4710']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9770', '1.850', '0.5192']