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FEB_4215 28.07.25 13:59:21
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13:59:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:59:21:ST3_Shared:INFO: FEB-Microcable
13:59:21:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:59:21:febtest:INFO: Testing FEB with SN 4215
13:59:23:smx_tester:INFO: Scanning setup
13:59:23:elinks:INFO: Disabling clock on downlink 0
13:59:23:elinks:INFO: Disabling clock on downlink 1
13:59:23:elinks:INFO: Disabling clock on downlink 2
13:59:23:elinks:INFO: Disabling clock on downlink 3
13:59:23:elinks:INFO: Disabling clock on downlink 4
13:59:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:59:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:59:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:59:23:elinks:INFO: Disabling clock on downlink 0
13:59:23:elinks:INFO: Disabling clock on downlink 1
13:59:23:elinks:INFO: Disabling clock on downlink 2
13:59:23:elinks:INFO: Disabling clock on downlink 3
13:59:23:elinks:INFO: Disabling clock on downlink 4
13:59:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:59:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:59:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:59:23:elinks:INFO: Disabling clock on downlink 0
13:59:23:elinks:INFO: Disabling clock on downlink 1
13:59:23:elinks:INFO: Disabling clock on downlink 2
13:59:23:elinks:INFO: Disabling clock on downlink 3
13:59:23:elinks:INFO: Disabling clock on downlink 4
13:59:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:59:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:59:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
13:59:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
13:59:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
13:59:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
13:59:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
13:59:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
13:59:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
13:59:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
13:59:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:59:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:59:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:59:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:59:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:59:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:59:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:59:23:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:59:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:59:23:elinks:INFO: Disabling clock on downlink 0
13:59:23:elinks:INFO: Disabling clock on downlink 1
13:59:23:elinks:INFO: Disabling clock on downlink 2
13:59:23:elinks:INFO: Disabling clock on downlink 3
13:59:23:elinks:INFO: Disabling clock on downlink 4
13:59:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:59:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:59:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:59:23:elinks:INFO: Disabling clock on downlink 0
13:59:23:elinks:INFO: Disabling clock on downlink 1
13:59:23:elinks:INFO: Disabling clock on downlink 2
13:59:23:elinks:INFO: Disabling clock on downlink 3
13:59:23:elinks:INFO: Disabling clock on downlink 4
13:59:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:59:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:59:23:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:59:23:setup_element:INFO: Scanning clock phase
13:59:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:59:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:59:24:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:59:24:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:59:24:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:59:24:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________XXXXX___
Clock Delay: 34
13:59:24:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________XXXXX___
Clock Delay: 34
13:59:24:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:59:24:setup_element:INFO: Eye window for uplink 21: _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:59:24:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:59:24:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:59:24:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:59:24:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:59:24:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:59:24:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:59:24:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:59:24:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:59:24:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:59:24:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:59:24:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
13:59:24:setup_element:INFO: Scanning data phases
13:59:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:59:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:59:29:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:59:29:setup_element:INFO: Eye window for uplink 16: X__________________________________XXXXX
Data delay found: 17
13:59:29:setup_element:INFO: Eye window for uplink 17: ___________________________________XXXX_
Data delay found: 16
13:59:29:setup_element:INFO: Eye window for uplink 18: __________________________________XXXXX_
Data delay found: 16
13:59:29:setup_element:INFO: Eye window for uplink 19: __________________________________XXXXX_
Data delay found: 16
13:59:29:setup_element:INFO: Eye window for uplink 20: _________________________________XXXXX__
Data delay found: 15
13:59:29:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXX_
Data delay found: 16
13:59:29:setup_element:INFO: Eye window for uplink 22: XX__________________________________XXXX
Data delay found: 18
13:59:29:setup_element:INFO: Eye window for uplink 23: _________________________________XXXXXX_
Data delay found: 15
13:59:29:setup_element:INFO: Eye window for uplink 24: ____XXXXXX______________________________
Data delay found: 26
13:59:29:setup_element:INFO: Eye window for uplink 25: ______XXXXXX____________________________
Data delay found: 28
13:59:29:setup_element:INFO: Eye window for uplink 26: _____XXXXXXX____________________________
Data delay found: 28
13:59:29:setup_element:INFO: Eye window for uplink 27: _______XXXXXXX__________________________
Data delay found: 30
13:59:29:setup_element:INFO: Eye window for uplink 28: ___________XXXXXX_______________________
Data delay found: 33
13:59:29:setup_element:INFO: Eye window for uplink 29: ___________XXXXX________________________
Data delay found: 33
13:59:29:setup_element:INFO: Eye window for uplink 30: _____________XXXXXXX____________________
Data delay found: 36
13:59:29:setup_element:INFO: Eye window for uplink 31: _____________XXXXX______________________
Data delay found: 35
13:59:29:setup_element:INFO: Setting the data phase to 17 for uplink 16
13:59:29:setup_element:INFO: Setting the data phase to 16 for uplink 17
13:59:29:setup_element:INFO: Setting the data phase to 16 for uplink 18
13:59:29:setup_element:INFO: Setting the data phase to 16 for uplink 19
13:59:29:setup_element:INFO: Setting the data phase to 15 for uplink 20
13:59:29:setup_element:INFO: Setting the data phase to 16 for uplink 21
13:59:29:setup_element:INFO: Setting the data phase to 18 for uplink 22
13:59:29:setup_element:INFO: Setting the data phase to 15 for uplink 23
13:59:29:setup_element:INFO: Setting the data phase to 26 for uplink 24
13:59:29:setup_element:INFO: Setting the data phase to 28 for uplink 25
13:59:29:setup_element:INFO: Setting the data phase to 28 for uplink 26
13:59:29:setup_element:INFO: Setting the data phase to 30 for uplink 27
13:59:29:setup_element:INFO: Setting the data phase to 33 for uplink 28
13:59:29:setup_element:INFO: Setting the data phase to 33 for uplink 29
13:59:29:setup_element:INFO: Setting the data phase to 36 for uplink 30
13:59:29:setup_element:INFO: Setting the data phase to 35 for uplink 31
13:59:29:setup_element:INFO: Beginning SMX ASICs map scan
13:59:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:59:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:59:29:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:59:29:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:59:29:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13:59:29:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
13:59:29:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
13:59:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:59:29:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:59:29:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
13:59:29:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
13:59:29:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:59:30:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:59:30:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
13:59:30:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
13:59:30:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:59:30:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:59:30:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
13:59:30:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
13:59:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:59:30:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:59:32:setup_element:INFO: Performing Elink synchronization
13:59:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:59:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:59:32:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:59:32:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:59:32:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:59:32:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:59:32:febtest:INFO: Init all SMX (CSA): 30
13:59:47:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:59:47:febtest:INFO: 23-00 | XA-000-09-004-037-017-016-06 | 21.9 | 1218.6
13:59:48:febtest:INFO: 30-01 | XA-000-09-004-037-005-018-12 | 44.1 | 1130.0
13:59:48:febtest:INFO: 21-02 | XA-000-09-004-037-008-015-12 | 31.4 | 1189.2
13:59:48:febtest:INFO: 28-03 | XA-000-09-004-037-008-018-11 | 37.7 | 1165.6
13:59:48:febtest:INFO: 19-04 | XA-000-09-004-037-002-015-03 | 40.9 | 1165.6
13:59:48:febtest:INFO: 26-05 | XA-000-09-004-037-011-015-02 | 28.2 | 1201.0
13:59:49:febtest:INFO: 17-06 | XA-000-09-004-037-014-016-14 | 25.1 | 1224.5
13:59:49:febtest:INFO: 24-07 | XA-000-09-004-037-005-015-11 | 37.7 | 1165.6
13:59:50:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:59:52:ST3_smx:INFO: chip: 23-0 21.902970 C 1230.330540 mV
13:59:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:59:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:59:52:ST3_smx:INFO: Electrons
13:59:52:ST3_smx:INFO: # loops 0
13:59:53:ST3_smx:INFO: # loops 1
13:59:55:ST3_smx:INFO: # loops 2
13:59:57:ST3_smx:INFO: Total # of broken channels: 0
13:59:57:ST3_smx:INFO: List of broken channels: []
13:59:57:ST3_smx:INFO: Total # of broken channels: 0
13:59:57:ST3_smx:INFO: List of broken channels: []
13:59:58:ST3_smx:INFO: chip: 30-1 40.898880 C 1147.806000 mV
13:59:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:59:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:59:58:ST3_smx:INFO: Electrons
13:59:58:ST3_smx:INFO: # loops 0
14:00:00:ST3_smx:INFO: # loops 1
14:00:01:ST3_smx:INFO: # loops 2
14:00:03:ST3_smx:INFO: Total # of broken channels: 0
14:00:03:ST3_smx:INFO: List of broken channels: []
14:00:03:ST3_smx:INFO: Total # of broken channels: 0
14:00:03:ST3_smx:INFO: List of broken channels: []
14:00:05:ST3_smx:INFO: chip: 21-2 34.556970 C 1200.969315 mV
14:00:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:00:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:00:05:ST3_smx:INFO: Electrons
14:00:05:ST3_smx:INFO: # loops 0
14:00:06:ST3_smx:INFO: # loops 1
14:00:08:ST3_smx:INFO: # loops 2
14:00:09:ST3_smx:INFO: Total # of broken channels: 0
14:00:09:ST3_smx:INFO: List of broken channels: []
14:00:09:ST3_smx:INFO: Total # of broken channels: 0
14:00:09:ST3_smx:INFO: List of broken channels: []
14:00:11:ST3_smx:INFO: chip: 28-3 37.726682 C 1177.390875 mV
14:00:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:00:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:00:11:ST3_smx:INFO: Electrons
14:00:11:ST3_smx:INFO: # loops 0
14:00:13:ST3_smx:INFO: # loops 1
14:00:14:ST3_smx:INFO: # loops 2
14:00:16:ST3_smx:INFO: Total # of broken channels: 0
14:00:16:ST3_smx:INFO: List of broken channels: []
14:00:16:ST3_smx:INFO: Total # of broken channels: 0
14:00:16:ST3_smx:INFO: List of broken channels: []
14:00:17:ST3_smx:INFO: chip: 19-4 40.898880 C 1171.483840 mV
14:00:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:00:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:00:17:ST3_smx:INFO: Electrons
14:00:17:ST3_smx:INFO: # loops 0
14:00:19:ST3_smx:INFO: # loops 1
14:00:20:ST3_smx:INFO: # loops 2
14:00:22:ST3_smx:INFO: Total # of broken channels: 0
14:00:22:ST3_smx:INFO: List of broken channels: []
14:00:22:ST3_smx:INFO: Total # of broken channels: 0
14:00:22:ST3_smx:INFO: List of broken channels: []
14:00:24:ST3_smx:INFO: chip: 26-5 28.225000 C 1212.728715 mV
14:00:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:00:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:00:24:ST3_smx:INFO: Electrons
14:00:24:ST3_smx:INFO: # loops 0
14:00:25:ST3_smx:INFO: # loops 1
14:00:27:ST3_smx:INFO: # loops 2
14:00:29:ST3_smx:INFO: Total # of broken channels: 0
14:00:29:ST3_smx:INFO: List of broken channels: []
14:00:29:ST3_smx:INFO: Total # of broken channels: 0
14:00:29:ST3_smx:INFO: List of broken channels: []
14:00:30:ST3_smx:INFO: chip: 17-6 28.225000 C 1230.330540 mV
14:00:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:00:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:00:30:ST3_smx:INFO: Electrons
14:00:30:ST3_smx:INFO: # loops 0
14:00:32:ST3_smx:INFO: # loops 1
14:00:33:ST3_smx:INFO: # loops 2
14:00:35:ST3_smx:INFO: Total # of broken channels: 0
14:00:35:ST3_smx:INFO: List of broken channels: []
14:00:35:ST3_smx:INFO: Total # of broken channels: 0
14:00:35:ST3_smx:INFO: List of broken channels: []
14:00:36:ST3_smx:INFO: chip: 24-7 40.898880 C 1171.483840 mV
14:00:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:00:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:00:36:ST3_smx:INFO: Electrons
14:00:36:ST3_smx:INFO: # loops 0
14:00:38:ST3_smx:INFO: # loops 1
14:00:39:ST3_smx:INFO: # loops 2
14:00:41:ST3_smx:INFO: Total # of broken channels: 0
14:00:41:ST3_smx:INFO: List of broken channels: []
14:00:41:ST3_smx:INFO: Total # of broken channels: 0
14:00:41:ST3_smx:INFO: List of broken channels: []
14:00:41:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:00:41:febtest:INFO: 23-00 | XA-000-09-004-037-017-016-06 | 25.1 | 1259.6
14:00:42:febtest:INFO: 30-01 | XA-000-09-004-037-005-018-12 | 44.1 | 1165.6
14:00:42:febtest:INFO: 21-02 | XA-000-09-004-037-008-015-12 | 34.6 | 1224.5
14:00:42:febtest:INFO: 28-03 | XA-000-09-004-037-008-018-11 | 37.7 | 1201.0
14:00:42:febtest:INFO: 19-04 | XA-000-09-004-037-002-015-03 | 40.9 | 1195.1
14:00:42:febtest:INFO: 26-05 | XA-000-09-004-037-011-015-02 | 31.4 | 1236.2
14:00:43:febtest:INFO: 17-06 | XA-000-09-004-037-014-016-14 | 28.2 | 1259.6
14:00:43:febtest:INFO: 24-07 | XA-000-09-004-037-005-015-11 | 40.9 | 1195.1
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_07_28-13_59_21
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4215| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5770', '1.850', '2.2840']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9850', '1.849', '2.5530']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9540', '1.850', '0.5195']