Go Back
FEB_4218 25.08.25 15:57:08
Info
15:57:08:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:57:08:ST3_Shared:INFO: FEB-Microcable
15:57:08:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:57:08:febtest:INFO: Testing FEB with SN 4218
15:57:10:smx_tester:INFO: Scanning setup
15:57:10:elinks:INFO: Disabling clock on downlink 0
15:57:10:elinks:INFO: Disabling clock on downlink 1
15:57:10:elinks:INFO: Disabling clock on downlink 2
15:57:10:elinks:INFO: Disabling clock on downlink 3
15:57:10:elinks:INFO: Disabling clock on downlink 4
15:57:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:57:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:57:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:57:10:elinks:INFO: Disabling clock on downlink 0
15:57:10:elinks:INFO: Disabling clock on downlink 1
15:57:10:elinks:INFO: Disabling clock on downlink 2
15:57:10:elinks:INFO: Disabling clock on downlink 3
15:57:10:elinks:INFO: Disabling clock on downlink 4
15:57:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:57:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:57:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:57:10:elinks:INFO: Disabling clock on downlink 0
15:57:10:elinks:INFO: Disabling clock on downlink 1
15:57:10:elinks:INFO: Disabling clock on downlink 2
15:57:10:elinks:INFO: Disabling clock on downlink 3
15:57:10:elinks:INFO: Disabling clock on downlink 4
15:57:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:57:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:57:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
15:57:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
15:57:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
15:57:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
15:57:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
15:57:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
15:57:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
15:57:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
15:57:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
15:57:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
15:57:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
15:57:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
15:57:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
15:57:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
15:57:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
15:57:10:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
15:57:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:57:10:elinks:INFO: Disabling clock on downlink 0
15:57:10:elinks:INFO: Disabling clock on downlink 1
15:57:10:elinks:INFO: Disabling clock on downlink 2
15:57:10:elinks:INFO: Disabling clock on downlink 3
15:57:10:elinks:INFO: Disabling clock on downlink 4
15:57:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:57:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:57:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:57:10:elinks:INFO: Disabling clock on downlink 0
15:57:10:elinks:INFO: Disabling clock on downlink 1
15:57:10:elinks:INFO: Disabling clock on downlink 2
15:57:10:elinks:INFO: Disabling clock on downlink 3
15:57:10:elinks:INFO: Disabling clock on downlink 4
15:57:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:57:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:57:10:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:57:10:setup_element:INFO: Scanning clock phase
15:57:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:57:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:57:11:setup_element:INFO: Clock phase scan results for group 0, downlink 2
15:57:11:setup_element:INFO: Eye window for uplink 16: _________________________________________________________________________XXXXX__
Clock Delay: 35
15:57:11:setup_element:INFO: Eye window for uplink 17: _________________________________________________________________________XXXXX__
Clock Delay: 35
15:57:11:setup_element:INFO: Eye window for uplink 18: _________________________________________________________________________XXXXXX_
Clock Delay: 35
15:57:11:setup_element:INFO: Eye window for uplink 19: _________________________________________________________________________XXXXXX_
Clock Delay: 35
15:57:11:setup_element:INFO: Eye window for uplink 20: _________________________________________________________________________XXXXXX_
Clock Delay: 35
15:57:11:setup_element:INFO: Eye window for uplink 21: _________________________________________________________________________XXXXXX_
Clock Delay: 35
15:57:11:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXX___
Clock Delay: 33
15:57:11:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXX___
Clock Delay: 33
15:57:11:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________XXXXX___
Clock Delay: 34
15:57:11:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________XXXXX___
Clock Delay: 34
15:57:11:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________XXXXXX__
Clock Delay: 34
15:57:11:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________XXXXXX__
Clock Delay: 34
15:57:11:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXX___
Clock Delay: 33
15:57:11:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXX___
Clock Delay: 33
15:57:11:setup_element:INFO: Eye window for uplink 30: _________________________________________________________________________XXXXX__
Clock Delay: 35
15:57:11:setup_element:INFO: Eye window for uplink 31: _________________________________________________________________________XXXXX__
Clock Delay: 35
15:57:11:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
15:57:11:setup_element:INFO: Scanning data phases
15:57:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:57:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:57:16:setup_element:INFO: Data phase scan results for group 0, downlink 2
15:57:16:setup_element:INFO: Eye window for uplink 16: XXX_________________________________XXXX
Data delay found: 19
15:57:16:setup_element:INFO: Eye window for uplink 17: XX_________________________________XXXXX
Data delay found: 18
15:57:16:setup_element:INFO: Eye window for uplink 18: _XXXXX__________________________________
Data delay found: 23
15:57:16:setup_element:INFO: Eye window for uplink 19: _XXXXX__________________________________
Data delay found: 23
15:57:16:setup_element:INFO: Eye window for uplink 20: XXXXX__________________________________X
Data delay found: 21
15:57:16:setup_element:INFO: Eye window for uplink 21: _XXXXX__________________________________
Data delay found: 23
15:57:16:setup_element:INFO: Eye window for uplink 22: ___________________________________XXXX_
Data delay found: 16
15:57:16:setup_element:INFO: Eye window for uplink 23: ________________________________XXXXX___
Data delay found: 14
15:57:16:setup_element:INFO: Eye window for uplink 24: ________XXXXXX__________________________
Data delay found: 30
15:57:16:setup_element:INFO: Eye window for uplink 25: __________XXXXXX________________________
Data delay found: 32
15:57:16:setup_element:INFO: Eye window for uplink 26: __________XXXXXX________________________
Data delay found: 32
15:57:16:setup_element:INFO: Eye window for uplink 27: ____________XXXXXX______________________
Data delay found: 34
15:57:16:setup_element:INFO: Eye window for uplink 28: ____________XXXXXX______________________
Data delay found: 34
15:57:16:setup_element:INFO: Eye window for uplink 29: ____________XXXXX_______________________
Data delay found: 34
15:57:16:setup_element:INFO: Eye window for uplink 30: __________________XXXXXX________________
Data delay found: 0
15:57:16:setup_element:INFO: Eye window for uplink 31: __________________XXXX__________________
Data delay found: 39
15:57:16:setup_element:INFO: Setting the data phase to 19 for uplink 16
15:57:16:setup_element:INFO: Setting the data phase to 18 for uplink 17
15:57:16:setup_element:INFO: Setting the data phase to 23 for uplink 18
15:57:16:setup_element:INFO: Setting the data phase to 23 for uplink 19
15:57:16:setup_element:INFO: Setting the data phase to 21 for uplink 20
15:57:16:setup_element:INFO: Setting the data phase to 23 for uplink 21
15:57:16:setup_element:INFO: Setting the data phase to 16 for uplink 22
15:57:16:setup_element:INFO: Setting the data phase to 14 for uplink 23
15:57:16:setup_element:INFO: Setting the data phase to 30 for uplink 24
15:57:16:setup_element:INFO: Setting the data phase to 32 for uplink 25
15:57:16:setup_element:INFO: Setting the data phase to 32 for uplink 26
15:57:16:setup_element:INFO: Setting the data phase to 34 for uplink 27
15:57:16:setup_element:INFO: Setting the data phase to 34 for uplink 28
15:57:16:setup_element:INFO: Setting the data phase to 34 for uplink 29
15:57:16:setup_element:INFO: Setting the data phase to 0 for uplink 30
15:57:16:setup_element:INFO: Setting the data phase to 39 for uplink 31
15:57:16:setup_element:INFO: Beginning SMX ASICs map scan
15:57:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:57:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:57:16:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:57:16:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:57:16:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
15:57:16:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
15:57:16:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
15:57:16:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
15:57:16:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
15:57:16:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
15:57:16:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
15:57:16:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
15:57:17:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
15:57:17:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
15:57:17:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
15:57:17:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
15:57:17:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
15:57:17:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
15:57:17:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
15:57:17:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
15:57:17:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
15:57:19:setup_element:INFO: Performing Elink synchronization
15:57:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:57:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:57:19:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:57:19:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:57:19:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
15:57:19:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
15:57:19:febtest:INFO: Init all SMX (CSA): 30
15:57:33:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:57:34:febtest:INFO: 23-00 | XA-000-09-004-024-009-018-02 | 15.6 | 1236.2
15:57:34:febtest:INFO: 30-01 | XA-000-09-004-024-012-020-09 | 31.4 | 1195.1
15:57:34:febtest:INFO: 21-02 | XA-000-09-004-024-018-019-12 | 31.4 | 1183.3
15:57:34:febtest:INFO: 28-03 | XA-000-09-004-024-006-018-06 | 40.9 | 1165.6
15:57:34:febtest:INFO: 19-04 | XA-000-09-004-024-018-020-12 | 21.9 | 1218.6
15:57:35:febtest:INFO: 26-05 | XA-000-09-004-024-015-019-07 | 31.4 | 1189.2
15:57:35:febtest:INFO: 17-06 | XA-000-09-004-024-003-016-13 | 40.9 | 1165.6
15:57:35:febtest:INFO: 24-07 | XA-000-09-004-024-015-020-07 | 40.9 | 1171.5
15:57:36:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
15:57:38:ST3_smx:INFO: chip: 23-0 15.590880 C 1253.730060 mV
15:57:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:57:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:57:38:ST3_smx:INFO: Electrons
15:57:38:ST3_smx:INFO: # loops 0
15:57:40:ST3_smx:INFO: # loops 1
15:57:41:ST3_smx:INFO: # loops 2
15:57:43:ST3_smx:INFO: Total # of broken channels: 0
15:57:43:ST3_smx:INFO: List of broken channels: []
15:57:43:ST3_smx:INFO: Total # of broken channels: 0
15:57:43:ST3_smx:INFO: List of broken channels: []
15:57:45:ST3_smx:INFO: chip: 30-1 31.389742 C 1212.728715 mV
15:57:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:57:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:57:45:ST3_smx:INFO: Electrons
15:57:45:ST3_smx:INFO: # loops 0
15:57:46:ST3_smx:INFO: # loops 1
15:57:48:ST3_smx:INFO: # loops 2
15:57:50:ST3_smx:INFO: Total # of broken channels: 0
15:57:50:ST3_smx:INFO: List of broken channels: []
15:57:50:ST3_smx:INFO: Total # of broken channels: 0
15:57:50:ST3_smx:INFO: List of broken channels: []
15:57:52:ST3_smx:INFO: chip: 21-2 34.556970 C 1195.082160 mV
15:57:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:57:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:57:52:ST3_smx:INFO: Electrons
15:57:52:ST3_smx:INFO: # loops 0
15:57:53:ST3_smx:INFO: # loops 1
15:57:55:ST3_smx:INFO: # loops 2
15:57:56:ST3_smx:INFO: Total # of broken channels: 0
15:57:56:ST3_smx:INFO: List of broken channels: []
15:57:56:ST3_smx:INFO: Total # of broken channels: 0
15:57:56:ST3_smx:INFO: List of broken channels: []
15:57:58:ST3_smx:INFO: chip: 28-3 44.073563 C 1177.390875 mV
15:57:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:57:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:57:58:ST3_smx:INFO: Electrons
15:57:58:ST3_smx:INFO: # loops 0
15:57:59:ST3_smx:INFO: # loops 1
15:58:01:ST3_smx:INFO: # loops 2
15:58:03:ST3_smx:INFO: Total # of broken channels: 0
15:58:03:ST3_smx:INFO: List of broken channels: []
15:58:03:ST3_smx:INFO: Total # of broken channels: 6
15:58:03:ST3_smx:INFO: List of broken channels: [1, 3, 5, 13, 15, 17]
15:58:04:ST3_smx:INFO: chip: 19-4 21.902970 C 1230.330540 mV
15:58:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:58:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:58:04:ST3_smx:INFO: Electrons
15:58:04:ST3_smx:INFO: # loops 0
15:58:06:ST3_smx:INFO: # loops 1
15:58:08:ST3_smx:INFO: # loops 2
15:58:09:ST3_smx:INFO: Total # of broken channels: 0
15:58:09:ST3_smx:INFO: List of broken channels: []
15:58:09:ST3_smx:INFO: Total # of broken channels: 0
15:58:09:ST3_smx:INFO: List of broken channels: []
15:58:11:ST3_smx:INFO: chip: 26-5 34.556970 C 1200.969315 mV
15:58:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:58:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:58:11:ST3_smx:INFO: Electrons
15:58:11:ST3_smx:INFO: # loops 0
15:58:12:ST3_smx:INFO: # loops 1
15:58:14:ST3_smx:INFO: # loops 2
15:58:15:ST3_smx:INFO: Total # of broken channels: 0
15:58:15:ST3_smx:INFO: List of broken channels: []
15:58:15:ST3_smx:INFO: Total # of broken channels: 0
15:58:15:ST3_smx:INFO: List of broken channels: []
15:58:17:ST3_smx:INFO: chip: 17-6 40.898880 C 1177.390875 mV
15:58:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:58:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:58:17:ST3_smx:INFO: Electrons
15:58:17:ST3_smx:INFO: # loops 0
15:58:19:ST3_smx:INFO: # loops 1
15:58:20:ST3_smx:INFO: # loops 2
15:58:22:ST3_smx:INFO: Total # of broken channels: 0
15:58:22:ST3_smx:INFO: List of broken channels: []
15:58:22:ST3_smx:INFO: Total # of broken channels: 0
15:58:22:ST3_smx:INFO: List of broken channels: []
15:58:23:ST3_smx:INFO: chip: 24-7 44.073563 C 1183.292940 mV
15:58:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:58:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:58:23:ST3_smx:INFO: Electrons
15:58:23:ST3_smx:INFO: # loops 0
15:58:25:ST3_smx:INFO: # loops 1
15:58:26:ST3_smx:INFO: # loops 2
15:58:28:ST3_smx:INFO: Total # of broken channels: 0
15:58:28:ST3_smx:INFO: List of broken channels: []
15:58:28:ST3_smx:INFO: Total # of broken channels: 0
15:58:28:ST3_smx:INFO: List of broken channels: []
15:58:28:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:58:28:febtest:INFO: 23-00 | XA-000-09-004-024-009-018-02 | 18.7 | 1271.2
15:58:29:febtest:INFO: 30-01 | XA-000-09-004-024-012-020-09 | 34.6 | 1236.2
15:58:29:febtest:INFO: 21-02 | XA-000-09-004-024-018-019-12 | 34.6 | 1218.6
15:58:29:febtest:INFO: 28-03 | XA-000-09-004-024-006-018-06 | 44.1 | 1195.1
15:58:29:febtest:INFO: 19-04 | XA-000-09-004-024-018-020-12 | 25.1 | 1253.7
15:58:29:febtest:INFO: 26-05 | XA-000-09-004-024-015-019-07 | 37.7 | 1224.5
15:58:30:febtest:INFO: 17-06 | XA-000-09-004-024-003-016-13 | 44.1 | 1195.1
15:58:30:febtest:INFO: 24-07 | XA-000-09-004-024-015-020-07 | 47.3 | 1212.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_08_25-15_57_08
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4218| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.449', '1.4970', '1.849', '2.1290']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0470', '1.850', '2.5280']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0110', '1.850', '0.5240']