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FEB_4220 26.08.25 11:54:52
Info
11:54:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:54:52:ST3_Shared:INFO: FEB-Microcable
11:54:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:54:52:febtest:INFO: Testing FEB with SN 4220
11:54:53:smx_tester:INFO: Scanning setup
11:54:53:elinks:INFO: Disabling clock on downlink 0
11:54:53:elinks:INFO: Disabling clock on downlink 1
11:54:53:elinks:INFO: Disabling clock on downlink 2
11:54:53:elinks:INFO: Disabling clock on downlink 3
11:54:53:elinks:INFO: Disabling clock on downlink 4
11:54:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:54:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:54:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:54:53:elinks:INFO: Disabling clock on downlink 0
11:54:53:elinks:INFO: Disabling clock on downlink 1
11:54:53:elinks:INFO: Disabling clock on downlink 2
11:54:53:elinks:INFO: Disabling clock on downlink 3
11:54:53:elinks:INFO: Disabling clock on downlink 4
11:54:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:54:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:54:53:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:54:53:elinks:INFO: Disabling clock on downlink 0
11:54:53:elinks:INFO: Disabling clock on downlink 1
11:54:53:elinks:INFO: Disabling clock on downlink 2
11:54:53:elinks:INFO: Disabling clock on downlink 3
11:54:53:elinks:INFO: Disabling clock on downlink 4
11:54:53:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:54:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
11:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
11:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
11:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
11:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
11:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
11:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
11:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
11:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:54:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:54:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:54:54:elinks:INFO: Disabling clock on downlink 0
11:54:54:elinks:INFO: Disabling clock on downlink 1
11:54:54:elinks:INFO: Disabling clock on downlink 2
11:54:54:elinks:INFO: Disabling clock on downlink 3
11:54:54:elinks:INFO: Disabling clock on downlink 4
11:54:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:54:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:54:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:54:54:elinks:INFO: Disabling clock on downlink 0
11:54:54:elinks:INFO: Disabling clock on downlink 1
11:54:54:elinks:INFO: Disabling clock on downlink 2
11:54:54:elinks:INFO: Disabling clock on downlink 3
11:54:54:elinks:INFO: Disabling clock on downlink 4
11:54:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:54:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:54:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:54:54:setup_element:INFO: Scanning clock phase
11:54:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:54:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:54:54:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:54:54:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________XXXXX___
Clock Delay: 34
11:54:54:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________XXXXX___
Clock Delay: 34
11:54:54:setup_element:INFO: Eye window for uplink 18: _________________________________________________________________________XXXXX__
Clock Delay: 35
11:54:54:setup_element:INFO: Eye window for uplink 19: _________________________________________________________________________XXXXX__
Clock Delay: 35
11:54:54:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:54:54:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:54:54:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:54:54:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:54:54:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXX____
Clock Delay: 33
11:54:54:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXX____
Clock Delay: 33
11:54:54:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:54:54:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:54:54:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXX____
Clock Delay: 33
11:54:54:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXX____
Clock Delay: 33
11:54:54:setup_element:INFO: Eye window for uplink 30: _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:54:54:setup_element:INFO: Eye window for uplink 31: _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:54:54:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
11:54:54:setup_element:INFO: Scanning data phases
11:54:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:54:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:54:59:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:54:59:setup_element:INFO: Eye window for uplink 16: X__________________________________XXXXX
Data delay found: 17
11:54:59:setup_element:INFO: Eye window for uplink 17: ___________________________________XXXX_
Data delay found: 16
11:54:59:setup_element:INFO: Eye window for uplink 18: XXXX__________________________________XX
Data delay found: 20
11:54:59:setup_element:INFO: Eye window for uplink 19: XXXXX_________________________________XX
Data delay found: 21
11:54:59:setup_element:INFO: Eye window for uplink 20: XXX_________________________________XXXX
Data delay found: 19
11:54:59:setup_element:INFO: Eye window for uplink 21: XXXX_________________________________XXX
Data delay found: 20
11:54:59:setup_element:INFO: Eye window for uplink 22: X__________________________________XXXX_
Data delay found: 17
11:54:59:setup_element:INFO: Eye window for uplink 23: ________________________________XXXXX___
Data delay found: 14
11:54:59:setup_element:INFO: Eye window for uplink 24: _______XXXXXX___________________________
Data delay found: 29
11:54:59:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
11:54:59:setup_element:INFO: Eye window for uplink 26: ________XXXXXXX_________________________
Data delay found: 31
11:54:59:setup_element:INFO: Eye window for uplink 27: __________XXXXXXX_______________________
Data delay found: 33
11:54:59:setup_element:INFO: Eye window for uplink 28: _______________XXXXX____________________
Data delay found: 37
11:54:59:setup_element:INFO: Eye window for uplink 29: _______________XXXX_____________________
Data delay found: 36
11:54:59:setup_element:INFO: Eye window for uplink 30: __________________XXXXXX________________
Data delay found: 0
11:54:59:setup_element:INFO: Eye window for uplink 31: _________________XXXXX__________________
Data delay found: 39
11:54:59:setup_element:INFO: Setting the data phase to 17 for uplink 16
11:54:59:setup_element:INFO: Setting the data phase to 16 for uplink 17
11:54:59:setup_element:INFO: Setting the data phase to 20 for uplink 18
11:54:59:setup_element:INFO: Setting the data phase to 21 for uplink 19
11:54:59:setup_element:INFO: Setting the data phase to 19 for uplink 20
11:54:59:setup_element:INFO: Setting the data phase to 20 for uplink 21
11:54:59:setup_element:INFO: Setting the data phase to 17 for uplink 22
11:54:59:setup_element:INFO: Setting the data phase to 14 for uplink 23
11:54:59:setup_element:INFO: Setting the data phase to 29 for uplink 24
11:54:59:setup_element:INFO: Setting the data phase to 31 for uplink 25
11:54:59:setup_element:INFO: Setting the data phase to 31 for uplink 26
11:54:59:setup_element:INFO: Setting the data phase to 33 for uplink 27
11:54:59:setup_element:INFO: Setting the data phase to 37 for uplink 28
11:54:59:setup_element:INFO: Setting the data phase to 36 for uplink 29
11:54:59:setup_element:INFO: Setting the data phase to 0 for uplink 30
11:54:59:setup_element:INFO: Setting the data phase to 39 for uplink 31
11:54:59:setup_element:INFO: Beginning SMX ASICs map scan
11:54:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:54:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:54:59:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:54:59:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:54:59:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:55:00:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
11:55:00:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
11:55:00:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:55:00:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:55:00:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:55:00:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:55:00:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:55:00:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:55:00:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:55:00:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:55:00:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:55:00:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:55:01:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:55:01:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:55:01:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:55:01:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:55:02:setup_element:INFO: Performing Elink synchronization
11:55:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:55:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:55:02:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:55:02:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:55:02:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:55:02:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:55:03:febtest:INFO: Init all SMX (CSA): 30
11:55:18:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:55:18:febtest:INFO: 23-00 | XA-000-09-004-024-003-015-10 | 31.4 | 1189.2
11:55:18:febtest:INFO: 30-01 | XA-000-09-004-024-015-017-07 | 28.2 | 1189.2
11:55:18:febtest:INFO: 21-02 | XA-000-09-004-024-003-014-10 | 40.9 | 1147.8
11:55:18:febtest:INFO: 28-03 | XA-000-09-004-024-012-017-09 | 37.7 | 1165.6
11:55:19:febtest:INFO: 19-04 | XA-000-09-004-024-018-016-12 | 21.9 | 1212.7
11:55:19:febtest:INFO: 26-05 | XA-000-09-004-024-012-016-09 | 34.6 | 1183.3
11:55:19:febtest:INFO: 17-06 | XA-000-09-004-024-006-015-01 | 34.6 | 1177.4
11:55:19:febtest:INFO: 24-07 | XA-000-09-004-024-015-016-07 | 40.9 | 1159.7
11:55:20:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:55:22:ST3_smx:INFO: chip: 23-0 31.389742 C 1206.851500 mV
11:55:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:55:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:55:22:ST3_smx:INFO: Electrons
11:55:22:ST3_smx:INFO: # loops 0
11:55:24:ST3_smx:INFO: # loops 1
11:55:25:ST3_smx:INFO: # loops 2
11:55:27:ST3_smx:INFO: Total # of broken channels: 0
11:55:27:ST3_smx:INFO: List of broken channels: []
11:55:27:ST3_smx:INFO: Total # of broken channels: 0
11:55:27:ST3_smx:INFO: List of broken channels: []
11:55:29:ST3_smx:INFO: chip: 30-1 25.062742 C 1206.851500 mV
11:55:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:55:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:55:29:ST3_smx:INFO: Electrons
11:55:29:ST3_smx:INFO: # loops 0
11:55:30:ST3_smx:INFO: # loops 1
11:55:32:ST3_smx:INFO: # loops 2
11:55:34:ST3_smx:INFO: Total # of broken channels: 0
11:55:34:ST3_smx:INFO: List of broken channels: []
11:55:34:ST3_smx:INFO: Total # of broken channels: 0
11:55:34:ST3_smx:INFO: List of broken channels: []
11:55:36:ST3_smx:INFO: chip: 21-2 40.898880 C 1159.654860 mV
11:55:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:55:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:55:36:ST3_smx:INFO: Electrons
11:55:36:ST3_smx:INFO: # loops 0
11:55:37:ST3_smx:INFO: # loops 1
11:55:39:ST3_smx:INFO: # loops 2
11:55:41:ST3_smx:INFO: Total # of broken channels: 0
11:55:41:ST3_smx:INFO: List of broken channels: []
11:55:41:ST3_smx:INFO: Total # of broken channels: 1
11:55:41:ST3_smx:INFO: List of broken channels: [6]
11:55:43:ST3_smx:INFO: chip: 28-3 37.726682 C 1183.292940 mV
11:55:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:55:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:55:43:ST3_smx:INFO: Electrons
11:55:43:ST3_smx:INFO: # loops 0
11:55:44:ST3_smx:INFO: # loops 1
11:55:46:ST3_smx:INFO: # loops 2
11:55:48:ST3_smx:INFO: Total # of broken channels: 1
11:55:48:ST3_smx:INFO: List of broken channels: [0]
11:55:48:ST3_smx:INFO: Total # of broken channels: 1
11:55:48:ST3_smx:INFO: List of broken channels: [0]
11:55:49:ST3_smx:INFO: chip: 19-4 25.062742 C 1218.600960 mV
11:55:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:55:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:55:49:ST3_smx:INFO: Electrons
11:55:49:ST3_smx:INFO: # loops 0
11:55:51:ST3_smx:INFO: # loops 1
11:55:52:ST3_smx:INFO: # loops 2
11:55:54:ST3_smx:INFO: Total # of broken channels: 0
11:55:54:ST3_smx:INFO: List of broken channels: []
11:55:54:ST3_smx:INFO: Total # of broken channels: 0
11:55:54:ST3_smx:INFO: List of broken channels: []
11:55:56:ST3_smx:INFO: chip: 26-5 34.556970 C 1195.082160 mV
11:55:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:55:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:55:56:ST3_smx:INFO: Electrons
11:55:56:ST3_smx:INFO: # loops 0
11:55:58:ST3_smx:INFO: # loops 1
11:55:59:ST3_smx:INFO: # loops 2
11:56:01:ST3_smx:INFO: Total # of broken channels: 0
11:56:01:ST3_smx:INFO: List of broken channels: []
11:56:01:ST3_smx:INFO: Total # of broken channels: 5
11:56:01:ST3_smx:INFO: List of broken channels: [1, 3, 5, 7, 9]
11:56:03:ST3_smx:INFO: chip: 17-6 37.726682 C 1189.190035 mV
11:56:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:56:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:56:03:ST3_smx:INFO: Electrons
11:56:03:ST3_smx:INFO: # loops 0
11:56:05:ST3_smx:INFO: # loops 1
11:56:06:ST3_smx:INFO: # loops 2
11:56:08:ST3_smx:INFO: Total # of broken channels: 0
11:56:08:ST3_smx:INFO: List of broken channels: []
11:56:08:ST3_smx:INFO: Total # of broken channels: 0
11:56:08:ST3_smx:INFO: List of broken channels: []
11:56:10:ST3_smx:INFO: chip: 24-7 44.073563 C 1183.292940 mV
11:56:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:56:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:56:10:ST3_smx:INFO: Electrons
11:56:10:ST3_smx:INFO: # loops 0
11:56:11:ST3_smx:INFO: # loops 1
11:56:13:ST3_smx:INFO: # loops 2
11:56:15:ST3_smx:INFO: Total # of broken channels: 0
11:56:15:ST3_smx:INFO: List of broken channels: []
11:56:15:ST3_smx:INFO: Total # of broken channels: 0
11:56:15:ST3_smx:INFO: List of broken channels: []
11:56:15:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:56:15:febtest:INFO: 23-00 | XA-000-09-004-024-003-015-10 | 28.2 | 1265.4
11:56:15:febtest:INFO: 30-01 | XA-000-09-004-024-015-017-07 | 28.2 | 1230.3
11:56:16:febtest:INFO: 21-02 | XA-000-09-004-024-003-014-10 | 44.1 | 1183.3
11:56:16:febtest:INFO: 28-03 | XA-000-09-004-024-012-017-09 | 40.9 | 1201.0
11:56:16:febtest:INFO: 19-04 | XA-000-09-004-024-018-016-12 | 25.1 | 1242.0
11:56:16:febtest:INFO: 26-05 | XA-000-09-004-024-012-016-09 | 37.7 | 1218.6
11:56:16:febtest:INFO: 17-06 | XA-000-09-004-024-006-015-01 | 37.7 | 1212.7
11:56:16:febtest:INFO: 24-07 | XA-000-09-004-024-015-016-07 | 40.9 | 1259.6
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_08_26-11_54_52
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4220| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5910', '1.847', '2.4580']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0100', '1.850', '2.4670']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9720', '1.850', '0.5197']