Go Back
FEB_4222 07.08.25 11:57:26
TextEdit.txt
11:57:26:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:57:26:ST3_Shared:INFO: FEB-Microcable
11:57:26:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:57:26:febtest:INFO: Testing FEB with SN 4222
11:57:28:smx_tester:INFO: Scanning setup
11:57:28:elinks:INFO: Disabling clock on downlink 0
11:57:28:elinks:INFO: Disabling clock on downlink 1
11:57:28:elinks:INFO: Disabling clock on downlink 2
11:57:28:elinks:INFO: Disabling clock on downlink 3
11:57:28:elinks:INFO: Disabling clock on downlink 4
11:57:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:57:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:57:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:57:28:elinks:INFO: Disabling clock on downlink 0
11:57:28:elinks:INFO: Disabling clock on downlink 1
11:57:28:elinks:INFO: Disabling clock on downlink 2
11:57:28:elinks:INFO: Disabling clock on downlink 3
11:57:28:elinks:INFO: Disabling clock on downlink 4
11:57:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:57:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:57:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:57:28:elinks:INFO: Disabling clock on downlink 0
11:57:28:elinks:INFO: Disabling clock on downlink 1
11:57:28:elinks:INFO: Disabling clock on downlink 2
11:57:28:elinks:INFO: Disabling clock on downlink 3
11:57:28:elinks:INFO: Disabling clock on downlink 4
11:57:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:57:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:57:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:57:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:57:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:57:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:57:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:57:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:57:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:57:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:57:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:57:28:elinks:INFO: Disabling clock on downlink 0
11:57:28:elinks:INFO: Disabling clock on downlink 1
11:57:28:elinks:INFO: Disabling clock on downlink 2
11:57:28:elinks:INFO: Disabling clock on downlink 3
11:57:28:elinks:INFO: Disabling clock on downlink 4
11:57:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:57:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:57:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:57:28:elinks:INFO: Disabling clock on downlink 0
11:57:28:elinks:INFO: Disabling clock on downlink 1
11:57:28:elinks:INFO: Disabling clock on downlink 2
11:57:28:elinks:INFO: Disabling clock on downlink 3
11:57:28:elinks:INFO: Disabling clock on downlink 4
11:57:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:57:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:57:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:57:29:setup_element:INFO: Scanning clock phase
11:57:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:57:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:57:29:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:57:29:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:57:29:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:57:29:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:57:29:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:57:29:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:57:29:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:57:29:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXX_____
Clock Delay: 32
11:57:29:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXX_____
Clock Delay: 32
11:57:29:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
11:57:29:setup_element:INFO: Scanning data phases
11:57:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:57:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:57:34:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:57:34:setup_element:INFO: Eye window for uplink 24: _________XXXXXX_________________________
Data delay found: 31
11:57:34:setup_element:INFO: Eye window for uplink 25: ___________XXXXX________________________
Data delay found: 33
11:57:34:setup_element:INFO: Eye window for uplink 26: __________XXXXXX________________________
Data delay found: 32
11:57:34:setup_element:INFO: Eye window for uplink 27: ____________XXXXXXX_____________________
Data delay found: 35
11:57:34:setup_element:INFO: Eye window for uplink 28: ______________XXXXXXX___________________
Data delay found: 37
11:57:34:setup_element:INFO: Eye window for uplink 29: ______________XXXXXX____________________
Data delay found: 36
11:57:34:setup_element:INFO: Eye window for uplink 30: ______________XXXXXXX___________________
Data delay found: 37
11:57:34:setup_element:INFO: Eye window for uplink 31: ______________XXXX______________________
Data delay found: 35
11:57:34:setup_element:INFO: Setting the data phase to 31 for uplink 24
11:57:34:setup_element:INFO: Setting the data phase to 33 for uplink 25
11:57:34:setup_element:INFO: Setting the data phase to 32 for uplink 26
11:57:34:setup_element:INFO: Setting the data phase to 35 for uplink 27
11:57:34:setup_element:INFO: Setting the data phase to 37 for uplink 28
11:57:34:setup_element:INFO: Setting the data phase to 36 for uplink 29
11:57:34:setup_element:INFO: Setting the data phase to 37 for uplink 30
11:57:34:setup_element:INFO: Setting the data phase to 35 for uplink 31
11:57:34:setup_element:INFO: Beginning SMX ASICs map scan
11:57:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:57:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:57:34:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:57:34:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:57:34:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
11:57:34:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:57:34:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:57:35:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:57:35:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:57:35:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:57:35:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:57:35:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:57:35:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:57:37:setup_element:INFO: Performing Elink synchronization
11:57:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:57:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:57:37:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:57:37:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:57:37:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:57:37:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:57:37:febtest:INFO: Init all SMX (CSA): 30
11:57:45:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:57:45:febtest:INFO: 30-01 | XA-000-09-004-024-013-024-04 | 18.7 | 1224.5
11:57:46:febtest:INFO: 28-03 | XA-000-09-004-024-013-025-04 | 28.2 | 1201.0
11:57:46:febtest:INFO: 26-05 | XA-000-09-004-024-010-025-12 | 47.3 | 1130.0
11:57:46:febtest:INFO: 24-07 | XA-000-09-004-024-007-025-11 | 34.6 | 1171.5
11:57:47:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:57:49:ST3_smx:INFO: chip: 30-1 18.745682 C 1236.187875 mV
11:57:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:57:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:57:49:ST3_smx:INFO: Electrons
11:57:49:ST3_smx:INFO: # loops 0
11:57:51:ST3_smx:INFO: # loops 1
11:57:53:ST3_smx:INFO: # loops 2
11:57:54:ST3_smx:INFO: Total # of broken channels: 0
11:57:54:ST3_smx:INFO: List of broken channels: []
11:57:54:ST3_smx:INFO: Total # of broken channels: 0
11:57:54:ST3_smx:INFO: List of broken channels: []
11:57:56:ST3_smx:INFO: chip: 28-3 28.225000 C 1212.728715 mV
11:57:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:57:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:57:56:ST3_smx:INFO: Electrons
11:57:56:ST3_smx:INFO: # loops 0
11:57:58:ST3_smx:INFO: # loops 1
11:58:00:ST3_smx:INFO: # loops 2
11:58:01:ST3_smx:INFO: Total # of broken channels: 0
11:58:01:ST3_smx:INFO: List of broken channels: []
11:58:01:ST3_smx:INFO: Total # of broken channels: 0
11:58:01:ST3_smx:INFO: List of broken channels: []
11:58:03:ST3_smx:INFO: chip: 26-5 47.250730 C 1135.937260 mV
11:58:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:03:ST3_smx:INFO: Electrons
11:58:03:ST3_smx:INFO: # loops 0
11:58:05:ST3_smx:INFO: # loops 1
11:58:07:ST3_smx:INFO: # loops 2
11:58:09:ST3_smx:INFO: Total # of broken channels: 0
11:58:09:ST3_smx:INFO: List of broken channels: []
11:58:09:ST3_smx:INFO: Total # of broken channels: 0
11:58:09:ST3_smx:INFO: List of broken channels: []
11:58:10:ST3_smx:INFO: chip: 24-7 34.556970 C 1177.390875 mV
11:58:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:58:10:ST3_smx:INFO: Electrons
11:58:10:ST3_smx:INFO: # loops 0
11:58:12:ST3_smx:INFO: # loops 1
11:58:14:ST3_smx:INFO: # loops 2
11:58:16:ST3_smx:INFO: Total # of broken channels: 0
11:58:16:ST3_smx:INFO: List of broken channels: []
11:58:16:ST3_smx:INFO: Total # of broken channels: 0
11:58:16:ST3_smx:INFO: List of broken channels: []
11:58:16:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:58:16:febtest:INFO: 30-01 | XA-000-09-004-024-013-024-04 | 21.9 | 1259.6
11:58:16:febtest:INFO: 28-03 | XA-000-09-004-024-013-025-04 | 31.4 | 1236.2
11:58:16:febtest:INFO: 26-05 | XA-000-09-004-024-010-025-12 | 50.4 | 1159.7
11:58:17:febtest:INFO: 24-07 | XA-000-09-004-024-007-025-11 | 37.7 | 1201.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_08_07-11_57_26
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4222| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.8029', '1.850', '1.5840']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0140', '1.850', '1.2820']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9899', '1.850', '0.2634']