DTL-STS tests database

FEB_4223 09.09.25 09:03:27

link: XA-000-09-004-024-006-022-06
...SMX_0.root
link: XA-000-09-004-024-015-022-07
...SMX_2.root
link: XA-000-09-004-024-003-020-13
...SMX_4.root
link: XA-000-09-004-024-009-022-02
...SMX_6.root
link: XA-000-09-004-024-006-021-06
...SMX_1.root
link: XA-000-09-004-024-003-022-13
...SMX_3.root
link: XA-000-09-004-024-012-021-09
...SMX_5.root
link: XA-000-09-004-024-003-021-13
...SMX_7.root
link: XA-000-09-004-024-003-021-13
...VddmCSAstatus.root
Info
            09:03:27:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:03:27:ST3_Shared:INFO:	                         FEB-Sensor                         
09:03:27:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:03:43:ST3_ModuleSelector:INFO:	New Sensor ID: 3302
09:03:44:ST3_ModuleSelector:INFO:	L3UL501014 M3UL5T0010140B2 42 C

09:03:44:ST3_ModuleSelector:INFO:	3302
09:03:44:febtest:INFO:	Testing FEB with SN 4223
09:03:46:smx_tester:INFO:	Scanning setup
09:03:46:elinks:INFO:	Disabling clock on downlink 0
09:03:46:elinks:INFO:	Disabling clock on downlink 1
09:03:46:elinks:INFO:	Disabling clock on downlink 2
09:03:46:elinks:INFO:	Disabling clock on downlink 3
09:03:46:elinks:INFO:	Disabling clock on downlink 4
09:03:46:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:03:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:03:46:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:03:46:elinks:INFO:	Disabling clock on downlink 0
09:03:46:elinks:INFO:	Disabling clock on downlink 1
09:03:46:elinks:INFO:	Disabling clock on downlink 2
09:03:46:elinks:INFO:	Disabling clock on downlink 3
09:03:46:elinks:INFO:	Disabling clock on downlink 4
09:03:46:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:03:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:03:46:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:03:46:elinks:INFO:	Disabling clock on downlink 0
09:03:46:elinks:INFO:	Disabling clock on downlink 1
09:03:46:elinks:INFO:	Disabling clock on downlink 2
09:03:46:elinks:INFO:	Disabling clock on downlink 3
09:03:46:elinks:INFO:	Disabling clock on downlink 4
09:03:46:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:03:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:03:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
09:03:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
09:03:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
09:03:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
09:03:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
09:03:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
09:03:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
09:03:47:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
09:03:47:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
09:03:47:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
09:03:47:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
09:03:47:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
09:03:47:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
09:03:47:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
09:03:47:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
09:03:47:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
09:03:47:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:03:47:elinks:INFO:	Disabling clock on downlink 0
09:03:47:elinks:INFO:	Disabling clock on downlink 1
09:03:47:elinks:INFO:	Disabling clock on downlink 2
09:03:47:elinks:INFO:	Disabling clock on downlink 3
09:03:47:elinks:INFO:	Disabling clock on downlink 4
09:03:47:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:03:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:03:47:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:03:47:elinks:INFO:	Disabling clock on downlink 0
09:03:47:elinks:INFO:	Disabling clock on downlink 1
09:03:47:elinks:INFO:	Disabling clock on downlink 2
09:03:47:elinks:INFO:	Disabling clock on downlink 3
09:03:47:elinks:INFO:	Disabling clock on downlink 4
09:03:47:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:03:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:03:47:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:03:47:setup_element:INFO:	Scanning clock phase
09:03:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:03:47:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:03:47:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
09:03:47:setup_element:INFO:	Eye window for uplink 16: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:03:47:setup_element:INFO:	Eye window for uplink 17: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:03:47:setup_element:INFO:	Eye window for uplink 18: ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:03:47:setup_element:INFO:	Eye window for uplink 19: ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:03:47:setup_element:INFO:	Eye window for uplink 20: _________________________________________________________________________XXXX___
Clock Delay: 34
09:03:47:setup_element:INFO:	Eye window for uplink 21: _________________________________________________________________________XXXX___
Clock Delay: 34
09:03:47:setup_element:INFO:	Eye window for uplink 22: ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:03:47:setup_element:INFO:	Eye window for uplink 23: ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:03:47:setup_element:INFO:	Eye window for uplink 24: _______________________________________________________________________XXXXX____
Clock Delay: 33
09:03:47:setup_element:INFO:	Eye window for uplink 25: _______________________________________________________________________XXXXX____
Clock Delay: 33
09:03:47:setup_element:INFO:	Eye window for uplink 26: _______________________________________________________________________XXXXX____
Clock Delay: 33
09:03:47:setup_element:INFO:	Eye window for uplink 27: _______________________________________________________________________XXXXX____
Clock Delay: 33
09:03:47:setup_element:INFO:	Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
09:03:47:setup_element:INFO:	Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
09:03:47:setup_element:INFO:	Eye window for uplink 30: _________________________________________________________________________XXXXX__
Clock Delay: 35
09:03:47:setup_element:INFO:	Eye window for uplink 31: _________________________________________________________________________XXXXX__
Clock Delay: 35
09:03:47:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 2
09:03:47:setup_element:INFO:	Scanning data phases
09:03:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:03:47:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:03:52:setup_element:INFO:	Data phase scan results for group 0, downlink 2
09:03:52:setup_element:INFO:	Eye window for uplink 16: X_________________________________XXXXXX
Data delay found: 17
09:03:52:setup_element:INFO:	Eye window for uplink 17: _________________________________XXXXXX_
Data delay found: 15
09:03:52:setup_element:INFO:	Eye window for uplink 18: X____________________________________XXX
Data delay found: 18
09:03:52:setup_element:INFO:	Eye window for uplink 19: XX__________________________________XXXX
Data delay found: 18
09:03:52:setup_element:INFO:	Eye window for uplink 20: XX_________________________________XXXXX
Data delay found: 18
09:03:52:setup_element:INFO:	Eye window for uplink 21: XXX_________________________________XXXX
Data delay found: 19
09:03:52:setup_element:INFO:	Eye window for uplink 22: X__________________________________XXXXX
Data delay found: 17
09:03:52:setup_element:INFO:	Eye window for uplink 23: ________________________________XXXXX___
Data delay found: 14
09:03:52:setup_element:INFO:	Eye window for uplink 24: _____XXXXXX_____________________________
Data delay found: 27
09:03:52:setup_element:INFO:	Eye window for uplink 25: ______XXXXXX____________________________
Data delay found: 28
09:03:52:setup_element:INFO:	Eye window for uplink 26: _____XXXXXXX____________________________
Data delay found: 28
09:03:52:setup_element:INFO:	Eye window for uplink 27: _______XXXXXXX__________________________
Data delay found: 30
09:03:52:setup_element:INFO:	Eye window for uplink 28: ______________XXXXXXX___________________
Data delay found: 37
09:03:52:setup_element:INFO:	Eye window for uplink 29: ______________XXXXXX____________________
Data delay found: 36
09:03:52:setup_element:INFO:	Eye window for uplink 30: _____________XXXXXXX____________________
Data delay found: 36
09:03:52:setup_element:INFO:	Eye window for uplink 31: _____________XXXX_______________________
Data delay found: 34
09:03:52:setup_element:INFO:	Setting the data phase to 17 for uplink 16
09:03:52:setup_element:INFO:	Setting the data phase to 15 for uplink 17
09:03:52:setup_element:INFO:	Setting the data phase to 18 for uplink 18
09:03:52:setup_element:INFO:	Setting the data phase to 18 for uplink 19
09:03:52:setup_element:INFO:	Setting the data phase to 18 for uplink 20
09:03:52:setup_element:INFO:	Setting the data phase to 19 for uplink 21
09:03:52:setup_element:INFO:	Setting the data phase to 17 for uplink 22
09:03:52:setup_element:INFO:	Setting the data phase to 14 for uplink 23
09:03:52:setup_element:INFO:	Setting the data phase to 27 for uplink 24
09:03:52:setup_element:INFO:	Setting the data phase to 28 for uplink 25
09:03:52:setup_element:INFO:	Setting the data phase to 28 for uplink 26
09:03:52:setup_element:INFO:	Setting the data phase to 30 for uplink 27
09:03:52:setup_element:INFO:	Setting the data phase to 37 for uplink 28
09:03:52:setup_element:INFO:	Setting the data phase to 36 for uplink 29
09:03:52:setup_element:INFO:	Setting the data phase to 36 for uplink 30
09:03:52:setup_element:INFO:	Setting the data phase to 34 for uplink 31
09:03:52:setup_element:INFO:	Beginning SMX ASICs map scan
09:03:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:03:52:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:03:52:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:03:52:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:03:52:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:03:52:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
09:03:52:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
09:03:53:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:03:53:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:03:53:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
09:03:53:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
09:03:53:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:03:53:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:03:53:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
09:03:53:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
09:03:53:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:03:53:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:03:53:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
09:03:53:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
09:03:54:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:03:54:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:03:55:setup_element:INFO:	Performing Elink synchronization
09:03:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:03:55:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:03:55:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:03:55:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:03:55:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
09:03:55:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:03:56:febtest:INFO:	Init all SMX (CSA): 30
09:04:11:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:04:11:febtest:INFO:	23-00 | XA-000-09-004-024-006-022-06 |  50.4 | 1112.1
09:04:11:febtest:INFO:	30-01 | XA-000-09-004-024-006-021-06 |  44.1 | 1153.7
09:04:11:febtest:INFO:	21-02 | XA-000-09-004-024-015-022-07 |  18.7 | 1230.3
09:04:12:febtest:INFO:	28-03 | XA-000-09-004-024-003-022-13 |  37.7 | 1183.3
09:04:12:febtest:INFO:	19-04 | XA-000-09-004-024-003-020-13 |  44.1 | 1141.9
09:04:12:febtest:INFO:	26-05 | XA-000-09-004-024-012-021-09 |  34.6 | 1183.3
09:04:12:febtest:INFO:	17-06 | XA-000-09-004-024-009-022-02 |  34.6 | 1183.3
09:04:13:febtest:INFO:	24-07 | XA-000-09-004-024-003-021-13 |  44.1 | 1159.7
09:04:14:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:04:15:ST3_smx:INFO:	chip: 23-0 	 53.612520 C 	 1124.048640 mV
09:04:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:04:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:04:15:ST3_smx:INFO:		Electrons
09:04:15:ST3_smx:INFO:	# loops 0
09:04:17:ST3_smx:INFO:	# loops 1
09:04:19:ST3_smx:INFO:	# loops 2
09:04:20:ST3_smx:INFO:	Total # of broken channels: 0
09:04:20:ST3_smx:INFO:	List of broken channels: []
09:04:20:ST3_smx:INFO:	Total # of broken channels: 0
09:04:20:ST3_smx:INFO:	List of broken channels: []
09:04:22:ST3_smx:INFO:	chip: 30-1 	 44.073563 C 	 1165.571835 mV
09:04:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:04:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:04:22:ST3_smx:INFO:		Electrons
09:04:22:ST3_smx:INFO:	# loops 0
09:04:24:ST3_smx:INFO:	# loops 1
09:04:26:ST3_smx:INFO:	# loops 2
09:04:27:ST3_smx:INFO:	Total # of broken channels: 0
09:04:27:ST3_smx:INFO:	List of broken channels: []
09:04:27:ST3_smx:INFO:	Total # of broken channels: 0
09:04:27:ST3_smx:INFO:	List of broken channels: []
09:04:29:ST3_smx:INFO:	chip: 21-2 	 18.745682 C 	 1242.040240 mV
09:04:29:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:04:29:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:04:29:ST3_smx:INFO:		Electrons
09:04:29:ST3_smx:INFO:	# loops 0
09:04:30:ST3_smx:INFO:	# loops 1
09:04:32:ST3_smx:INFO:	# loops 2
09:04:34:ST3_smx:INFO:	Total # of broken channels: 0
09:04:34:ST3_smx:INFO:	List of broken channels: []
09:04:34:ST3_smx:INFO:	Total # of broken channels: 0
09:04:34:ST3_smx:INFO:	List of broken channels: []
09:04:35:ST3_smx:INFO:	chip: 28-3 	 37.726682 C 	 1195.082160 mV
09:04:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:04:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:04:35:ST3_smx:INFO:		Electrons
09:04:35:ST3_smx:INFO:	# loops 0
09:04:37:ST3_smx:INFO:	# loops 1
09:04:39:ST3_smx:INFO:	# loops 2
09:04:41:ST3_smx:INFO:	Total # of broken channels: 0
09:04:41:ST3_smx:INFO:	List of broken channels: []
09:04:41:ST3_smx:INFO:	Total # of broken channels: 0
09:04:41:ST3_smx:INFO:	List of broken channels: []
09:04:42:ST3_smx:INFO:	chip: 19-4 	 47.250730 C 	 1153.732915 mV
09:04:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:04:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:04:42:ST3_smx:INFO:		Electrons
09:04:42:ST3_smx:INFO:	# loops 0
09:04:44:ST3_smx:INFO:	# loops 1
09:04:46:ST3_smx:INFO:	# loops 2
09:04:47:ST3_smx:INFO:	Total # of broken channels: 1
09:04:47:ST3_smx:INFO:	List of broken channels: [1]
09:04:47:ST3_smx:INFO:	Total # of broken channels: 1
09:04:47:ST3_smx:INFO:	List of broken channels: [1]
09:04:49:ST3_smx:INFO:	chip: 26-5 	 34.556970 C 	 1200.969315 mV
09:04:49:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:04:49:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:04:49:ST3_smx:INFO:		Electrons
09:04:49:ST3_smx:INFO:	# loops 0
09:04:50:ST3_smx:INFO:	# loops 1
09:04:52:ST3_smx:INFO:	# loops 2
09:04:54:ST3_smx:INFO:	Total # of broken channels: 0
09:04:54:ST3_smx:INFO:	List of broken channels: []
09:04:54:ST3_smx:INFO:	Total # of broken channels: 0
09:04:54:ST3_smx:INFO:	List of broken channels: []
09:04:55:ST3_smx:INFO:	chip: 17-6 	 34.556970 C 	 1189.190035 mV
09:04:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:04:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:04:55:ST3_smx:INFO:		Electrons
09:04:55:ST3_smx:INFO:	# loops 0
09:04:57:ST3_smx:INFO:	# loops 1
09:04:59:ST3_smx:INFO:	# loops 2
09:05:00:ST3_smx:INFO:	Total # of broken channels: 0
09:05:00:ST3_smx:INFO:	List of broken channels: []
09:05:00:ST3_smx:INFO:	Total # of broken channels: 0
09:05:00:ST3_smx:INFO:	List of broken channels: []
09:05:02:ST3_smx:INFO:	chip: 24-7 	 47.250730 C 	 1165.571835 mV
09:05:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:05:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:05:02:ST3_smx:INFO:		Electrons
09:05:02:ST3_smx:INFO:	# loops 0
09:05:04:ST3_smx:INFO:	# loops 1
09:05:05:ST3_smx:INFO:	# loops 2
09:05:07:ST3_smx:INFO:	Total # of broken channels: 0
09:05:07:ST3_smx:INFO:	List of broken channels: []
09:05:07:ST3_smx:INFO:	Total # of broken channels: 0
09:05:07:ST3_smx:INFO:	List of broken channels: []
09:05:07:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:05:07:febtest:INFO:	23-00 | XA-000-09-004-024-006-022-06 |  53.6 | 1147.8
09:05:07:febtest:INFO:	30-01 | XA-000-09-004-024-006-021-06 |  44.1 | 1189.2
09:05:08:febtest:INFO:	21-02 | XA-000-09-004-024-015-022-07 |  21.9 | 1259.6
09:05:08:febtest:INFO:	28-03 | XA-000-09-004-024-003-022-13 |  37.7 | 1230.3
09:05:08:febtest:INFO:	19-04 | XA-000-09-004-024-003-020-13 |  50.4 | 1177.4
09:05:08:febtest:INFO:	26-05 | XA-000-09-004-024-012-021-09 |  37.7 | 1224.5
09:05:09:febtest:INFO:	17-06 | XA-000-09-004-024-009-022-02 |  37.7 | 1212.7
09:05:09:febtest:INFO:	24-07 | XA-000-09-004-024-003-021-13 |  50.4 | 1189.2
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_09_09-09_03_27
OPERATOR  : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4223| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_ID:	3302
MODULE_NAME:	L3UL501014 M3UL5T0010140B2 42 C

MODULE_TYPE:	
MODULE_LADDER:	L3UL501014
MODULE_MODULE:	M3UL5T0010140B2
MODULE_SIZE:	42
MODULE_GRADE:	C
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4170', '1.847', '2.3270']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0360', '1.850', '2.5780']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9930', '1.850', '0.5250']
Comment