DTL-STS tests database

FEB_4228 11.09.25 07:42:05

link: XA-000-09-004-019-013-007-13
...SMX_0.root
link: XA-000-09-004-019-007-009-02
...SMX_2.root
link: XA-000-09-004-019-013-010-13
...SMX_4.root
link: XA-000-09-004-019-016-009-06
...SMX_6.root
link: XA-000-09-004-019-016-008-06
...SMX_1.root
link: XA-000-09-004-019-007-008-02
...SMX_3.root
link: XA-000-09-004-019-004-008-12
...SMX_5.root
link: XA-000-09-004-019-004-009-12
...SMX_7.root
link: XA-000-09-004-019-004-009-12
...VddmCSAstatus.root
Info
            07:42:05:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:42:05:ST3_Shared:INFO:	                         FEB-Sensor                         
07:42:05:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:42:25:ST3_ModuleSelector:INFO:	New Sensor ID: 
023
07:42:25:ST3_ModuleSelector:INFO:	New Sensor ID: 
0231
07:42:29:ST3_ModuleSelector:INFO:	New Sensor ID: 
023
07:42:32:ST3_ModuleSelector:INFO:	New Sensor ID: 
231
07:42:32:ST3_ModuleSelector:INFO:	New Sensor ID: 
2310
07:42:39:ST3_ModuleSelector:INFO:	http://web-docs.gsi.de/~dtl-sts/?m=module&n=M7UR4B0011390B2

07:42:39:ST3_ModuleSelector:INFO:	
2310
07:42:39:febtest:INFO:	Testing FEB with SN 4228
07:42:41:smx_tester:INFO:	Scanning setup
07:42:41:elinks:INFO:	Disabling clock on downlink 0
07:42:41:elinks:INFO:	Disabling clock on downlink 1
07:42:41:elinks:INFO:	Disabling clock on downlink 2
07:42:41:elinks:INFO:	Disabling clock on downlink 3
07:42:41:elinks:INFO:	Disabling clock on downlink 4
07:42:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:42:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
07:42:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:42:41:elinks:INFO:	Disabling clock on downlink 0
07:42:41:elinks:INFO:	Disabling clock on downlink 1
07:42:41:elinks:INFO:	Disabling clock on downlink 2
07:42:41:elinks:INFO:	Disabling clock on downlink 3
07:42:41:elinks:INFO:	Disabling clock on downlink 4
07:42:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:42:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
07:42:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:42:41:elinks:INFO:	Disabling clock on downlink 0
07:42:41:elinks:INFO:	Disabling clock on downlink 1
07:42:41:elinks:INFO:	Disabling clock on downlink 2
07:42:41:elinks:INFO:	Disabling clock on downlink 3
07:42:41:elinks:INFO:	Disabling clock on downlink 4
07:42:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:42:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:42:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
07:42:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
07:42:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
07:42:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
07:42:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
07:42:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
07:42:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
07:42:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
07:42:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
07:42:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
07:42:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
07:42:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
07:42:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
07:42:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
07:42:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
07:42:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
07:42:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:42:41:elinks:INFO:	Disabling clock on downlink 0
07:42:41:elinks:INFO:	Disabling clock on downlink 1
07:42:41:elinks:INFO:	Disabling clock on downlink 2
07:42:41:elinks:INFO:	Disabling clock on downlink 3
07:42:41:elinks:INFO:	Disabling clock on downlink 4
07:42:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:42:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
07:42:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:42:42:elinks:INFO:	Disabling clock on downlink 0
07:42:42:elinks:INFO:	Disabling clock on downlink 1
07:42:42:elinks:INFO:	Disabling clock on downlink 2
07:42:42:elinks:INFO:	Disabling clock on downlink 3
07:42:42:elinks:INFO:	Disabling clock on downlink 4
07:42:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
07:42:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
07:42:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
07:42:42:setup_element:INFO:	Scanning clock phase
07:42:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:42:42:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:42:42:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
07:42:42:setup_element:INFO:	Eye window for uplink 16: ________________________________________________________________________XXXXX___
Clock Delay: 34
07:42:42:setup_element:INFO:	Eye window for uplink 17: ________________________________________________________________________XXXXX___
Clock Delay: 34
07:42:42:setup_element:INFO:	Eye window for uplink 18: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:42:42:setup_element:INFO:	Eye window for uplink 19: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:42:42:setup_element:INFO:	Eye window for uplink 20: _______________________________________________________________________XXXXXX___
Clock Delay: 33
07:42:42:setup_element:INFO:	Eye window for uplink 21: _______________________________________________________________________XXXXXX___
Clock Delay: 33
07:42:42:setup_element:INFO:	Eye window for uplink 22: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:42:42:setup_element:INFO:	Eye window for uplink 23: ________________________________________________________________________XXXXXX__
Clock Delay: 34
07:42:42:setup_element:INFO:	Eye window for uplink 24: _______________________________________________________________________XXXXX____
Clock Delay: 33
07:42:42:setup_element:INFO:	Eye window for uplink 25: _______________________________________________________________________XXXXX____
Clock Delay: 33
07:42:42:setup_element:INFO:	Eye window for uplink 26: ________________________________________________________________________XXXXX___
Clock Delay: 34
07:42:42:setup_element:INFO:	Eye window for uplink 27: ________________________________________________________________________XXXXX___
Clock Delay: 34
07:42:42:setup_element:INFO:	Eye window for uplink 28: _________________________________________________________________________XXXXXX_
Clock Delay: 35
07:42:42:setup_element:INFO:	Eye window for uplink 29: _________________________________________________________________________XXXXXX_
Clock Delay: 35
07:42:42:setup_element:INFO:	Eye window for uplink 30: __________________________________________________________________________XXXXX_
Clock Delay: 36
07:42:42:setup_element:INFO:	Eye window for uplink 31: __________________________________________________________________________XXXXX_
Clock Delay: 36
07:42:42:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 2
07:42:42:setup_element:INFO:	Scanning data phases
07:42:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:42:42:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:42:47:setup_element:INFO:	Data phase scan results for group 0, downlink 2
07:42:47:setup_element:INFO:	Eye window for uplink 16: X__________________________________XXXXX
Data delay found: 17
07:42:47:setup_element:INFO:	Eye window for uplink 17: __________________________________XXXXX_
Data delay found: 16
07:42:47:setup_element:INFO:	Eye window for uplink 18: X___________________________________XXXX
Data delay found: 18
07:42:47:setup_element:INFO:	Eye window for uplink 19: XX__________________________________XXXX
Data delay found: 18
07:42:47:setup_element:INFO:	Eye window for uplink 20: _________________________________XXXXX__
Data delay found: 15
07:42:47:setup_element:INFO:	Eye window for uplink 21: __________________________________XXXXX_
Data delay found: 16
07:42:47:setup_element:INFO:	Eye window for uplink 22: XX__________________________________XXXX
Data delay found: 18
07:42:47:setup_element:INFO:	Eye window for uplink 23: _________________________________XXXXX__
Data delay found: 15
07:42:47:setup_element:INFO:	Eye window for uplink 24: ______XXXXX_____________________________
Data delay found: 28
07:42:47:setup_element:INFO:	Eye window for uplink 25: ________XXXXX___________________________
Data delay found: 30
07:42:47:setup_element:INFO:	Eye window for uplink 26: __________XXXXXX________________________
Data delay found: 32
07:42:47:setup_element:INFO:	Eye window for uplink 27: ____________XXXXXXX_____________________
Data delay found: 35
07:42:47:setup_element:INFO:	Eye window for uplink 28: ______________XXXXXXX___________________
Data delay found: 37
07:42:47:setup_element:INFO:	Eye window for uplink 29: ______________XXXXXX____________________
Data delay found: 36
07:42:47:setup_element:INFO:	Eye window for uplink 30: ___________________XXXXXX_______________
Data delay found: 1
07:42:47:setup_element:INFO:	Eye window for uplink 31: __________________XXXXX_________________
Data delay found: 0
07:42:47:setup_element:INFO:	Setting the data phase to 17 for uplink 16
07:42:47:setup_element:INFO:	Setting the data phase to 16 for uplink 17
07:42:47:setup_element:INFO:	Setting the data phase to 18 for uplink 18
07:42:47:setup_element:INFO:	Setting the data phase to 18 for uplink 19
07:42:47:setup_element:INFO:	Setting the data phase to 15 for uplink 20
07:42:47:setup_element:INFO:	Setting the data phase to 16 for uplink 21
07:42:47:setup_element:INFO:	Setting the data phase to 18 for uplink 22
07:42:47:setup_element:INFO:	Setting the data phase to 15 for uplink 23
07:42:47:setup_element:INFO:	Setting the data phase to 28 for uplink 24
07:42:47:setup_element:INFO:	Setting the data phase to 30 for uplink 25
07:42:47:setup_element:INFO:	Setting the data phase to 32 for uplink 26
07:42:47:setup_element:INFO:	Setting the data phase to 35 for uplink 27
07:42:47:setup_element:INFO:	Setting the data phase to 37 for uplink 28
07:42:47:setup_element:INFO:	Setting the data phase to 36 for uplink 29
07:42:47:setup_element:INFO:	Setting the data phase to 1 for uplink 30
07:42:47:setup_element:INFO:	Setting the data phase to 0 for uplink 31
07:42:47:setup_element:INFO:	Beginning SMX ASICs map scan
07:42:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:42:47:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:42:47:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
07:42:47:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
07:42:47:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
07:42:47:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
07:42:47:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
07:42:48:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
07:42:48:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
07:42:48:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
07:42:48:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
07:42:48:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
07:42:48:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
07:42:48:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
07:42:48:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
07:42:48:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
07:42:48:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
07:42:48:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
07:42:48:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
07:42:49:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
07:42:49:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
07:42:50:setup_element:INFO:	Performing Elink synchronization
07:42:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
07:42:50:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:42:50:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
07:42:50:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
07:42:50:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
07:42:50:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
07:42:51:febtest:INFO:	Init all SMX (CSA): 30
07:43:05:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:43:06:febtest:INFO:	23-00 | XA-000-09-004-019-013-007-13 |  31.4 | 1189.2
07:43:06:febtest:INFO:	30-01 | XA-000-09-004-019-016-008-06 |  34.6 | 1171.5
07:43:06:febtest:INFO:	21-02 | XA-000-09-004-019-007-009-02 |  31.4 | 1189.2
07:43:06:febtest:INFO:	28-03 | XA-000-09-004-019-007-008-02 |  44.1 | 1153.7
07:43:06:febtest:INFO:	19-04 | XA-000-09-004-019-013-010-13 |  37.7 | 1159.7
07:43:07:febtest:INFO:	26-05 | XA-000-09-004-019-004-008-12 |  34.6 | 1177.4
07:43:07:febtest:INFO:	17-06 | XA-000-09-004-019-016-009-06 |  31.4 | 1183.3
07:43:07:febtest:INFO:	24-07 | XA-000-09-004-019-004-009-12 |  31.4 | 1195.1
07:43:08:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
07:43:10:ST3_smx:INFO:	chip: 23-0 	 34.556970 C 	 1212.728715 mV
07:43:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:43:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:43:10:ST3_smx:INFO:		Electrons
07:43:10:ST3_smx:INFO:	# loops 0
07:43:12:ST3_smx:INFO:	# loops 1
07:43:14:ST3_smx:INFO:	# loops 2
07:43:15:ST3_smx:INFO:	Total # of broken channels: 0
07:43:15:ST3_smx:INFO:	List of broken channels: []
07:43:15:ST3_smx:INFO:	Total # of broken channels: 0
07:43:15:ST3_smx:INFO:	List of broken channels: []
07:43:17:ST3_smx:INFO:	chip: 30-1 	 34.556970 C 	 1183.292940 mV
07:43:17:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:43:17:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:43:17:ST3_smx:INFO:		Electrons
07:43:17:ST3_smx:INFO:	# loops 0
07:43:18:ST3_smx:INFO:	# loops 1
07:43:20:ST3_smx:INFO:	# loops 2
07:43:22:ST3_smx:INFO:	Total # of broken channels: 0
07:43:22:ST3_smx:INFO:	List of broken channels: []
07:43:22:ST3_smx:INFO:	Total # of broken channels: 0
07:43:22:ST3_smx:INFO:	List of broken channels: []
07:43:24:ST3_smx:INFO:	chip: 21-2 	 31.389742 C 	 1200.969315 mV
07:43:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:43:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:43:24:ST3_smx:INFO:		Electrons
07:43:24:ST3_smx:INFO:	# loops 0
07:43:25:ST3_smx:INFO:	# loops 1
07:43:27:ST3_smx:INFO:	# loops 2
07:43:28:ST3_smx:INFO:	Total # of broken channels: 0
07:43:28:ST3_smx:INFO:	List of broken channels: []
07:43:28:ST3_smx:INFO:	Total # of broken channels: 0
07:43:28:ST3_smx:INFO:	List of broken channels: []
07:43:30:ST3_smx:INFO:	chip: 28-3 	 47.250730 C 	 1165.571835 mV
07:43:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:43:30:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:43:30:ST3_smx:INFO:		Electrons
07:43:30:ST3_smx:INFO:	# loops 0
07:43:31:ST3_smx:INFO:	# loops 1
07:43:33:ST3_smx:INFO:	# loops 2
07:43:35:ST3_smx:INFO:	Total # of broken channels: 0
07:43:35:ST3_smx:INFO:	List of broken channels: []
07:43:35:ST3_smx:INFO:	Total # of broken channels: 0
07:43:35:ST3_smx:INFO:	List of broken channels: []
07:43:36:ST3_smx:INFO:	chip: 19-4 	 37.726682 C 	 1177.390875 mV
07:43:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:43:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:43:36:ST3_smx:INFO:		Electrons
07:43:36:ST3_smx:INFO:	# loops 0
07:43:38:ST3_smx:INFO:	# loops 1
07:43:39:ST3_smx:INFO:	# loops 2
07:43:41:ST3_smx:INFO:	Total # of broken channels: 0
07:43:41:ST3_smx:INFO:	List of broken channels: []
07:43:41:ST3_smx:INFO:	Total # of broken channels: 0
07:43:41:ST3_smx:INFO:	List of broken channels: []
07:43:43:ST3_smx:INFO:	chip: 26-5 	 37.726682 C 	 1189.190035 mV
07:43:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:43:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:43:43:ST3_smx:INFO:		Electrons
07:43:43:ST3_smx:INFO:	# loops 0
07:43:44:ST3_smx:INFO:	# loops 1
07:43:46:ST3_smx:INFO:	# loops 2
07:43:48:ST3_smx:INFO:	Total # of broken channels: 0
07:43:48:ST3_smx:INFO:	List of broken channels: []
07:43:48:ST3_smx:INFO:	Total # of broken channels: 0
07:43:48:ST3_smx:INFO:	List of broken channels: []
07:43:50:ST3_smx:INFO:	chip: 17-6 	 34.556970 C 	 1195.082160 mV
07:43:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:43:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:43:50:ST3_smx:INFO:		Electrons
07:43:50:ST3_smx:INFO:	# loops 0
07:43:51:ST3_smx:INFO:	# loops 1
07:43:53:ST3_smx:INFO:	# loops 2
07:43:55:ST3_smx:INFO:	Total # of broken channels: 0
07:43:55:ST3_smx:INFO:	List of broken channels: []
07:43:55:ST3_smx:INFO:	Total # of broken channels: 0
07:43:55:ST3_smx:INFO:	List of broken channels: []
07:43:56:ST3_smx:INFO:	chip: 24-7 	 31.389742 C 	 1206.851500 mV
07:43:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:43:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
07:43:56:ST3_smx:INFO:		Electrons
07:43:56:ST3_smx:INFO:	# loops 0
07:43:58:ST3_smx:INFO:	# loops 1
07:44:00:ST3_smx:INFO:	# loops 2
07:44:01:ST3_smx:INFO:	Total # of broken channels: 0
07:44:01:ST3_smx:INFO:	List of broken channels: []
07:44:01:ST3_smx:INFO:	Total # of broken channels: 0
07:44:01:ST3_smx:INFO:	List of broken channels: []
07:44:02:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:44:02:febtest:INFO:	23-00 | XA-000-09-004-019-013-007-13 |  31.4 | 1323.5
07:44:02:febtest:INFO:	30-01 | XA-000-09-004-019-016-008-06 |  37.7 | 1206.9
07:44:02:febtest:INFO:	21-02 | XA-000-09-004-019-007-009-02 |  34.6 | 1218.6
07:44:02:febtest:INFO:	28-03 | XA-000-09-004-019-007-008-02 |  47.3 | 1183.3
07:44:03:febtest:INFO:	19-04 | XA-000-09-004-019-013-010-13 |  34.6 | 1294.5
07:44:03:febtest:INFO:	26-05 | XA-000-09-004-019-004-008-12 |  40.9 | 1206.9
07:44:03:febtest:INFO:	17-06 | XA-000-09-004-019-016-009-06 |  34.6 | 1212.7
07:44:03:febtest:INFO:	24-07 | XA-000-09-004-019-004-009-12 |  34.6 | 1230.3
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_09_11-07_42_05
OPERATOR  : Benjamin; 
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4228| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_ID:	
2310
MODULE_NAME:	http://web-docs.gsi.de/~dtl-sts/?m=module&n=M7UR4B0011390B2

MODULE_TYPE:	
MODULE_LADDER:	
MODULE_MODULE:	
MODULE_SIZE:	0
MODULE_GRADE:	
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4080', '1.847', '2.4790']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0070', '1.850', '2.5790']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9770', '1.850', '0.5225']
Comment