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FEB_4230 25.09.25 17:05:33
Info
17:05:33:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
17:05:33:ST3_Shared:INFO: FEB-Microcable
17:05:33:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
17:05:33:febtest:INFO: Testing FEB with SN 4230
17:05:34:smx_tester:INFO: Scanning setup
17:05:34:elinks:INFO: Disabling clock on downlink 0
17:05:34:elinks:INFO: Disabling clock on downlink 1
17:05:34:elinks:INFO: Disabling clock on downlink 2
17:05:34:elinks:INFO: Disabling clock on downlink 3
17:05:34:elinks:INFO: Disabling clock on downlink 4
17:05:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
17:05:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
17:05:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
17:05:34:elinks:INFO: Disabling clock on downlink 0
17:05:34:elinks:INFO: Disabling clock on downlink 1
17:05:34:elinks:INFO: Disabling clock on downlink 2
17:05:34:elinks:INFO: Disabling clock on downlink 3
17:05:34:elinks:INFO: Disabling clock on downlink 4
17:05:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
17:05:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
17:05:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
17:05:35:elinks:INFO: Disabling clock on downlink 0
17:05:35:elinks:INFO: Disabling clock on downlink 1
17:05:35:elinks:INFO: Disabling clock on downlink 2
17:05:35:elinks:INFO: Disabling clock on downlink 3
17:05:35:elinks:INFO: Disabling clock on downlink 4
17:05:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
17:05:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
17:05:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
17:05:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
17:05:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
17:05:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
17:05:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
17:05:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
17:05:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
17:05:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
17:05:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
17:05:35:elinks:INFO: Disabling clock on downlink 0
17:05:35:elinks:INFO: Disabling clock on downlink 1
17:05:35:elinks:INFO: Disabling clock on downlink 2
17:05:35:elinks:INFO: Disabling clock on downlink 3
17:05:35:elinks:INFO: Disabling clock on downlink 4
17:05:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
17:05:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
17:05:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
17:05:35:elinks:INFO: Disabling clock on downlink 0
17:05:35:elinks:INFO: Disabling clock on downlink 1
17:05:35:elinks:INFO: Disabling clock on downlink 2
17:05:35:elinks:INFO: Disabling clock on downlink 3
17:05:35:elinks:INFO: Disabling clock on downlink 4
17:05:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
17:05:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
17:05:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
17:05:35:setup_element:INFO: Scanning clock phase
17:05:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
17:05:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
17:05:35:setup_element:INFO: Clock phase scan results for group 0, downlink 2
17:05:35:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXX____
Clock Delay: 32
17:05:35:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXX____
Clock Delay: 32
17:05:35:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
17:05:35:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
17:05:35:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXX____
Clock Delay: 32
17:05:35:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXX____
Clock Delay: 32
17:05:35:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXX_____
Clock Delay: 32
17:05:35:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXX_____
Clock Delay: 32
17:05:35:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
17:05:35:setup_element:INFO: Scanning data phases
17:05:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
17:05:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
17:05:40:setup_element:INFO: Data phase scan results for group 0, downlink 2
17:05:40:setup_element:INFO: Eye window for uplink 24: _________XXXXXX_________________________
Data delay found: 31
17:05:40:setup_element:INFO: Eye window for uplink 25: ____________XXXXX_______________________
Data delay found: 34
17:05:40:setup_element:INFO: Eye window for uplink 26: ___________XXXXXX_______________________
Data delay found: 33
17:05:40:setup_element:INFO: Eye window for uplink 27: _____________XXXXXX_____________________
Data delay found: 35
17:05:40:setup_element:INFO: Eye window for uplink 28: _______________XXXXXX___________________
Data delay found: 37
17:05:40:setup_element:INFO: Eye window for uplink 29: _______________XXXXXX___________________
Data delay found: 37
17:05:40:setup_element:INFO: Eye window for uplink 30: ________________XXXXXX__________________
Data delay found: 38
17:05:40:setup_element:INFO: Eye window for uplink 31: _______________XXXX_____________________
Data delay found: 36
17:05:40:setup_element:INFO: Setting the data phase to 31 for uplink 24
17:05:40:setup_element:INFO: Setting the data phase to 34 for uplink 25
17:05:40:setup_element:INFO: Setting the data phase to 33 for uplink 26
17:05:40:setup_element:INFO: Setting the data phase to 35 for uplink 27
17:05:40:setup_element:INFO: Setting the data phase to 37 for uplink 28
17:05:40:setup_element:INFO: Setting the data phase to 37 for uplink 29
17:05:40:setup_element:INFO: Setting the data phase to 38 for uplink 30
17:05:40:setup_element:INFO: Setting the data phase to 36 for uplink 31
17:05:40:setup_element:INFO: Beginning SMX ASICs map scan
17:05:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
17:05:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
17:05:40:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
17:05:40:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
17:05:40:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
17:05:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
17:05:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
17:05:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
17:05:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
17:05:41:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
17:05:41:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
17:05:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
17:05:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
17:05:43:setup_element:INFO: Performing Elink synchronization
17:05:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
17:05:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
17:05:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
17:05:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
17:05:43:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
17:05:43:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
17:05:44:febtest:INFO: Init all SMX (CSA): 30
17:05:50:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
17:05:50:febtest:INFO: 30-01 | XA-000-09-004-035-009-007-03 | 40.9 | 1135.9
17:05:51:febtest:INFO: 28-03 | XA-000-09-004-035-012-005-08 | 25.1 | 1201.0
17:05:51:febtest:INFO: 26-05 | XA-000-09-004-035-009-005-03 | 25.1 | 1201.0
17:05:51:febtest:INFO: 24-07 | XA-000-09-004-035-006-007-07 | 21.9 | 1212.7
17:05:52:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
17:05:54:ST3_smx:INFO: chip: 30-1 40.898880 C 1153.732915 mV
17:05:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:05:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:05:54:ST3_smx:INFO: Electrons
17:05:54:ST3_smx:INFO: # loops 0
17:05:56:ST3_smx:INFO: # loops 1
17:05:57:ST3_smx:INFO: # loops 2
17:05:59:ST3_smx:INFO: Total # of broken channels: 0
17:05:59:ST3_smx:INFO: List of broken channels: []
17:05:59:ST3_smx:INFO: Total # of broken channels: 0
17:05:59:ST3_smx:INFO: List of broken channels: []
17:06:01:ST3_smx:INFO: chip: 28-3 25.062742 C 1206.851500 mV
17:06:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:06:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:06:01:ST3_smx:INFO: Electrons
17:06:01:ST3_smx:INFO: # loops 0
17:06:02:ST3_smx:INFO: # loops 1
17:06:04:ST3_smx:INFO: # loops 2
17:06:06:ST3_smx:INFO: Total # of broken channels: 0
17:06:06:ST3_smx:INFO: List of broken channels: []
17:06:06:ST3_smx:INFO: Total # of broken channels: 0
17:06:06:ST3_smx:INFO: List of broken channels: []
17:06:08:ST3_smx:INFO: chip: 26-5 25.062742 C 1212.728715 mV
17:06:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:06:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:06:08:ST3_smx:INFO: Electrons
17:06:08:ST3_smx:INFO: # loops 0
17:06:09:ST3_smx:INFO: # loops 1
17:06:11:ST3_smx:INFO: # loops 2
17:06:12:ST3_smx:INFO: Total # of broken channels: 0
17:06:12:ST3_smx:INFO: List of broken channels: []
17:06:12:ST3_smx:INFO: Total # of broken channels: 0
17:06:12:ST3_smx:INFO: List of broken channels: []
17:06:14:ST3_smx:INFO: chip: 24-7 21.902970 C 1224.468235 mV
17:06:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:06:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
17:06:14:ST3_smx:INFO: Electrons
17:06:14:ST3_smx:INFO: # loops 0
17:06:15:ST3_smx:INFO: # loops 1
17:06:17:ST3_smx:INFO: # loops 2
17:06:19:ST3_smx:INFO: Total # of broken channels: 0
17:06:19:ST3_smx:INFO: List of broken channels: []
17:06:19:ST3_smx:INFO: Total # of broken channels: 0
17:06:19:ST3_smx:INFO: List of broken channels: []
17:06:19:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
17:06:19:febtest:INFO: 30-01 | XA-000-09-004-035-009-007-03 | 44.1 | 1171.5
17:06:20:febtest:INFO: 28-03 | XA-000-09-004-035-012-005-08 | 25.1 | 1230.3
17:06:20:febtest:INFO: 26-05 | XA-000-09-004-035-009-005-03 | 28.2 | 1230.3
17:06:20:febtest:INFO: 24-07 | XA-000-09-004-035-006-007-07 | 25.1 | 1247.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_09_25-17_05_33
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4230| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.449', '0.8029', '1.850', '1.3020']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0160', '1.850', '1.2790']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9980', '1.850', '0.2651']