FEB_4241 15.09.25 11:32:34
Info
11:32:34:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:32:34:ST3_Shared:INFO: FEB-Microcable
11:32:34:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:32:34:febtest:INFO: Testing FEB with SN 4241
11:32:35:smx_tester:INFO: Scanning setup
11:32:35:elinks:INFO: Disabling clock on downlink 0
11:32:35:elinks:INFO: Disabling clock on downlink 1
11:32:35:elinks:INFO: Disabling clock on downlink 2
11:32:35:elinks:INFO: Disabling clock on downlink 3
11:32:35:elinks:INFO: Disabling clock on downlink 4
11:32:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:32:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:32:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:32:35:elinks:INFO: Disabling clock on downlink 0
11:32:35:elinks:INFO: Disabling clock on downlink 1
11:32:35:elinks:INFO: Disabling clock on downlink 2
11:32:35:elinks:INFO: Disabling clock on downlink 3
11:32:35:elinks:INFO: Disabling clock on downlink 4
11:32:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:32:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:32:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:32:36:elinks:INFO: Disabling clock on downlink 0
11:32:36:elinks:INFO: Disabling clock on downlink 1
11:32:36:elinks:INFO: Disabling clock on downlink 2
11:32:36:elinks:INFO: Disabling clock on downlink 3
11:32:36:elinks:INFO: Disabling clock on downlink 4
11:32:36:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:32:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:32:36:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:32:36:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:32:36:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:32:36:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:32:36:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:32:36:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:32:36:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:32:36:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:32:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:32:36:elinks:INFO: Disabling clock on downlink 0
11:32:36:elinks:INFO: Disabling clock on downlink 1
11:32:36:elinks:INFO: Disabling clock on downlink 2
11:32:36:elinks:INFO: Disabling clock on downlink 3
11:32:36:elinks:INFO: Disabling clock on downlink 4
11:32:36:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:32:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:32:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:32:36:elinks:INFO: Disabling clock on downlink 0
11:32:36:elinks:INFO: Disabling clock on downlink 1
11:32:36:elinks:INFO: Disabling clock on downlink 2
11:32:36:elinks:INFO: Disabling clock on downlink 3
11:32:36:elinks:INFO: Disabling clock on downlink 4
11:32:36:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:32:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:32:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:32:36:setup_element:INFO: Scanning clock phase
11:32:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:32:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:32:36:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:32:36:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:32:36:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:32:36:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
11:32:36:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
11:32:36:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXX_____
Clock Delay: 32
11:32:36:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXX_____
Clock Delay: 32
11:32:36:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:32:36:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:32:36:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
11:32:36:setup_element:INFO: Scanning data phases
11:32:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:32:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:32:41:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:32:41:setup_element:INFO: Eye window for uplink 24: ________XXXXXX__________________________
Data delay found: 30
11:32:41:setup_element:INFO: Eye window for uplink 25: __________XXXXX_________________________
Data delay found: 32
11:32:41:setup_element:INFO: Eye window for uplink 26: _______XXXXX____________________________
Data delay found: 29
11:32:41:setup_element:INFO: Eye window for uplink 27: ________XXXXXXX_________________________
Data delay found: 31
11:32:41:setup_element:INFO: Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
11:32:41:setup_element:INFO: Eye window for uplink 29: _____________XXXX_______________________
Data delay found: 34
11:32:41:setup_element:INFO: Eye window for uplink 30: ______________XXXXXX____________________
Data delay found: 36
11:32:41:setup_element:INFO: Eye window for uplink 31: _____________XXXX_______________________
Data delay found: 34
11:32:41:setup_element:INFO: Setting the data phase to 30 for uplink 24
11:32:41:setup_element:INFO: Setting the data phase to 32 for uplink 25
11:32:41:setup_element:INFO: Setting the data phase to 29 for uplink 26
11:32:41:setup_element:INFO: Setting the data phase to 31 for uplink 27
11:32:41:setup_element:INFO: Setting the data phase to 35 for uplink 28
11:32:41:setup_element:INFO: Setting the data phase to 34 for uplink 29
11:32:41:setup_element:INFO: Setting the data phase to 36 for uplink 30
11:32:41:setup_element:INFO: Setting the data phase to 34 for uplink 31
11:32:41:setup_element:INFO: Beginning SMX ASICs map scan
11:32:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:32:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:32:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:32:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:32:41:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
11:32:42:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:32:42:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:32:42:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:32:42:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:32:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:32:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:32:43:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:32:43:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:32:44:setup_element:INFO: Performing Elink synchronization
11:32:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:32:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:32:44:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:32:44:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:32:44:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:32:44:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:32:44:febtest:INFO: Init all SMX (CSA): 30
11:32:52:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:32:52:febtest:INFO: 30-01 | XA-000-09-004-024-002-015-07 | 34.6 | 1183.3
11:32:52:febtest:INFO: 28-03 | XA-000-09-004-024-011-016-01 | 34.6 | 1183.3
11:32:53:febtest:INFO: 26-05 | XA-000-09-004-024-008-015-08 | 56.8 | 1112.1
11:32:53:febtest:INFO: 24-07 | XA-000-09-004-024-002-014-07 | 40.9 | 1153.7
11:32:54:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:32:56:ST3_smx:INFO: chip: 30-1 34.556970 C 1195.082160 mV
11:32:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:32:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:32:56:ST3_smx:INFO: Electrons
11:32:56:ST3_smx:INFO: # loops 0
11:32:57:ST3_smx:INFO: # loops 1
11:32:59:ST3_smx:INFO: # loops 2
11:33:00:ST3_smx:INFO: Total # of broken channels: 0
11:33:00:ST3_smx:INFO: List of broken channels: []
11:33:00:ST3_smx:INFO: Total # of broken channels: 0
11:33:00:ST3_smx:INFO: List of broken channels: []
11:33:02:ST3_smx:INFO: chip: 28-3 37.726682 C 1195.082160 mV
11:33:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:33:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:33:02:ST3_smx:INFO: Electrons
11:33:02:ST3_smx:INFO: # loops 0
11:33:04:ST3_smx:INFO: # loops 1
11:33:05:ST3_smx:INFO: # loops 2
11:33:07:ST3_smx:INFO: Total # of broken channels: 0
11:33:07:ST3_smx:INFO: List of broken channels: []
11:33:07:ST3_smx:INFO: Total # of broken channels: 0
11:33:07:ST3_smx:INFO: List of broken channels: []
11:33:08:ST3_smx:INFO: chip: 26-5 56.797143 C 1118.096875 mV
11:33:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:33:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:33:08:ST3_smx:INFO: Electrons
11:33:08:ST3_smx:INFO: # loops 0
11:33:10:ST3_smx:INFO: # loops 1
11:33:11:ST3_smx:INFO: # loops 2
11:33:13:ST3_smx:INFO: Total # of broken channels: 0
11:33:13:ST3_smx:INFO: List of broken channels: []
11:33:13:ST3_smx:INFO: Total # of broken channels: 0
11:33:13:ST3_smx:INFO: List of broken channels: []
11:33:15:ST3_smx:INFO: chip: 24-7 44.073563 C 1165.571835 mV
11:33:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:33:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:33:15:ST3_smx:INFO: Electrons
11:33:15:ST3_smx:INFO: # loops 0
11:33:17:ST3_smx:INFO: # loops 1
11:33:18:ST3_smx:INFO: # loops 2
11:33:20:ST3_smx:INFO: Total # of broken channels: 0
11:33:20:ST3_smx:INFO: List of broken channels: []
11:33:20:ST3_smx:INFO: Total # of broken channels: 0
11:33:20:ST3_smx:INFO: List of broken channels: []
11:33:21:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:33:21:febtest:INFO: 30-01 | XA-000-09-004-024-002-015-07 | 37.7 | 1218.6
11:33:21:febtest:INFO: 28-03 | XA-000-09-004-024-011-016-01 | 37.7 | 1218.6
11:33:21:febtest:INFO: 26-05 | XA-000-09-004-024-008-015-08 | 60.0 | 1141.9
11:33:21:febtest:INFO: 24-07 | XA-000-09-004-024-002-014-07 | 47.3 | 1183.3
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_09_15-11_32_34
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4241| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.8150', '1.848', '1.3010']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0120', '1.850', '1.1670']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9884', '1.850', '0.2613']