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FEB_4245 18.09.25 11:36:39
Info
11:36:39:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:36:39:ST3_Shared:INFO: FEB-Microcable
11:36:39:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:36:39:febtest:INFO: Testing FEB with SN 4245
11:36:40:smx_tester:INFO: Scanning setup
11:36:40:elinks:INFO: Disabling clock on downlink 0
11:36:40:elinks:INFO: Disabling clock on downlink 1
11:36:40:elinks:INFO: Disabling clock on downlink 2
11:36:40:elinks:INFO: Disabling clock on downlink 3
11:36:40:elinks:INFO: Disabling clock on downlink 4
11:36:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:36:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:36:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:36:41:elinks:INFO: Disabling clock on downlink 0
11:36:41:elinks:INFO: Disabling clock on downlink 1
11:36:41:elinks:INFO: Disabling clock on downlink 2
11:36:41:elinks:INFO: Disabling clock on downlink 3
11:36:41:elinks:INFO: Disabling clock on downlink 4
11:36:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:36:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:36:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:36:41:elinks:INFO: Disabling clock on downlink 0
11:36:41:elinks:INFO: Disabling clock on downlink 1
11:36:41:elinks:INFO: Disabling clock on downlink 2
11:36:41:elinks:INFO: Disabling clock on downlink 3
11:36:41:elinks:INFO: Disabling clock on downlink 4
11:36:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:36:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:36:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
11:36:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
11:36:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
11:36:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
11:36:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
11:36:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
11:36:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
11:36:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
11:36:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:36:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:36:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:36:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:36:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:36:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:36:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:36:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:36:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:36:41:elinks:INFO: Disabling clock on downlink 0
11:36:41:elinks:INFO: Disabling clock on downlink 1
11:36:41:elinks:INFO: Disabling clock on downlink 2
11:36:41:elinks:INFO: Disabling clock on downlink 3
11:36:41:elinks:INFO: Disabling clock on downlink 4
11:36:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:36:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:36:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:36:41:elinks:INFO: Disabling clock on downlink 0
11:36:41:elinks:INFO: Disabling clock on downlink 1
11:36:41:elinks:INFO: Disabling clock on downlink 2
11:36:41:elinks:INFO: Disabling clock on downlink 3
11:36:41:elinks:INFO: Disabling clock on downlink 4
11:36:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:36:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:36:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:36:41:setup_element:INFO: Scanning clock phase
11:36:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:36:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:36:41:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:36:41:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:36:41:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:36:41:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:36:41:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:36:41:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:36:41:setup_element:INFO: Eye window for uplink 21: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:36:41:setup_element:INFO: Eye window for uplink 22: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:36:41:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:36:41:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXX_____
Clock Delay: 32
11:36:41:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXX_____
Clock Delay: 32
11:36:41:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXX____
Clock Delay: 33
11:36:41:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXX____
Clock Delay: 33
11:36:41:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:36:41:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
11:36:41:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:36:41:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:36:41:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
11:36:41:setup_element:INFO: Scanning data phases
11:36:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:36:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:36:47:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:36:47:setup_element:INFO: Eye window for uplink 16: _________________________________XXXXX__
Data delay found: 15
11:36:47:setup_element:INFO: Eye window for uplink 17: ________________________________XXXXX___
Data delay found: 14
11:36:47:setup_element:INFO: Eye window for uplink 18: _________________________________XXXXX__
Data delay found: 15
11:36:47:setup_element:INFO: Eye window for uplink 19: _________________________________XXXXXX_
Data delay found: 15
11:36:47:setup_element:INFO: Eye window for uplink 20: XX___________________________________XXX
Data delay found: 19
11:36:47:setup_element:INFO: Eye window for uplink 21: XXX___________________________________XX
Data delay found: 20
11:36:47:setup_element:INFO: Eye window for uplink 22: _________________________________XXXXX__
Data delay found: 15
11:36:47:setup_element:INFO: Eye window for uplink 23: _______________________________XXXX_____
Data delay found: 12
11:36:47:setup_element:INFO: Eye window for uplink 24: _____XXXXXX_____________________________
Data delay found: 27
11:36:47:setup_element:INFO: Eye window for uplink 25: _______XXXXX____________________________
Data delay found: 29
11:36:47:setup_element:INFO: Eye window for uplink 26: ________XXXXXX__________________________
Data delay found: 30
11:36:47:setup_element:INFO: Eye window for uplink 27: _________XXXXXXXX_______________________
Data delay found: 32
11:36:47:setup_element:INFO: Eye window for uplink 28: ______________XXXXXX____________________
Data delay found: 36
11:36:47:setup_element:INFO: Eye window for uplink 29: ______________XXXXX_____________________
Data delay found: 36
11:36:47:setup_element:INFO: Eye window for uplink 30: ______________XXXXXXX___________________
Data delay found: 37
11:36:47:setup_element:INFO: Eye window for uplink 31: ______________XXXX______________________
Data delay found: 35
11:36:47:setup_element:INFO: Setting the data phase to 15 for uplink 16
11:36:47:setup_element:INFO: Setting the data phase to 14 for uplink 17
11:36:47:setup_element:INFO: Setting the data phase to 15 for uplink 18
11:36:47:setup_element:INFO: Setting the data phase to 15 for uplink 19
11:36:47:setup_element:INFO: Setting the data phase to 19 for uplink 20
11:36:47:setup_element:INFO: Setting the data phase to 20 for uplink 21
11:36:47:setup_element:INFO: Setting the data phase to 15 for uplink 22
11:36:47:setup_element:INFO: Setting the data phase to 12 for uplink 23
11:36:47:setup_element:INFO: Setting the data phase to 27 for uplink 24
11:36:47:setup_element:INFO: Setting the data phase to 29 for uplink 25
11:36:47:setup_element:INFO: Setting the data phase to 30 for uplink 26
11:36:47:setup_element:INFO: Setting the data phase to 32 for uplink 27
11:36:47:setup_element:INFO: Setting the data phase to 36 for uplink 28
11:36:47:setup_element:INFO: Setting the data phase to 36 for uplink 29
11:36:47:setup_element:INFO: Setting the data phase to 37 for uplink 30
11:36:47:setup_element:INFO: Setting the data phase to 35 for uplink 31
11:36:47:setup_element:INFO: Beginning SMX ASICs map scan
11:36:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:36:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:36:47:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:36:47:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:36:47:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:36:47:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
11:36:47:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
11:36:47:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:36:47:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:36:47:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:36:47:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:36:47:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:36:47:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:36:47:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:36:48:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:36:48:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:36:48:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:36:48:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:36:48:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:36:48:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:36:48:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:36:49:setup_element:INFO: Performing Elink synchronization
11:36:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:36:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:36:49:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:36:49:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:36:49:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:36:49:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:36:50:febtest:INFO: Init all SMX (CSA): 30
11:37:03:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:37:04:febtest:INFO: 23-00 | XA-000-09-004-035-011-018-07 | 12.4 | 1242.0
11:37:04:febtest:INFO: 30-01 | XA-000-09-004-035-002-012-01 | 28.2 | 1183.3
11:37:04:febtest:INFO: 21-02 | XA-000-09-004-035-017-017-04 | 15.6 | 1230.3
11:37:04:febtest:INFO: 28-03 | XA-000-09-004-035-002-011-01 | 37.7 | 1165.6
11:37:04:febtest:INFO: 19-04 | XA-000-09-004-035-005-018-14 | 34.6 | 1171.5
11:37:05:febtest:INFO: 26-05 | XA-000-09-004-035-014-017-12 | 28.2 | 1195.1
11:37:05:febtest:INFO: 17-06 | XA-000-09-004-035-008-018-09 | 37.7 | 1171.5
11:37:05:febtest:INFO: 24-07 | XA-000-09-004-035-002-018-06 | 37.7 | 1165.6
11:37:06:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:37:08:ST3_smx:INFO: chip: 23-0 12.438562 C 1259.567515 mV
11:37:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:37:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:37:08:ST3_smx:INFO: Electrons
11:37:08:ST3_smx:INFO: # loops 0
11:37:10:ST3_smx:INFO: # loops 1
11:37:11:ST3_smx:INFO: # loops 2
11:37:13:ST3_smx:INFO: Total # of broken channels: 0
11:37:13:ST3_smx:INFO: List of broken channels: []
11:37:13:ST3_smx:INFO: Total # of broken channels: 0
11:37:13:ST3_smx:INFO: List of broken channels: []
11:37:15:ST3_smx:INFO: chip: 30-1 31.389742 C 1200.969315 mV
11:37:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:37:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:37:15:ST3_smx:INFO: Electrons
11:37:15:ST3_smx:INFO: # loops 0
11:37:16:ST3_smx:INFO: # loops 1
11:37:18:ST3_smx:INFO: # loops 2
11:37:19:ST3_smx:INFO: Total # of broken channels: 0
11:37:19:ST3_smx:INFO: List of broken channels: []
11:37:19:ST3_smx:INFO: Total # of broken channels: 0
11:37:19:ST3_smx:INFO: List of broken channels: []
11:37:21:ST3_smx:INFO: chip: 21-2 18.745682 C 1242.040240 mV
11:37:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:37:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:37:21:ST3_smx:INFO: Electrons
11:37:21:ST3_smx:INFO: # loops 0
11:37:22:ST3_smx:INFO: # loops 1
11:37:24:ST3_smx:INFO: # loops 2
11:37:26:ST3_smx:INFO: Total # of broken channels: 0
11:37:26:ST3_smx:INFO: List of broken channels: []
11:37:26:ST3_smx:INFO: Total # of broken channels: 0
11:37:26:ST3_smx:INFO: List of broken channels: []
11:37:27:ST3_smx:INFO: chip: 28-3 37.726682 C 1183.292940 mV
11:37:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:37:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:37:27:ST3_smx:INFO: Electrons
11:37:27:ST3_smx:INFO: # loops 0
11:37:29:ST3_smx:INFO: # loops 1
11:37:30:ST3_smx:INFO: # loops 2
11:37:32:ST3_smx:INFO: Total # of broken channels: 0
11:37:32:ST3_smx:INFO: List of broken channels: []
11:37:32:ST3_smx:INFO: Total # of broken channels: 0
11:37:32:ST3_smx:INFO: List of broken channels: []
11:37:34:ST3_smx:INFO: chip: 19-4 34.556970 C 1183.292940 mV
11:37:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:37:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:37:34:ST3_smx:INFO: Electrons
11:37:34:ST3_smx:INFO: # loops 0
11:37:35:ST3_smx:INFO: # loops 1
11:37:37:ST3_smx:INFO: # loops 2
11:37:38:ST3_smx:INFO: Total # of broken channels: 0
11:37:38:ST3_smx:INFO: List of broken channels: []
11:37:38:ST3_smx:INFO: Total # of broken channels: 0
11:37:38:ST3_smx:INFO: List of broken channels: []
11:37:40:ST3_smx:INFO: chip: 26-5 31.389742 C 1206.851500 mV
11:37:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:37:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:37:40:ST3_smx:INFO: Electrons
11:37:40:ST3_smx:INFO: # loops 0
11:37:41:ST3_smx:INFO: # loops 1
11:37:43:ST3_smx:INFO: # loops 2
11:37:45:ST3_smx:INFO: Total # of broken channels: 0
11:37:45:ST3_smx:INFO: List of broken channels: []
11:37:45:ST3_smx:INFO: Total # of broken channels: 0
11:37:45:ST3_smx:INFO: List of broken channels: []
11:37:46:ST3_smx:INFO: chip: 17-6 37.726682 C 1177.390875 mV
11:37:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:37:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:37:46:ST3_smx:INFO: Electrons
11:37:46:ST3_smx:INFO: # loops 0
11:37:48:ST3_smx:INFO: # loops 1
11:37:50:ST3_smx:INFO: # loops 2
11:37:51:ST3_smx:INFO: Total # of broken channels: 0
11:37:51:ST3_smx:INFO: List of broken channels: []
11:37:51:ST3_smx:INFO: Total # of broken channels: 0
11:37:51:ST3_smx:INFO: List of broken channels: []
11:37:53:ST3_smx:INFO: chip: 24-7 37.726682 C 1177.390875 mV
11:37:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:37:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:37:53:ST3_smx:INFO: Electrons
11:37:53:ST3_smx:INFO: # loops 0
11:37:54:ST3_smx:INFO: # loops 1
11:37:56:ST3_smx:INFO: # loops 2
11:37:58:ST3_smx:INFO: Total # of broken channels: 0
11:37:58:ST3_smx:INFO: List of broken channels: []
11:37:58:ST3_smx:INFO: Total # of broken channels: 0
11:37:58:ST3_smx:INFO: List of broken channels: []
11:37:58:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:37:58:febtest:INFO: 23-00 | XA-000-09-004-035-011-018-07 | 15.6 | 1282.9
11:37:59:febtest:INFO: 30-01 | XA-000-09-004-035-002-012-01 | 31.4 | 1218.6
11:37:59:febtest:INFO: 21-02 | XA-000-09-004-035-017-017-04 | 18.7 | 1259.6
11:37:59:febtest:INFO: 28-03 | XA-000-09-004-035-002-011-01 | 37.7 | 1201.0
11:37:59:febtest:INFO: 19-04 | XA-000-09-004-035-005-018-14 | 37.7 | 1201.0
11:37:59:febtest:INFO: 26-05 | XA-000-09-004-035-014-017-12 | 34.6 | 1230.3
11:38:00:febtest:INFO: 17-06 | XA-000-09-004-035-008-018-09 | 40.9 | 1201.0
11:38:00:febtest:INFO: 24-07 | XA-000-09-004-035-002-018-06 | 37.7 | 1195.1
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_09_18-11_36_39
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4245| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4300', '1.850', '2.0870']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9550', '1.849', '2.4230']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9420', '1.850', '0.5162']