FEB_4251 22.09.25 14:01:35
Info
14:01:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:01:35:ST3_Shared:INFO: FEB-Microcable
14:01:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:01:35:febtest:INFO: Testing FEB with SN 4251
14:01:36:smx_tester:INFO: Scanning setup
14:01:36:elinks:INFO: Disabling clock on downlink 0
14:01:36:elinks:INFO: Disabling clock on downlink 1
14:01:36:elinks:INFO: Disabling clock on downlink 2
14:01:36:elinks:INFO: Disabling clock on downlink 3
14:01:36:elinks:INFO: Disabling clock on downlink 4
14:01:36:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:01:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:01:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:01:36:elinks:INFO: Disabling clock on downlink 0
14:01:36:elinks:INFO: Disabling clock on downlink 1
14:01:36:elinks:INFO: Disabling clock on downlink 2
14:01:36:elinks:INFO: Disabling clock on downlink 3
14:01:36:elinks:INFO: Disabling clock on downlink 4
14:01:36:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:01:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:01:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:01:36:elinks:INFO: Disabling clock on downlink 0
14:01:36:elinks:INFO: Disabling clock on downlink 1
14:01:36:elinks:INFO: Disabling clock on downlink 2
14:01:36:elinks:INFO: Disabling clock on downlink 3
14:01:36:elinks:INFO: Disabling clock on downlink 4
14:01:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:01:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:01:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
14:01:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
14:01:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
14:01:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
14:01:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
14:01:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
14:01:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
14:01:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
14:01:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:01:37:elinks:INFO: Disabling clock on downlink 0
14:01:37:elinks:INFO: Disabling clock on downlink 1
14:01:37:elinks:INFO: Disabling clock on downlink 2
14:01:37:elinks:INFO: Disabling clock on downlink 3
14:01:37:elinks:INFO: Disabling clock on downlink 4
14:01:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:01:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:01:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:01:37:elinks:INFO: Disabling clock on downlink 0
14:01:37:elinks:INFO: Disabling clock on downlink 1
14:01:37:elinks:INFO: Disabling clock on downlink 2
14:01:37:elinks:INFO: Disabling clock on downlink 3
14:01:37:elinks:INFO: Disabling clock on downlink 4
14:01:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:01:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:01:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:01:37:setup_element:INFO: Scanning clock phase
14:01:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:01:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:01:37:setup_element:INFO: Clock phase scan results for group 0, downlink 2
14:01:37:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:01:37:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:01:37:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:01:37:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:01:37:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:01:37:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:01:37:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXX____
Clock Delay: 33
14:01:37:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXX____
Clock Delay: 33
14:01:37:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
14:01:37:setup_element:INFO: Scanning data phases
14:01:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:01:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:01:42:setup_element:INFO: Data phase scan results for group 0, downlink 2
14:01:42:setup_element:INFO: Eye window for uplink 24: ________XXXXXX__________________________
Data delay found: 30
14:01:42:setup_element:INFO: Eye window for uplink 25: __________XXXXXX________________________
Data delay found: 32
14:01:42:setup_element:INFO: Eye window for uplink 26: _________XXXXXX_________________________
Data delay found: 31
14:01:42:setup_element:INFO: Eye window for uplink 27: ___________XXXXXXX______________________
Data delay found: 34
14:01:42:setup_element:INFO: Eye window for uplink 28: ____________XXXXXX______________________
Data delay found: 34
14:01:42:setup_element:INFO: Eye window for uplink 29: ____________XXXXXX______________________
Data delay found: 34
14:01:42:setup_element:INFO: Eye window for uplink 30: ________________XXXXXX__________________
Data delay found: 38
14:01:42:setup_element:INFO: Eye window for uplink 31: _______________XXXX_____________________
Data delay found: 36
14:01:42:setup_element:INFO: Setting the data phase to 30 for uplink 24
14:01:42:setup_element:INFO: Setting the data phase to 32 for uplink 25
14:01:42:setup_element:INFO: Setting the data phase to 31 for uplink 26
14:01:42:setup_element:INFO: Setting the data phase to 34 for uplink 27
14:01:42:setup_element:INFO: Setting the data phase to 34 for uplink 28
14:01:42:setup_element:INFO: Setting the data phase to 34 for uplink 29
14:01:42:setup_element:INFO: Setting the data phase to 38 for uplink 30
14:01:42:setup_element:INFO: Setting the data phase to 36 for uplink 31
14:01:42:setup_element:INFO: Beginning SMX ASICs map scan
14:01:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:01:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:01:42:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:01:42:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:01:42:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
14:01:43:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:01:43:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:01:43:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:01:43:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:01:43:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:01:43:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:01:44:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:01:44:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:01:45:setup_element:INFO: Performing Elink synchronization
14:01:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:01:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:01:45:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:01:45:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:01:45:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
14:01:45:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
14:01:45:febtest:INFO: Init all SMX (CSA): 30
14:01:53:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:01:53:febtest:INFO: 30-01 | XA-000-09-004-035-003-010-12 | 28.2 | 1177.4
14:01:53:febtest:INFO: 28-03 | XA-000-09-004-035-009-011-03 | 34.6 | 1159.7
14:01:53:febtest:INFO: 26-05 | XA-000-09-004-035-018-009-13 | 21.9 | 1212.7
14:01:53:febtest:INFO: 24-07 | XA-000-09-004-035-003-011-12 | 28.2 | 1183.3
14:01:54:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:01:56:ST3_smx:INFO: chip: 30-1 28.225000 C 1189.190035 mV
14:01:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:01:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:01:56:ST3_smx:INFO: Electrons
14:01:56:ST3_smx:INFO: # loops 0
14:01:58:ST3_smx:INFO: # loops 1
14:02:00:ST3_smx:INFO: # loops 2
14:02:02:ST3_smx:INFO: Total # of broken channels: 0
14:02:02:ST3_smx:INFO: List of broken channels: []
14:02:02:ST3_smx:INFO: Total # of broken channels: 0
14:02:02:ST3_smx:INFO: List of broken channels: []
14:02:03:ST3_smx:INFO: chip: 28-3 34.556970 C 1171.483840 mV
14:02:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:02:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:02:03:ST3_smx:INFO: Electrons
14:02:03:ST3_smx:INFO: # loops 0
14:02:05:ST3_smx:INFO: # loops 1
14:02:07:ST3_smx:INFO: # loops 2
14:02:09:ST3_smx:INFO: Total # of broken channels: 0
14:02:09:ST3_smx:INFO: List of broken channels: []
14:02:09:ST3_smx:INFO: Total # of broken channels: 0
14:02:09:ST3_smx:INFO: List of broken channels: []
14:02:10:ST3_smx:INFO: chip: 26-5 21.902970 C 1230.330540 mV
14:02:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:02:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:02:10:ST3_smx:INFO: Electrons
14:02:10:ST3_smx:INFO: # loops 0
14:02:12:ST3_smx:INFO: # loops 1
14:02:14:ST3_smx:INFO: # loops 2
14:02:15:ST3_smx:INFO: Total # of broken channels: 0
14:02:15:ST3_smx:INFO: List of broken channels: []
14:02:15:ST3_smx:INFO: Total # of broken channels: 0
14:02:15:ST3_smx:INFO: List of broken channels: []
14:02:17:ST3_smx:INFO: chip: 24-7 31.389742 C 1195.082160 mV
14:02:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:02:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:02:17:ST3_smx:INFO: Electrons
14:02:17:ST3_smx:INFO: # loops 0
14:02:19:ST3_smx:INFO: # loops 1
14:02:20:ST3_smx:INFO: # loops 2
14:02:22:ST3_smx:INFO: Total # of broken channels: 0
14:02:22:ST3_smx:INFO: List of broken channels: []
14:02:22:ST3_smx:INFO: Total # of broken channels: 0
14:02:22:ST3_smx:INFO: List of broken channels: []
14:02:22:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:02:22:febtest:INFO: 30-01 | XA-000-09-004-035-003-010-12 | 28.2 | 1212.7
14:02:23:febtest:INFO: 28-03 | XA-000-09-004-035-009-011-03 | 34.6 | 1195.1
14:02:23:febtest:INFO: 26-05 | XA-000-09-004-035-018-009-13 | 21.9 | 1259.6
14:02:23:febtest:INFO: 24-07 | XA-000-09-004-035-003-011-12 | 31.4 | 1218.6
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_09_22-14_01_35
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4251| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7321', '1.849', '1.0490']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0050', '1.850', '1.2840']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9916', '1.850', '0.2632']