11:02:50:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:02:50:ST3_Shared:INFO:	                       FEB-Microcable                       
11:02:50:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:02:50:febtest:INFO:	Testing FEB with SN 4252
11:02:51:smx_tester:INFO:	Scanning setup
11:02:51:elinks:INFO:	Disabling clock on downlink 0
11:02:51:elinks:INFO:	Disabling clock on downlink 1
11:02:51:elinks:INFO:	Disabling clock on downlink 2
11:02:51:elinks:INFO:	Disabling clock on downlink 3
11:02:51:elinks:INFO:	Disabling clock on downlink 4
11:02:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:02:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:02:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:02:51:elinks:INFO:	Disabling clock on downlink 0
11:02:51:elinks:INFO:	Disabling clock on downlink 1
11:02:51:elinks:INFO:	Disabling clock on downlink 2
11:02:51:elinks:INFO:	Disabling clock on downlink 3
11:02:51:elinks:INFO:	Disabling clock on downlink 4
11:02:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:02:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:02:52:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:02:52:elinks:INFO:	Disabling clock on downlink 0
11:02:52:elinks:INFO:	Disabling clock on downlink 1
11:02:52:elinks:INFO:	Disabling clock on downlink 2
11:02:52:elinks:INFO:	Disabling clock on downlink 3
11:02:52:elinks:INFO:	Disabling clock on downlink 4
11:02:52:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:02:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:02:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
11:02:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
11:02:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
11:02:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
11:02:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
11:02:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
11:02:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
11:02:52:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
11:02:52:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:02:52:elinks:INFO:	Disabling clock on downlink 0
11:02:52:elinks:INFO:	Disabling clock on downlink 1
11:02:52:elinks:INFO:	Disabling clock on downlink 2
11:02:52:elinks:INFO:	Disabling clock on downlink 3
11:02:52:elinks:INFO:	Disabling clock on downlink 4
11:02:52:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:02:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:02:52:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:02:52:elinks:INFO:	Disabling clock on downlink 0
11:02:52:elinks:INFO:	Disabling clock on downlink 1
11:02:52:elinks:INFO:	Disabling clock on downlink 2
11:02:52:elinks:INFO:	Disabling clock on downlink 3
11:02:52:elinks:INFO:	Disabling clock on downlink 4
11:02:52:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:02:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
11:02:52:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:02:52:setup_element:INFO:	Scanning clock phase
11:02:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:02:52:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:02:52:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
11:02:52:setup_element:INFO:	Eye window for uplink 24: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:02:52:setup_element:INFO:	Eye window for uplink 25: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:02:52:setup_element:INFO:	Eye window for uplink 26: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:02:52:setup_element:INFO:	Eye window for uplink 27: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:02:52:setup_element:INFO:	Eye window for uplink 28: ______________________________________________________________________XXXXX_____
Clock Delay: 32
11:02:52:setup_element:INFO:	Eye window for uplink 29: ______________________________________________________________________XXXXX_____
Clock Delay: 32
11:02:52:setup_element:INFO:	Eye window for uplink 30: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:02:52:setup_element:INFO:	Eye window for uplink 31: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:02:52:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 2
11:02:52:setup_element:INFO:	Scanning data phases
11:02:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:02:52:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:02:57:setup_element:INFO:	Data phase scan results for group 0, downlink 2
11:02:57:setup_element:INFO:	Eye window for uplink 24: __________XXXXXXX_______________________
Data delay found: 33
11:02:57:setup_element:INFO:	Eye window for uplink 25: ____________XXXXXXX_____________________
Data delay found: 35
11:02:57:setup_element:INFO:	Eye window for uplink 26: _________XXXXXX_________________________
Data delay found: 31
11:02:57:setup_element:INFO:	Eye window for uplink 27: ___________XXXXXX_______________________
Data delay found: 33
11:02:57:setup_element:INFO:	Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
11:02:57:setup_element:INFO:	Eye window for uplink 29: _____________XXXXX______________________
Data delay found: 35
11:02:57:setup_element:INFO:	Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
11:02:57:setup_element:INFO:	Eye window for uplink 31: ______________XXXXX_____________________
Data delay found: 36
11:02:57:setup_element:INFO:	Setting the data phase to 33 for uplink 24
11:02:57:setup_element:INFO:	Setting the data phase to 35 for uplink 25
11:02:57:setup_element:INFO:	Setting the data phase to 31 for uplink 26
11:02:57:setup_element:INFO:	Setting the data phase to 33 for uplink 27
11:02:57:setup_element:INFO:	Setting the data phase to 35 for uplink 28
11:02:57:setup_element:INFO:	Setting the data phase to 35 for uplink 29
11:02:57:setup_element:INFO:	Setting the data phase to 37 for uplink 30
11:02:57:setup_element:INFO:	Setting the data phase to 36 for uplink 31
11:02:57:setup_element:INFO:	Beginning SMX ASICs map scan
11:02:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:02:57:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:02:58:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
11:02:58:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
11:02:58:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
11:02:58:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:02:58:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:02:58:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:02:58:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:02:58:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:02:58:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:02:59:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:02:59:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:03:00:setup_element:INFO:	Performing Elink synchronization
11:03:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:03:00:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:03:00:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
11:03:00:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
11:03:00:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
11:03:00:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:03:01:febtest:INFO:	Init all SMX (CSA): 30
11:03:10:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:03:11:febtest:INFO:	30-01 | XA-000-09-004-035-012-019-15 |  31.4 | 1159.7
11:03:11:febtest:INFO:	28-03 | XA-000-09-004-035-012-020-15 |  31.4 | 1171.5
11:03:11:febtest:INFO:	26-05 | XA-000-09-004-035-015-020-01 |  18.7 | 1206.9
11:03:11:febtest:INFO:	24-07 | XA-000-09-004-035-018-020-10 |  25.1 | 1183.3
11:03:12:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:03:14:ST3_smx:INFO:	chip: 30-1 	 34.556970 C 	 1171.483840 mV
11:03:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:03:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:03:14:ST3_smx:INFO:		Electrons
11:03:14:ST3_smx:INFO:	# loops 0
11:03:16:ST3_smx:INFO:	# loops 1
11:03:18:ST3_smx:INFO:	# loops 2
11:03:20:ST3_smx:INFO:	Total # of broken channels: 0
11:03:20:ST3_smx:INFO:	List of broken channels: []
11:03:20:ST3_smx:INFO:	Total # of broken channels: 0
11:03:20:ST3_smx:INFO:	List of broken channels: []
11:03:22:ST3_smx:INFO:	chip: 28-3 	 28.225000 C 	 1183.292940 mV
11:03:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:03:22:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:03:22:ST3_smx:INFO:		Electrons
11:03:22:ST3_smx:INFO:	# loops 0
11:03:24:ST3_smx:INFO:	# loops 1
11:03:26:ST3_smx:INFO:	# loops 2
11:03:28:ST3_smx:INFO:	Total # of broken channels: 0
11:03:28:ST3_smx:INFO:	List of broken channels: []
11:03:28:ST3_smx:INFO:	Total # of broken channels: 0
11:03:28:ST3_smx:INFO:	List of broken channels: []
11:03:29:ST3_smx:INFO:	chip: 26-5 	 18.745682 C 	 1212.728715 mV
11:03:29:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:03:29:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:03:29:ST3_smx:INFO:		Electrons
11:03:29:ST3_smx:INFO:	# loops 0
11:03:31:ST3_smx:INFO:	# loops 1
11:03:33:ST3_smx:INFO:	# loops 2
11:03:35:ST3_smx:INFO:	Total # of broken channels: 0
11:03:35:ST3_smx:INFO:	List of broken channels: []
11:03:35:ST3_smx:INFO:	Total # of broken channels: 0
11:03:35:ST3_smx:INFO:	List of broken channels: []
11:03:37:ST3_smx:INFO:	chip: 24-7 	 25.062742 C 	 1189.190035 mV
11:03:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:03:37:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:03:37:ST3_smx:INFO:		Electrons
11:03:37:ST3_smx:INFO:	# loops 0
11:03:39:ST3_smx:INFO:	# loops 1
11:03:40:ST3_smx:INFO:	# loops 2
11:03:42:ST3_smx:INFO:	Total # of broken channels: 0
11:03:42:ST3_smx:INFO:	List of broken channels: []
11:03:42:ST3_smx:INFO:	Total # of broken channels: 0
11:03:42:ST3_smx:INFO:	List of broken channels: []
11:03:43:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:03:43:febtest:INFO:	30-01 | XA-000-09-004-035-012-019-15 |  34.6 | 1195.1
11:03:43:febtest:INFO:	28-03 | XA-000-09-004-035-012-020-15 |  31.4 | 1206.9
11:03:43:febtest:INFO:	26-05 | XA-000-09-004-035-015-020-01 |  18.7 | 1236.2
11:03:44:febtest:INFO:	24-07 | XA-000-09-004-035-018-020-10 |  25.1 | 1206.9
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_09_23-11_02_50
OPERATOR  : Benjamin; 
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4252| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.451', '0.7977', '1.847', '1.0280']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0120', '1.850', '1.2720']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9937', '1.850', '0.2651']