FEB_4253 23.09.25 11:10:36
Info
11:10:36:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:10:36:ST3_Shared:INFO: FEB-Microcable
11:10:36:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:10:36:febtest:INFO: Testing FEB with SN 4253
11:10:38:smx_tester:INFO: Scanning setup
11:10:38:elinks:INFO: Disabling clock on downlink 0
11:10:38:elinks:INFO: Disabling clock on downlink 1
11:10:38:elinks:INFO: Disabling clock on downlink 2
11:10:38:elinks:INFO: Disabling clock on downlink 3
11:10:38:elinks:INFO: Disabling clock on downlink 4
11:10:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:10:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:10:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:10:38:elinks:INFO: Disabling clock on downlink 0
11:10:38:elinks:INFO: Disabling clock on downlink 1
11:10:38:elinks:INFO: Disabling clock on downlink 2
11:10:38:elinks:INFO: Disabling clock on downlink 3
11:10:38:elinks:INFO: Disabling clock on downlink 4
11:10:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:10:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:10:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:10:38:elinks:INFO: Disabling clock on downlink 0
11:10:38:elinks:INFO: Disabling clock on downlink 1
11:10:38:elinks:INFO: Disabling clock on downlink 2
11:10:38:elinks:INFO: Disabling clock on downlink 3
11:10:38:elinks:INFO: Disabling clock on downlink 4
11:10:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:10:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:10:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:10:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:10:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:10:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:10:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:10:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:10:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:10:38:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:10:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:10:38:elinks:INFO: Disabling clock on downlink 0
11:10:38:elinks:INFO: Disabling clock on downlink 1
11:10:38:elinks:INFO: Disabling clock on downlink 2
11:10:38:elinks:INFO: Disabling clock on downlink 3
11:10:39:elinks:INFO: Disabling clock on downlink 4
11:10:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:10:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:10:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:10:39:elinks:INFO: Disabling clock on downlink 0
11:10:39:elinks:INFO: Disabling clock on downlink 1
11:10:39:elinks:INFO: Disabling clock on downlink 2
11:10:39:elinks:INFO: Disabling clock on downlink 3
11:10:39:elinks:INFO: Disabling clock on downlink 4
11:10:39:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:10:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:10:39:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:10:39:setup_element:INFO: Scanning clock phase
11:10:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:10:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:10:39:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:10:39:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:10:39:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:10:39:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:10:39:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:10:39:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXX_____
Clock Delay: 32
11:10:39:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXX_____
Clock Delay: 32
11:10:39:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXX____
Clock Delay: 33
11:10:39:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXX____
Clock Delay: 33
11:10:39:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
11:10:39:setup_element:INFO: Scanning data phases
11:10:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:10:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:10:44:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:10:44:setup_element:INFO: Eye window for uplink 24: _______XXXXXXX__________________________
Data delay found: 30
11:10:44:setup_element:INFO: Eye window for uplink 25: __________XXXXX_________________________
Data delay found: 32
11:10:44:setup_element:INFO: Eye window for uplink 26: __________XXXXXX________________________
Data delay found: 32
11:10:44:setup_element:INFO: Eye window for uplink 27: ___________XXXXXXXX_____________________
Data delay found: 34
11:10:44:setup_element:INFO: Eye window for uplink 28: _____________XXXXX______________________
Data delay found: 35
11:10:44:setup_element:INFO: Eye window for uplink 29: _____________XXXXX______________________
Data delay found: 35
11:10:44:setup_element:INFO: Eye window for uplink 30: ______________XXXXXXX___________________
Data delay found: 37
11:10:44:setup_element:INFO: Eye window for uplink 31: ______________XXXXX_____________________
Data delay found: 36
11:10:44:setup_element:INFO: Setting the data phase to 30 for uplink 24
11:10:44:setup_element:INFO: Setting the data phase to 32 for uplink 25
11:10:44:setup_element:INFO: Setting the data phase to 32 for uplink 26
11:10:44:setup_element:INFO: Setting the data phase to 34 for uplink 27
11:10:44:setup_element:INFO: Setting the data phase to 35 for uplink 28
11:10:44:setup_element:INFO: Setting the data phase to 35 for uplink 29
11:10:44:setup_element:INFO: Setting the data phase to 37 for uplink 30
11:10:44:setup_element:INFO: Setting the data phase to 36 for uplink 31
11:10:44:setup_element:INFO: Beginning SMX ASICs map scan
11:10:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:10:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:10:44:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:10:44:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:10:44:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
11:10:44:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:10:44:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:10:45:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:10:45:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:10:45:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:10:45:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:10:46:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:10:46:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:10:47:setup_element:INFO: Performing Elink synchronization
11:10:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:10:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:10:47:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:10:47:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:10:47:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:10:47:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:10:47:febtest:INFO: Init all SMX (CSA): 30
11:10:56:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:10:56:febtest:INFO: 30-01 | XA-000-09-004-035-010-008-13 | 25.1 | 1201.0
11:10:56:febtest:INFO: 28-03 | XA-000-09-004-035-007-008-10 | 18.7 | 1224.5
11:10:57:febtest:INFO: 26-05 | XA-000-09-004-035-004-007-04 | 25.1 | 1195.1
11:10:57:febtest:INFO: 24-07 | XA-000-09-004-035-007-007-10 | 25.1 | 1206.9
11:10:58:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:11:00:ST3_smx:INFO: chip: 30-1 25.062742 C 1206.851500 mV
11:11:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:11:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:11:00:ST3_smx:INFO: Electrons
11:11:00:ST3_smx:INFO: # loops 0
11:11:02:ST3_smx:INFO: # loops 1
11:11:04:ST3_smx:INFO: # loops 2
11:11:07:ST3_smx:INFO: Total # of broken channels: 0
11:11:07:ST3_smx:INFO: List of broken channels: []
11:11:07:ST3_smx:INFO: Total # of broken channels: 0
11:11:07:ST3_smx:INFO: List of broken channels: []
11:11:08:ST3_smx:INFO: chip: 28-3 18.745682 C 1236.187875 mV
11:11:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:11:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:11:08:ST3_smx:INFO: Electrons
11:11:08:ST3_smx:INFO: # loops 0
11:11:11:ST3_smx:INFO: # loops 1
11:11:13:ST3_smx:INFO: # loops 2
11:11:14:ST3_smx:INFO: Total # of broken channels: 0
11:11:14:ST3_smx:INFO: List of broken channels: []
11:11:14:ST3_smx:INFO: Total # of broken channels: 0
11:11:14:ST3_smx:INFO: List of broken channels: []
11:11:16:ST3_smx:INFO: chip: 26-5 25.062742 C 1206.851500 mV
11:11:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:11:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:11:16:ST3_smx:INFO: Electrons
11:11:16:ST3_smx:INFO: # loops 0
11:11:18:ST3_smx:INFO: # loops 1
11:11:20:ST3_smx:INFO: # loops 2
11:11:22:ST3_smx:INFO: Total # of broken channels: 0
11:11:22:ST3_smx:INFO: List of broken channels: []
11:11:22:ST3_smx:INFO: Total # of broken channels: 0
11:11:22:ST3_smx:INFO: List of broken channels: []
11:11:24:ST3_smx:INFO: chip: 24-7 25.062742 C 1212.728715 mV
11:11:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:11:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:11:24:ST3_smx:INFO: Electrons
11:11:24:ST3_smx:INFO: # loops 0
11:11:26:ST3_smx:INFO: # loops 1
11:11:28:ST3_smx:INFO: # loops 2
11:11:29:ST3_smx:INFO: Total # of broken channels: 0
11:11:29:ST3_smx:INFO: List of broken channels: []
11:11:29:ST3_smx:INFO: Total # of broken channels: 0
11:11:29:ST3_smx:INFO: List of broken channels: []
11:11:30:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:11:30:febtest:INFO: 30-01 | XA-000-09-004-035-010-008-13 | 25.1 | 1230.3
11:11:30:febtest:INFO: 28-03 | XA-000-09-004-035-007-008-10 | 18.7 | 1259.6
11:11:30:febtest:INFO: 26-05 | XA-000-09-004-035-004-007-04 | 28.2 | 1230.3
11:11:31:febtest:INFO: 24-07 | XA-000-09-004-035-007-007-10 | 28.2 | 1236.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_09_23-11_10_36
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4253| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.8421', '1.847', '1.4750']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0040', '1.850', '1.2760']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9780', '1.850', '0.2591']