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FEB_4254 29.09.25 15:08:01
Info
15:08:01:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:08:01:ST3_Shared:INFO: FEB-Microcable
15:08:01:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:08:01:febtest:INFO: Testing FEB with SN 4254
15:08:02:smx_tester:INFO: Scanning setup
15:08:02:elinks:INFO: Disabling clock on downlink 0
15:08:02:elinks:INFO: Disabling clock on downlink 1
15:08:02:elinks:INFO: Disabling clock on downlink 2
15:08:02:elinks:INFO: Disabling clock on downlink 3
15:08:02:elinks:INFO: Disabling clock on downlink 4
15:08:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:08:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:08:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:08:02:elinks:INFO: Disabling clock on downlink 0
15:08:02:elinks:INFO: Disabling clock on downlink 1
15:08:02:elinks:INFO: Disabling clock on downlink 2
15:08:02:elinks:INFO: Disabling clock on downlink 3
15:08:02:elinks:INFO: Disabling clock on downlink 4
15:08:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:08:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:08:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:08:02:elinks:INFO: Disabling clock on downlink 0
15:08:02:elinks:INFO: Disabling clock on downlink 1
15:08:02:elinks:INFO: Disabling clock on downlink 2
15:08:02:elinks:INFO: Disabling clock on downlink 3
15:08:02:elinks:INFO: Disabling clock on downlink 4
15:08:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:08:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:08:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
15:08:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
15:08:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
15:08:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
15:08:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
15:08:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
15:08:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
15:08:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
15:08:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:08:03:elinks:INFO: Disabling clock on downlink 0
15:08:03:elinks:INFO: Disabling clock on downlink 1
15:08:03:elinks:INFO: Disabling clock on downlink 2
15:08:03:elinks:INFO: Disabling clock on downlink 3
15:08:03:elinks:INFO: Disabling clock on downlink 4
15:08:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:08:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:08:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:08:03:elinks:INFO: Disabling clock on downlink 0
15:08:03:elinks:INFO: Disabling clock on downlink 1
15:08:03:elinks:INFO: Disabling clock on downlink 2
15:08:03:elinks:INFO: Disabling clock on downlink 3
15:08:03:elinks:INFO: Disabling clock on downlink 4
15:08:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:08:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:08:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:08:03:setup_element:INFO: Scanning clock phase
15:08:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:08:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:08:03:setup_element:INFO: Clock phase scan results for group 0, downlink 2
15:08:03:setup_element:INFO: Eye window for uplink 24: __________________________________________________________________XXXXXX________
Clock Delay: 28
15:08:03:setup_element:INFO: Eye window for uplink 25: __________________________________________________________________XXXXXX________
Clock Delay: 28
15:08:03:setup_element:INFO: Eye window for uplink 26: __________________________________________________________________XXXXXX________
Clock Delay: 28
15:08:03:setup_element:INFO: Eye window for uplink 27: __________________________________________________________________XXXXXX________
Clock Delay: 28
15:08:03:setup_element:INFO: Eye window for uplink 28: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
15:08:03:setup_element:INFO: Eye window for uplink 29: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
15:08:03:setup_element:INFO: Eye window for uplink 30: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
15:08:03:setup_element:INFO: Eye window for uplink 31: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
15:08:03:setup_element:INFO: Setting the clock phase to 29 for group 0, downlink 2
15:08:03:setup_element:INFO: Scanning data phases
15:08:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:08:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:08:08:setup_element:INFO: Data phase scan results for group 0, downlink 2
15:08:08:setup_element:INFO: Eye window for uplink 24: _______XXXXXXXX_________________________
Data delay found: 30
15:08:08:setup_element:INFO: Eye window for uplink 25: _________XXXXXXX________________________
Data delay found: 32
15:08:08:setup_element:INFO: Eye window for uplink 26: ________XXXXXXXX________________________
Data delay found: 31
15:08:08:setup_element:INFO: Eye window for uplink 27: __________XXXXXXXX______________________
Data delay found: 33
15:08:08:setup_element:INFO: Eye window for uplink 28: _____________XXXXXXXX___________________
Data delay found: 36
15:08:08:setup_element:INFO: Eye window for uplink 29: _____________XXXXXXXX___________________
Data delay found: 36
15:08:08:setup_element:INFO: Eye window for uplink 30: _____________XXXXXXXXXXXX_______________
Data delay found: 38
15:08:08:setup_element:INFO: Eye window for uplink 31: _____________XXXXXXXXXX_________________
Data delay found: 37
15:08:08:setup_element:INFO: Setting the data phase to 30 for uplink 24
15:08:08:setup_element:INFO: Setting the data phase to 32 for uplink 25
15:08:08:setup_element:INFO: Setting the data phase to 31 for uplink 26
15:08:08:setup_element:INFO: Setting the data phase to 33 for uplink 27
15:08:08:setup_element:INFO: Setting the data phase to 36 for uplink 28
15:08:08:setup_element:INFO: Setting the data phase to 36 for uplink 29
15:08:08:setup_element:INFO: Setting the data phase to 38 for uplink 30
15:08:08:setup_element:INFO: Setting the data phase to 37 for uplink 31
15:08:08:setup_element:INFO: Beginning SMX ASICs map scan
15:08:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:08:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:08:08:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:08:08:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:08:08:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
15:08:09:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
15:08:09:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
15:08:09:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
15:08:09:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
15:08:09:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
15:08:09:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
15:08:10:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
15:08:10:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
15:08:11:setup_element:INFO: Performing Elink synchronization
15:08:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:08:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:08:11:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:08:11:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:08:11:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
15:08:11:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
15:08:12:febtest:INFO: Init all SMX (CSA): 30
15:08:21:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:08:21:febtest:INFO: 30-01 | XA-000-09-004-035-014-026-12 | 9.3 | 1224.5
15:08:21:febtest:INFO: 28-03 | XA-000-09-004-035-008-026-09 | 18.7 | 1201.0
15:08:21:febtest:INFO: 26-05 | XA-000-09-004-042-015-022-06 | 21.9 | 1201.0
15:08:22:febtest:INFO: 24-07 | XA-000-09-004-035-008-025-09 | 28.2 | 1165.6
15:08:23:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
15:08:25:ST3_smx:INFO: chip: 30-1 9.288730 C 1230.330540 mV
15:08:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:08:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:08:25:ST3_smx:INFO: Electrons
15:08:25:ST3_smx:INFO: # loops 0
15:08:27:ST3_smx:INFO: # loops 1
15:08:29:ST3_smx:INFO: # loops 2
15:08:31:ST3_smx:INFO: Total # of broken channels: 0
15:08:31:ST3_smx:INFO: List of broken channels: []
15:08:31:ST3_smx:INFO: Total # of broken channels: 0
15:08:31:ST3_smx:INFO: List of broken channels: []
15:08:32:ST3_smx:INFO: chip: 28-3 18.745682 C 1212.728715 mV
15:08:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:08:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:08:32:ST3_smx:INFO: Electrons
15:08:32:ST3_smx:INFO: # loops 0
15:08:34:ST3_smx:INFO: # loops 1
15:08:36:ST3_smx:INFO: # loops 2
15:08:38:ST3_smx:INFO: Total # of broken channels: 0
15:08:38:ST3_smx:INFO: List of broken channels: []
15:08:38:ST3_smx:INFO: Total # of broken channels: 0
15:08:38:ST3_smx:INFO: List of broken channels: []
15:08:40:ST3_smx:INFO: chip: 26-5 25.062742 C 1206.851500 mV
15:08:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:08:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:08:40:ST3_smx:INFO: Electrons
15:08:40:ST3_smx:INFO: # loops 0
15:08:42:ST3_smx:INFO: # loops 1
15:08:44:ST3_smx:INFO: # loops 2
15:08:46:ST3_smx:INFO: Total # of broken channels: 0
15:08:46:ST3_smx:INFO: List of broken channels: []
15:08:46:ST3_smx:INFO: Total # of broken channels: 0
15:08:46:ST3_smx:INFO: List of broken channels: []
15:08:47:ST3_smx:INFO: chip: 24-7 28.225000 C 1177.390875 mV
15:08:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:08:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:08:47:ST3_smx:INFO: Electrons
15:08:47:ST3_smx:INFO: # loops 0
15:08:49:ST3_smx:INFO: # loops 1
15:08:52:ST3_smx:INFO: # loops 2
15:08:54:ST3_smx:INFO: Total # of broken channels: 0
15:08:54:ST3_smx:INFO: List of broken channels: []
15:08:54:ST3_smx:INFO: Total # of broken channels: 0
15:08:54:ST3_smx:INFO: List of broken channels: []
15:08:54:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:08:54:febtest:INFO: 30-01 | XA-000-09-004-035-014-026-12 | 12.4 | 1259.6
15:08:55:febtest:INFO: 28-03 | XA-000-09-004-035-008-026-09 | 21.9 | 1236.2
15:08:55:febtest:INFO: 26-05 | XA-000-09-004-042-015-022-06 | 21.9 | 1230.3
15:08:55:febtest:INFO: 24-07 | XA-000-09-004-035-008-025-09 | 31.4 | 1201.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_09_29-15_08_01
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4254| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.8063', '1.847', '1.0650']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0050', '1.850', '1.2690']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9795', '1.850', '0.2574']