09:12:27:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:12:27:ST3_Shared:INFO:	                       FEB-Microcable                       
09:12:27:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:12:27:febtest:INFO:	Testing FEB with SN 4255
09:12:29:smx_tester:INFO:	Scanning setup
09:12:29:elinks:INFO:	Disabling clock on downlink 0
09:12:29:elinks:INFO:	Disabling clock on downlink 1
09:12:29:elinks:INFO:	Disabling clock on downlink 2
09:12:29:elinks:INFO:	Disabling clock on downlink 3
09:12:29:elinks:INFO:	Disabling clock on downlink 4
09:12:29:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:12:29:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:12:29:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:12:29:elinks:INFO:	Disabling clock on downlink 0
09:12:29:elinks:INFO:	Disabling clock on downlink 1
09:12:29:elinks:INFO:	Disabling clock on downlink 2
09:12:29:elinks:INFO:	Disabling clock on downlink 3
09:12:29:elinks:INFO:	Disabling clock on downlink 4
09:12:29:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:12:29:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:12:29:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:12:29:elinks:INFO:	Disabling clock on downlink 0
09:12:29:elinks:INFO:	Disabling clock on downlink 1
09:12:29:elinks:INFO:	Disabling clock on downlink 2
09:12:29:elinks:INFO:	Disabling clock on downlink 3
09:12:29:elinks:INFO:	Disabling clock on downlink 4
09:12:29:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:12:29:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:12:29:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
09:12:29:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
09:12:29:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
09:12:29:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
09:12:29:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
09:12:29:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
09:12:29:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
09:12:29:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
09:12:29:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:12:29:elinks:INFO:	Disabling clock on downlink 0
09:12:29:elinks:INFO:	Disabling clock on downlink 1
09:12:30:elinks:INFO:	Disabling clock on downlink 2
09:12:30:elinks:INFO:	Disabling clock on downlink 3
09:12:30:elinks:INFO:	Disabling clock on downlink 4
09:12:30:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:12:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:12:30:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:12:30:elinks:INFO:	Disabling clock on downlink 0
09:12:30:elinks:INFO:	Disabling clock on downlink 1
09:12:30:elinks:INFO:	Disabling clock on downlink 2
09:12:30:elinks:INFO:	Disabling clock on downlink 3
09:12:30:elinks:INFO:	Disabling clock on downlink 4
09:12:30:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:12:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:12:30:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:12:30:setup_element:INFO:	Scanning clock phase
09:12:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:12:30:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:12:30:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
09:12:30:setup_element:INFO:	Eye window for uplink 24: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:12:30:setup_element:INFO:	Eye window for uplink 25: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
09:12:30:setup_element:INFO:	Eye window for uplink 26: ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:12:30:setup_element:INFO:	Eye window for uplink 27: ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:12:30:setup_element:INFO:	Eye window for uplink 28: _______________________________________________________________________XXXXXX___
Clock Delay: 33
09:12:30:setup_element:INFO:	Eye window for uplink 29: _______________________________________________________________________XXXXXX___
Clock Delay: 33
09:12:30:setup_element:INFO:	Eye window for uplink 30: _______________________________________________________________________XXXXX____
Clock Delay: 33
09:12:30:setup_element:INFO:	Eye window for uplink 31: _______________________________________________________________________XXXXX____
Clock Delay: 33
09:12:30:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 2
09:12:30:setup_element:INFO:	Scanning data phases
09:12:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:12:30:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:12:35:setup_element:INFO:	Data phase scan results for group 0, downlink 2
09:12:35:setup_element:INFO:	Eye window for uplink 24: ______XXXXXXXX__________________________
Data delay found: 29
09:12:35:setup_element:INFO:	Eye window for uplink 25: ________XXXXXXX_________________________
Data delay found: 31
09:12:35:setup_element:INFO:	Eye window for uplink 26: ________XXXXXXX_________________________
Data delay found: 31
09:12:35:setup_element:INFO:	Eye window for uplink 27: __________XXXXXXX_______________________
Data delay found: 33
09:12:35:setup_element:INFO:	Eye window for uplink 28: _______________XXXXXX___________________
Data delay found: 37
09:12:35:setup_element:INFO:	Eye window for uplink 29: _______________XXXXX____________________
Data delay found: 37
09:12:35:setup_element:INFO:	Eye window for uplink 30: ________________XXXXXXX_________________
Data delay found: 39
09:12:35:setup_element:INFO:	Eye window for uplink 31: ________________XXXXX___________________
Data delay found: 38
09:12:35:setup_element:INFO:	Setting the data phase to 29 for uplink 24
09:12:35:setup_element:INFO:	Setting the data phase to 31 for uplink 25
09:12:35:setup_element:INFO:	Setting the data phase to 31 for uplink 26
09:12:35:setup_element:INFO:	Setting the data phase to 33 for uplink 27
09:12:35:setup_element:INFO:	Setting the data phase to 37 for uplink 28
09:12:35:setup_element:INFO:	Setting the data phase to 37 for uplink 29
09:12:35:setup_element:INFO:	Setting the data phase to 39 for uplink 30
09:12:35:setup_element:INFO:	Setting the data phase to 38 for uplink 31
09:12:35:setup_element:INFO:	Beginning SMX ASICs map scan
09:12:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:12:35:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:12:35:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:12:35:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:12:35:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
09:12:35:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:12:36:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:12:36:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:12:36:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:12:36:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:12:36:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:12:37:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:12:37:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:12:38:setup_element:INFO:	Performing Elink synchronization
09:12:38:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:12:38:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:12:38:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:12:38:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:12:38:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
09:12:38:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:12:38:febtest:INFO:	Init all SMX (CSA): 30
09:12:48:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:12:48:febtest:INFO:	30-01 | XA-000-09-004-035-010-004-13 |  25.1 | 1195.1
09:12:48:febtest:INFO:	28-03 | XA-000-09-004-035-007-004-10 |  37.7 | 1153.7
09:12:48:febtest:INFO:	26-05 | XA-000-09-004-035-007-003-10 |  37.7 | 1159.7
09:12:49:febtest:INFO:	24-07 | XA-000-09-004-035-010-003-13 |  25.1 | 1195.1
09:12:50:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:12:51:ST3_smx:INFO:	chip: 30-1 	 25.062742 C 	 1206.851500 mV
09:12:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:12:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:12:51:ST3_smx:INFO:		Electrons
09:12:51:ST3_smx:INFO:	# loops 0
09:12:53:ST3_smx:INFO:	# loops 1
09:12:55:ST3_smx:INFO:	# loops 2
09:12:58:ST3_smx:INFO:	Total # of broken channels: 0
09:12:58:ST3_smx:INFO:	List of broken channels: []
09:12:58:ST3_smx:INFO:	Total # of broken channels: 0
09:12:58:ST3_smx:INFO:	List of broken channels: []
09:12:59:ST3_smx:INFO:	chip: 28-3 	 40.898880 C 	 1165.571835 mV
09:12:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:12:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:12:59:ST3_smx:INFO:		Electrons
09:12:59:ST3_smx:INFO:	# loops 0
09:13:02:ST3_smx:INFO:	# loops 1
09:13:03:ST3_smx:INFO:	# loops 2
09:13:06:ST3_smx:INFO:	Total # of broken channels: 0
09:13:06:ST3_smx:INFO:	List of broken channels: []
09:13:06:ST3_smx:INFO:	Total # of broken channels: 0
09:13:06:ST3_smx:INFO:	List of broken channels: []
09:13:08:ST3_smx:INFO:	chip: 26-5 	 37.726682 C 	 1165.571835 mV
09:13:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:13:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:13:08:ST3_smx:INFO:		Electrons
09:13:08:ST3_smx:INFO:	# loops 0
09:13:10:ST3_smx:INFO:	# loops 1
09:13:12:ST3_smx:INFO:	# loops 2
09:13:14:ST3_smx:INFO:	Total # of broken channels: 0
09:13:14:ST3_smx:INFO:	List of broken channels: []
09:13:14:ST3_smx:INFO:	Total # of broken channels: 0
09:13:14:ST3_smx:INFO:	List of broken channels: []
09:13:16:ST3_smx:INFO:	chip: 24-7 	 25.062742 C 	 1206.851500 mV
09:13:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:13:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:13:16:ST3_smx:INFO:		Electrons
09:13:16:ST3_smx:INFO:	# loops 0
09:13:18:ST3_smx:INFO:	# loops 1
09:13:20:ST3_smx:INFO:	# loops 2
09:13:22:ST3_smx:INFO:	Total # of broken channels: 0
09:13:22:ST3_smx:INFO:	List of broken channels: []
09:13:22:ST3_smx:INFO:	Total # of broken channels: 0
09:13:22:ST3_smx:INFO:	List of broken channels: []
09:13:23:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:13:23:febtest:INFO:	30-01 | XA-000-09-004-035-010-004-13 |  28.2 | 1230.3
09:13:23:febtest:INFO:	28-03 | XA-000-09-004-035-007-004-10 |  40.9 | 1189.2
09:13:23:febtest:INFO:	26-05 | XA-000-09-004-035-007-003-10 |  37.7 | 1189.2
09:13:24:febtest:INFO:	24-07 | XA-000-09-004-035-010-003-13 |  28.2 | 1230.3
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_09_25-09_12_27
OPERATOR  : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4255| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.6946', '1.847', '0.9526']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0030', '1.850', '1.2900']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9879', '1.850', '0.2633']