DTL-STS tests database

FEB_4259 07.10.25 14:50:56

link: XA-000-09-004-035-010-020-10
...SMX_0.root
link: XA-000-09-004-035-004-019-03
...SMX_2.root
link: XA-000-09-004-035-004-018-03
...SMX_4.root
link: XA-000-09-004-035-013-020-02
...SMX_6.root
link: XA-000-09-004-035-015-007-06
...SMX_1.root
link: XA-000-09-004-035-006-009-07
...SMX_3.root
link: XA-000-09-004-035-003-009-12
...SMX_5.root
link: XA-000-09-004-035-012-007-08
...SMX_7.root
link: XA-000-09-004-035-012-007-08
...VddmCSAstatus.root
Info
            14:50:56:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:50:56:ST3_Shared:INFO:	                       FEB-Microcable                       
14:50:56:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:50:56:febtest:INFO:	Testing FEB with SN 4259
14:50:57:smx_tester:INFO:	Scanning setup
14:50:57:elinks:INFO:	Disabling clock on downlink 0
14:50:57:elinks:INFO:	Disabling clock on downlink 1
14:50:57:elinks:INFO:	Disabling clock on downlink 2
14:50:57:elinks:INFO:	Disabling clock on downlink 3
14:50:57:elinks:INFO:	Disabling clock on downlink 4
14:50:57:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:50:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:50:58:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:50:58:elinks:INFO:	Disabling clock on downlink 0
14:50:58:elinks:INFO:	Disabling clock on downlink 1
14:50:58:elinks:INFO:	Disabling clock on downlink 2
14:50:58:elinks:INFO:	Disabling clock on downlink 3
14:50:58:elinks:INFO:	Disabling clock on downlink 4
14:50:58:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:50:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:50:58:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:50:58:elinks:INFO:	Disabling clock on downlink 0
14:50:58:elinks:INFO:	Disabling clock on downlink 1
14:50:58:elinks:INFO:	Disabling clock on downlink 2
14:50:58:elinks:INFO:	Disabling clock on downlink 3
14:50:58:elinks:INFO:	Disabling clock on downlink 4
14:50:58:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:50:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:50:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
14:50:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
14:50:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
14:50:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
14:50:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
14:50:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
14:50:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
14:50:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
14:50:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
14:50:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
14:50:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
14:50:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
14:50:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
14:50:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
14:50:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
14:50:58:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
14:50:58:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:50:58:elinks:INFO:	Disabling clock on downlink 0
14:50:58:elinks:INFO:	Disabling clock on downlink 1
14:50:58:elinks:INFO:	Disabling clock on downlink 2
14:50:58:elinks:INFO:	Disabling clock on downlink 3
14:50:58:elinks:INFO:	Disabling clock on downlink 4
14:50:58:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:50:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:50:58:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:50:58:elinks:INFO:	Disabling clock on downlink 0
14:50:58:elinks:INFO:	Disabling clock on downlink 1
14:50:58:elinks:INFO:	Disabling clock on downlink 2
14:50:58:elinks:INFO:	Disabling clock on downlink 3
14:50:58:elinks:INFO:	Disabling clock on downlink 4
14:50:58:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:50:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:50:58:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:50:58:setup_element:INFO:	Scanning clock phase
14:50:58:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:50:58:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:50:58:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
14:50:58:setup_element:INFO:	Eye window for uplink 16: __________________________________________________________________XXXXXX________
Clock Delay: 28
14:50:59:setup_element:INFO:	Eye window for uplink 17: __________________________________________________________________XXXXXX________
Clock Delay: 28
14:50:59:setup_element:INFO:	Eye window for uplink 18: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
14:50:59:setup_element:INFO:	Eye window for uplink 19: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
14:50:59:setup_element:INFO:	Eye window for uplink 20: ____________________________________________________________________XXXXXX______
Clock Delay: 30
14:50:59:setup_element:INFO:	Eye window for uplink 21: ____________________________________________________________________XXXXXX______
Clock Delay: 30
14:50:59:setup_element:INFO:	Eye window for uplink 22: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
14:50:59:setup_element:INFO:	Eye window for uplink 23: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
14:50:59:setup_element:INFO:	Eye window for uplink 24: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
14:50:59:setup_element:INFO:	Eye window for uplink 25: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
14:50:59:setup_element:INFO:	Eye window for uplink 26: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
14:50:59:setup_element:INFO:	Eye window for uplink 27: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
14:50:59:setup_element:INFO:	Eye window for uplink 28: ___________________________________________________________________XXXXX________
Clock Delay: 29
14:50:59:setup_element:INFO:	Eye window for uplink 29: ___________________________________________________________________XXXXX________
Clock Delay: 29
14:50:59:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
14:50:59:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
14:50:59:setup_element:INFO:	Setting the clock phase to 30 for group 0, downlink 2
14:50:59:setup_element:INFO:	Scanning data phases
14:50:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:50:59:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:51:04:setup_element:INFO:	Data phase scan results for group 0, downlink 2
14:51:04:setup_element:INFO:	Eye window for uplink 16: X_________________________________XXXXXX
Data delay found: 17
14:51:04:setup_element:INFO:	Eye window for uplink 17: _________________________________XXXXXX_
Data delay found: 15
14:51:04:setup_element:INFO:	Eye window for uplink 18: _______________________________XXXXXXXX_
Data delay found: 14
14:51:04:setup_element:INFO:	Eye window for uplink 19: ______________________________XXXXXXXXX_
Data delay found: 14
14:51:04:setup_element:INFO:	Eye window for uplink 20: XX_______________________________XXXXXXX
Data delay found: 17
14:51:04:setup_element:INFO:	Eye window for uplink 21: XXX_______________________________XXXXXX
Data delay found: 18
14:51:04:setup_element:INFO:	Eye window for uplink 22: XX________________________________XXXXXX
Data delay found: 17
14:51:04:setup_element:INFO:	Eye window for uplink 23: _______________________________XXXXXXX__
Data delay found: 14
14:51:04:setup_element:INFO:	Eye window for uplink 24: ___XXXXXXXXX____________________________
Data delay found: 27
14:51:04:setup_element:INFO:	Eye window for uplink 25: _____XXXXXXXXX__________________________
Data delay found: 29
14:51:04:setup_element:INFO:	Eye window for uplink 26: ___XXXXXXXXXXX__________________________
Data delay found: 28
14:51:04:setup_element:INFO:	Eye window for uplink 27: _____XXXXXXXXXXX________________________
Data delay found: 30
14:51:04:setup_element:INFO:	Eye window for uplink 28: _________XXXXXXXX_______________________
Data delay found: 32
14:51:04:setup_element:INFO:	Eye window for uplink 29: _________XXXXXXX________________________
Data delay found: 32
14:51:04:setup_element:INFO:	Eye window for uplink 30: ______________XXXXXXXXX_________________
Data delay found: 38
14:51:04:setup_element:INFO:	Eye window for uplink 31: ______________XXXXXXXX__________________
Data delay found: 37
14:51:04:setup_element:INFO:	Setting the data phase to 17 for uplink 16
14:51:04:setup_element:INFO:	Setting the data phase to 15 for uplink 17
14:51:04:setup_element:INFO:	Setting the data phase to 14 for uplink 18
14:51:04:setup_element:INFO:	Setting the data phase to 14 for uplink 19
14:51:04:setup_element:INFO:	Setting the data phase to 17 for uplink 20
14:51:04:setup_element:INFO:	Setting the data phase to 18 for uplink 21
14:51:04:setup_element:INFO:	Setting the data phase to 17 for uplink 22
14:51:04:setup_element:INFO:	Setting the data phase to 14 for uplink 23
14:51:04:setup_element:INFO:	Setting the data phase to 27 for uplink 24
14:51:04:setup_element:INFO:	Setting the data phase to 29 for uplink 25
14:51:04:setup_element:INFO:	Setting the data phase to 28 for uplink 26
14:51:04:setup_element:INFO:	Setting the data phase to 30 for uplink 27
14:51:04:setup_element:INFO:	Setting the data phase to 32 for uplink 28
14:51:04:setup_element:INFO:	Setting the data phase to 32 for uplink 29
14:51:04:setup_element:INFO:	Setting the data phase to 38 for uplink 30
14:51:04:setup_element:INFO:	Setting the data phase to 37 for uplink 31
14:51:04:setup_element:INFO:	Beginning SMX ASICs map scan
14:51:04:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:51:04:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:51:04:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:51:04:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:51:04:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:51:04:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
14:51:04:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
14:51:04:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:51:04:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:51:04:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
14:51:04:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
14:51:05:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:51:05:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:51:05:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
14:51:05:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
14:51:05:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:51:05:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:51:05:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
14:51:05:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
14:51:05:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:51:05:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:51:07:setup_element:INFO:	Performing Elink synchronization
14:51:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:51:07:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:51:07:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:51:07:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:51:07:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
14:51:07:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
14:51:07:febtest:INFO:	Init all SMX (CSA): 30
14:51:24:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:51:24:febtest:INFO:	23-00 | XA-000-09-004-035-010-020-10 |  31.4 | 1177.4
14:51:24:febtest:INFO:	30-01 | XA-000-09-004-035-015-007-06 |  34.6 | 1177.4
14:51:24:febtest:INFO:	21-02 | XA-000-09-004-035-004-019-03 |  34.6 | 1171.5
14:51:25:febtest:INFO:	28-03 | XA-000-09-004-035-006-009-07 |  25.1 | 1218.6
14:51:25:febtest:INFO:	19-04 | XA-000-09-004-035-004-018-03 |  34.6 | 1177.4
14:51:25:febtest:INFO:	26-05 | XA-000-09-004-035-003-009-12 |  37.7 | 1171.5
14:51:25:febtest:INFO:	17-06 | XA-000-09-004-035-013-020-02 |  31.4 | 1195.1
14:51:26:febtest:INFO:	24-07 | XA-000-09-004-035-012-007-08 |  37.7 | 1171.5
14:51:27:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:51:28:ST3_smx:INFO:	chip: 23-0 	 31.389742 C 	 1189.190035 mV
14:51:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:51:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:51:28:ST3_smx:INFO:		Electrons
14:51:29:ST3_smx:INFO:	# loops 0
14:51:30:ST3_smx:INFO:	# loops 1
14:51:32:ST3_smx:INFO:	# loops 2
14:51:34:ST3_smx:INFO:	Total # of broken channels: 0
14:51:34:ST3_smx:INFO:	List of broken channels: []
14:51:34:ST3_smx:INFO:	Total # of broken channels: 0
14:51:34:ST3_smx:INFO:	List of broken channels: []
14:51:36:ST3_smx:INFO:	chip: 30-1 	 34.556970 C 	 1195.082160 mV
14:51:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:51:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:51:36:ST3_smx:INFO:		Electrons
14:51:36:ST3_smx:INFO:	# loops 0
14:51:38:ST3_smx:INFO:	# loops 1
14:51:40:ST3_smx:INFO:	# loops 2
14:51:42:ST3_smx:INFO:	Total # of broken channels: 0
14:51:42:ST3_smx:INFO:	List of broken channels: []
14:51:42:ST3_smx:INFO:	Total # of broken channels: 0
14:51:42:ST3_smx:INFO:	List of broken channels: []
14:51:43:ST3_smx:INFO:	chip: 21-2 	 34.556970 C 	 1189.190035 mV
14:51:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:51:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:51:43:ST3_smx:INFO:		Electrons
14:51:43:ST3_smx:INFO:	# loops 0
14:51:45:ST3_smx:INFO:	# loops 1
14:51:47:ST3_smx:INFO:	# loops 2
14:51:49:ST3_smx:INFO:	Total # of broken channels: 0
14:51:49:ST3_smx:INFO:	List of broken channels: []
14:51:49:ST3_smx:INFO:	Total # of broken channels: 0
14:51:49:ST3_smx:INFO:	List of broken channels: []
14:51:51:ST3_smx:INFO:	chip: 28-3 	 25.062742 C 	 1236.187875 mV
14:51:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:51:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:51:51:ST3_smx:INFO:		Electrons
14:51:51:ST3_smx:INFO:	# loops 0
14:51:53:ST3_smx:INFO:	# loops 1
14:51:55:ST3_smx:INFO:	# loops 2
14:51:56:ST3_smx:INFO:	Total # of broken channels: 0
14:51:56:ST3_smx:INFO:	List of broken channels: []
14:51:56:ST3_smx:INFO:	Total # of broken channels: 0
14:51:56:ST3_smx:INFO:	List of broken channels: []
14:51:58:ST3_smx:INFO:	chip: 19-4 	 34.556970 C 	 1189.190035 mV
14:51:58:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:51:58:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:51:58:ST3_smx:INFO:		Electrons
14:51:58:ST3_smx:INFO:	# loops 0
14:52:00:ST3_smx:INFO:	# loops 1
14:52:02:ST3_smx:INFO:	# loops 2
14:52:04:ST3_smx:INFO:	Total # of broken channels: 0
14:52:04:ST3_smx:INFO:	List of broken channels: []
14:52:04:ST3_smx:INFO:	Total # of broken channels: 0
14:52:04:ST3_smx:INFO:	List of broken channels: []
14:52:05:ST3_smx:INFO:	chip: 26-5 	 37.726682 C 	 1183.292940 mV
14:52:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:52:05:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:52:05:ST3_smx:INFO:		Electrons
14:52:05:ST3_smx:INFO:	# loops 0
14:52:07:ST3_smx:INFO:	# loops 1
14:52:09:ST3_smx:INFO:	# loops 2
14:52:11:ST3_smx:INFO:	Total # of broken channels: 0
14:52:11:ST3_smx:INFO:	List of broken channels: []
14:52:11:ST3_smx:INFO:	Total # of broken channels: 0
14:52:11:ST3_smx:INFO:	List of broken channels: []
14:52:13:ST3_smx:INFO:	chip: 17-6 	 31.389742 C 	 1206.851500 mV
14:52:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:52:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:52:13:ST3_smx:INFO:		Electrons
14:52:13:ST3_smx:INFO:	# loops 0
14:52:15:ST3_smx:INFO:	# loops 1
14:52:17:ST3_smx:INFO:	# loops 2
14:52:19:ST3_smx:INFO:	Total # of broken channels: 0
14:52:19:ST3_smx:INFO:	List of broken channels: []
14:52:19:ST3_smx:INFO:	Total # of broken channels: 0
14:52:19:ST3_smx:INFO:	List of broken channels: []
14:52:20:ST3_smx:INFO:	chip: 24-7 	 37.726682 C 	 1183.292940 mV
14:52:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:52:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:52:20:ST3_smx:INFO:		Electrons
14:52:20:ST3_smx:INFO:	# loops 0
14:52:22:ST3_smx:INFO:	# loops 1
14:52:24:ST3_smx:INFO:	# loops 2
14:52:26:ST3_smx:INFO:	Total # of broken channels: 0
14:52:26:ST3_smx:INFO:	List of broken channels: []
14:52:26:ST3_smx:INFO:	Total # of broken channels: 1
14:52:26:ST3_smx:INFO:	List of broken channels: [79]
14:52:26:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:52:27:febtest:INFO:	23-00 | XA-000-09-004-035-010-020-10 |  34.6 | 1212.7
14:52:27:febtest:INFO:	30-01 | XA-000-09-004-035-015-007-06 |  34.6 | 1236.2
14:52:27:febtest:INFO:	21-02 | XA-000-09-004-035-004-019-03 |  34.6 | 1212.7
14:52:27:febtest:INFO:	28-03 | XA-000-09-004-035-006-009-07 |  28.2 | 1259.6
14:52:28:febtest:INFO:	19-04 | XA-000-09-004-035-004-018-03 |  34.6 | 1212.7
14:52:28:febtest:INFO:	26-05 | XA-000-09-004-035-003-009-12 |  40.9 | 1206.9
14:52:28:febtest:INFO:	17-06 | XA-000-09-004-035-013-020-02 |  31.4 | 1224.5
14:52:28:febtest:INFO:	24-07 | XA-000-09-004-035-012-007-08 |  40.9 | 1201.0
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_10_07-14_50_56
OPERATOR  : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4259| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5400', '1.849', '2.5670']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9940', '1.850', '2.5360']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9650', '1.850', '0.5203']
Comment