FEB_4262 10.10.25 12:08:16
Info
12:08:16:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:08:16:ST3_Shared:INFO: FEB-Microcable
12:08:16:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:08:16:febtest:INFO: Testing FEB with SN 4262
12:08:17:smx_tester:INFO: Scanning setup
12:08:17:elinks:INFO: Disabling clock on downlink 0
12:08:17:elinks:INFO: Disabling clock on downlink 1
12:08:17:elinks:INFO: Disabling clock on downlink 2
12:08:17:elinks:INFO: Disabling clock on downlink 3
12:08:17:elinks:INFO: Disabling clock on downlink 4
12:08:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:08:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:08:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:08:18:elinks:INFO: Disabling clock on downlink 0
12:08:18:elinks:INFO: Disabling clock on downlink 1
12:08:18:elinks:INFO: Disabling clock on downlink 2
12:08:18:elinks:INFO: Disabling clock on downlink 3
12:08:18:elinks:INFO: Disabling clock on downlink 4
12:08:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:08:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:08:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:08:18:elinks:INFO: Disabling clock on downlink 0
12:08:18:elinks:INFO: Disabling clock on downlink 1
12:08:18:elinks:INFO: Disabling clock on downlink 2
12:08:18:elinks:INFO: Disabling clock on downlink 3
12:08:18:elinks:INFO: Disabling clock on downlink 4
12:08:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:08:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:08:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
12:08:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
12:08:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
12:08:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
12:08:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
12:08:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
12:08:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
12:08:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
12:08:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:08:18:elinks:INFO: Disabling clock on downlink 0
12:08:18:elinks:INFO: Disabling clock on downlink 1
12:08:18:elinks:INFO: Disabling clock on downlink 2
12:08:18:elinks:INFO: Disabling clock on downlink 3
12:08:18:elinks:INFO: Disabling clock on downlink 4
12:08:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:08:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
12:08:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:08:18:elinks:INFO: Disabling clock on downlink 0
12:08:18:elinks:INFO: Disabling clock on downlink 1
12:08:18:elinks:INFO: Disabling clock on downlink 2
12:08:18:elinks:INFO: Disabling clock on downlink 3
12:08:18:elinks:INFO: Disabling clock on downlink 4
12:08:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:08:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
12:08:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:08:18:setup_element:INFO: Scanning clock phase
12:08:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:08:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:08:18:setup_element:INFO: Clock phase scan results for group 0, downlink 2
12:08:18:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
12:08:18:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
12:08:18:setup_element:INFO: Eye window for uplink 26: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
12:08:18:setup_element:INFO: Eye window for uplink 27: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
12:08:18:setup_element:INFO: Eye window for uplink 28: __________________________________________________________________XXXXXX________
Clock Delay: 28
12:08:18:setup_element:INFO: Eye window for uplink 29: __________________________________________________________________XXXXXX________
Clock Delay: 28
12:08:18:setup_element:INFO: Eye window for uplink 30: _________________________________________________________________XXXXXX_________
Clock Delay: 27
12:08:18:setup_element:INFO: Eye window for uplink 31: _________________________________________________________________XXXXXX_________
Clock Delay: 27
12:08:18:setup_element:INFO: Setting the clock phase to 29 for group 0, downlink 2
12:08:18:setup_element:INFO: Scanning data phases
12:08:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:08:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:08:23:setup_element:INFO: Data phase scan results for group 0, downlink 2
12:08:23:setup_element:INFO: Eye window for uplink 24: ______XXXXXXXXXX________________________
Data delay found: 30
12:08:23:setup_element:INFO: Eye window for uplink 25: ________XXXXXXXXXX______________________
Data delay found: 32
12:08:23:setup_element:INFO: Eye window for uplink 26: __________XXXXXXX_______________________
Data delay found: 33
12:08:23:setup_element:INFO: Eye window for uplink 27: ___________XXXXXXXXX____________________
Data delay found: 35
12:08:23:setup_element:INFO: Eye window for uplink 28: ___________XXXXXXXX_____________________
Data delay found: 34
12:08:23:setup_element:INFO: Eye window for uplink 29: ____________XXXXXX______________________
Data delay found: 34
12:08:23:setup_element:INFO: Eye window for uplink 30: _____________XXXXXXXX___________________
Data delay found: 36
12:08:23:setup_element:INFO: Eye window for uplink 31: ____________XXXXXX______________________
Data delay found: 34
12:08:23:setup_element:INFO: Setting the data phase to 30 for uplink 24
12:08:23:setup_element:INFO: Setting the data phase to 32 for uplink 25
12:08:23:setup_element:INFO: Setting the data phase to 33 for uplink 26
12:08:23:setup_element:INFO: Setting the data phase to 35 for uplink 27
12:08:23:setup_element:INFO: Setting the data phase to 34 for uplink 28
12:08:24:setup_element:INFO: Setting the data phase to 34 for uplink 29
12:08:24:setup_element:INFO: Setting the data phase to 36 for uplink 30
12:08:24:setup_element:INFO: Setting the data phase to 34 for uplink 31
12:08:24:setup_element:INFO: Beginning SMX ASICs map scan
12:08:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:08:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:08:24:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
12:08:24:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
12:08:24:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
12:08:24:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
12:08:24:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
12:08:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
12:08:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
12:08:24:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
12:08:24:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
12:08:25:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
12:08:25:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
12:08:26:setup_element:INFO: Performing Elink synchronization
12:08:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:08:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:08:26:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
12:08:26:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
12:08:26:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
12:08:26:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
12:08:27:febtest:INFO: Init all SMX (CSA): 30
12:08:34:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:08:34:febtest:INFO: 30-01 | XA-000-09-004-042-012-022-08 | 34.6 | 1171.5
12:08:34:febtest:INFO: 28-03 | XA-000-09-004-042-009-027-03 | 34.6 | 1159.7
12:08:34:febtest:INFO: 26-05 | XA-000-09-004-042-015-025-06 | 18.7 | 1218.6
12:08:34:febtest:INFO: 24-07 | XA-000-09-004-042-012-025-08 | 34.6 | 1171.5
12:08:35:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
12:08:37:ST3_smx:INFO: chip: 30-1 34.556970 C 1183.292940 mV
12:08:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:08:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:08:37:ST3_smx:INFO: Electrons
12:08:37:ST3_smx:INFO: # loops 0
12:08:39:ST3_smx:INFO: # loops 1
12:08:41:ST3_smx:INFO: # loops 2
12:08:43:ST3_smx:INFO: Total # of broken channels: 0
12:08:43:ST3_smx:INFO: List of broken channels: []
12:08:43:ST3_smx:INFO: Total # of broken channels: 0
12:08:43:ST3_smx:INFO: List of broken channels: []
12:08:44:ST3_smx:INFO: chip: 28-3 34.556970 C 1171.483840 mV
12:08:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:08:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:08:44:ST3_smx:INFO: Electrons
12:08:44:ST3_smx:INFO: # loops 0
12:08:46:ST3_smx:INFO: # loops 1
12:08:48:ST3_smx:INFO: # loops 2
12:08:49:ST3_smx:INFO: Total # of broken channels: 0
12:08:49:ST3_smx:INFO: List of broken channels: []
12:08:49:ST3_smx:INFO: Total # of broken channels: 0
12:08:49:ST3_smx:INFO: List of broken channels: []
12:08:51:ST3_smx:INFO: chip: 26-5 18.745682 C 1230.330540 mV
12:08:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:08:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:08:51:ST3_smx:INFO: Electrons
12:08:51:ST3_smx:INFO: # loops 0
12:08:52:ST3_smx:INFO: # loops 1
12:08:54:ST3_smx:INFO: # loops 2
12:08:56:ST3_smx:INFO: Total # of broken channels: 0
12:08:56:ST3_smx:INFO: List of broken channels: []
12:08:56:ST3_smx:INFO: Total # of broken channels: 0
12:08:56:ST3_smx:INFO: List of broken channels: []
12:08:58:ST3_smx:INFO: chip: 24-7 34.556970 C 1177.390875 mV
12:08:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:08:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:08:58:ST3_smx:INFO: Electrons
12:08:58:ST3_smx:INFO: # loops 0
12:08:59:ST3_smx:INFO: # loops 1
12:09:01:ST3_smx:INFO: # loops 2
12:09:02:ST3_smx:INFO: Total # of broken channels: 0
12:09:02:ST3_smx:INFO: List of broken channels: []
12:09:02:ST3_smx:INFO: Total # of broken channels: 0
12:09:02:ST3_smx:INFO: List of broken channels: []
12:09:03:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:09:03:febtest:INFO: 30-01 | XA-000-09-004-042-012-022-08 | 34.6 | 1201.0
12:09:03:febtest:INFO: 28-03 | XA-000-09-004-042-009-027-03 | 34.6 | 1195.1
12:09:03:febtest:INFO: 26-05 | XA-000-09-004-042-015-025-06 | 21.9 | 1253.7
12:09:03:febtest:INFO: 24-07 | XA-000-09-004-042-012-025-08 | 37.7 | 1201.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_10_10-12_08_16
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4262| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.8014', '1.847', '1.5340']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0190', '1.850', '1.1980']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9948', '1.850', '0.2630']