FEB_4268 16.10.25 15:38:55
Info
15:38:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:38:55:ST3_Shared:INFO: FEB-Microcable
15:38:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:38:55:febtest:INFO: Testing FEB with SN 4268
15:38:56:smx_tester:INFO: Scanning setup
15:38:56:elinks:INFO: Disabling clock on downlink 0
15:38:56:elinks:INFO: Disabling clock on downlink 1
15:38:56:elinks:INFO: Disabling clock on downlink 2
15:38:56:elinks:INFO: Disabling clock on downlink 3
15:38:56:elinks:INFO: Disabling clock on downlink 4
15:38:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:38:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:38:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:38:56:elinks:INFO: Disabling clock on downlink 0
15:38:56:elinks:INFO: Disabling clock on downlink 1
15:38:56:elinks:INFO: Disabling clock on downlink 2
15:38:56:elinks:INFO: Disabling clock on downlink 3
15:38:56:elinks:INFO: Disabling clock on downlink 4
15:38:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:38:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:38:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:38:57:elinks:INFO: Disabling clock on downlink 0
15:38:57:elinks:INFO: Disabling clock on downlink 1
15:38:57:elinks:INFO: Disabling clock on downlink 2
15:38:57:elinks:INFO: Disabling clock on downlink 3
15:38:57:elinks:INFO: Disabling clock on downlink 4
15:38:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:38:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:38:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
15:38:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
15:38:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
15:38:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
15:38:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
15:38:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
15:38:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
15:38:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
15:38:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:38:57:elinks:INFO: Disabling clock on downlink 0
15:38:57:elinks:INFO: Disabling clock on downlink 1
15:38:57:elinks:INFO: Disabling clock on downlink 2
15:38:57:elinks:INFO: Disabling clock on downlink 3
15:38:57:elinks:INFO: Disabling clock on downlink 4
15:38:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:38:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:38:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:38:57:elinks:INFO: Disabling clock on downlink 0
15:38:57:elinks:INFO: Disabling clock on downlink 1
15:38:57:elinks:INFO: Disabling clock on downlink 2
15:38:57:elinks:INFO: Disabling clock on downlink 3
15:38:57:elinks:INFO: Disabling clock on downlink 4
15:38:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:38:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:38:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:38:57:setup_element:INFO: Scanning clock phase
15:38:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:38:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:38:57:setup_element:INFO: Clock phase scan results for group 0, downlink 2
15:38:57:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
15:38:57:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
15:38:57:setup_element:INFO: Eye window for uplink 26: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
15:38:57:setup_element:INFO: Eye window for uplink 27: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
15:38:57:setup_element:INFO: Eye window for uplink 28: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
15:38:57:setup_element:INFO: Eye window for uplink 29: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
15:38:57:setup_element:INFO: Eye window for uplink 30: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
15:38:57:setup_element:INFO: Eye window for uplink 31: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
15:38:57:setup_element:INFO: Setting the clock phase to 30 for group 0, downlink 2
15:38:57:setup_element:INFO: Scanning data phases
15:38:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:38:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:39:02:setup_element:INFO: Data phase scan results for group 0, downlink 2
15:39:02:setup_element:INFO: Eye window for uplink 24: ____XXXXXXXXXXX_________________________
Data delay found: 29
15:39:02:setup_element:INFO: Eye window for uplink 25: _____XXXXXXXXXXX________________________
Data delay found: 30
15:39:02:setup_element:INFO: Eye window for uplink 26: _______XXXXXXXXXX_______________________
Data delay found: 31
15:39:02:setup_element:INFO: Eye window for uplink 27: _________XXXXXXXXXX_____________________
Data delay found: 33
15:39:02:setup_element:INFO: Eye window for uplink 28: ______________XXXXXXX___________________
Data delay found: 37
15:39:02:setup_element:INFO: Eye window for uplink 29: _____________XXXXXXX____________________
Data delay found: 36
15:39:02:setup_element:INFO: Eye window for uplink 30: ____________XXXXXXXXXXX_________________
Data delay found: 37
15:39:02:setup_element:INFO: Eye window for uplink 31: ____________XXXXXXXXX___________________
Data delay found: 36
15:39:02:setup_element:INFO: Setting the data phase to 29 for uplink 24
15:39:02:setup_element:INFO: Setting the data phase to 30 for uplink 25
15:39:02:setup_element:INFO: Setting the data phase to 31 for uplink 26
15:39:02:setup_element:INFO: Setting the data phase to 33 for uplink 27
15:39:02:setup_element:INFO: Setting the data phase to 37 for uplink 28
15:39:02:setup_element:INFO: Setting the data phase to 36 for uplink 29
15:39:02:setup_element:INFO: Setting the data phase to 37 for uplink 30
15:39:02:setup_element:INFO: Setting the data phase to 36 for uplink 31
15:39:02:setup_element:INFO: Beginning SMX ASICs map scan
15:39:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:39:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:39:02:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:39:02:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:39:02:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
15:39:03:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
15:39:03:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
15:39:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
15:39:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
15:39:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
15:39:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
15:39:04:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
15:39:04:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
15:39:05:setup_element:INFO: Performing Elink synchronization
15:39:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:39:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:39:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:39:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:39:05:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
15:39:05:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
15:39:06:febtest:INFO: Init all SMX (CSA): 30
15:39:14:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:39:15:febtest:INFO: 30-01 | XA-000-09-004-042-004-023-04 | 37.7 | 1153.7
15:39:15:febtest:INFO: 28-03 | XA-000-09-004-042-007-026-10 | 40.9 | 1171.5
15:39:15:febtest:INFO: 26-05 | XA-000-09-004-042-013-025-05 | 37.7 | 1159.7
15:39:15:febtest:INFO: 24-07 | XA-000-09-004-042-007-023-10 | 34.6 | 1171.5
15:39:16:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
15:39:18:ST3_smx:INFO: chip: 30-1 40.898880 C 1165.571835 mV
15:39:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:39:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:39:18:ST3_smx:INFO: Electrons
15:39:18:ST3_smx:INFO: # loops 0
15:39:20:ST3_smx:INFO: # loops 1
15:39:22:ST3_smx:INFO: # loops 2
15:39:24:ST3_smx:INFO: Total # of broken channels: 0
15:39:24:ST3_smx:INFO: List of broken channels: []
15:39:24:ST3_smx:INFO: Total # of broken channels: 0
15:39:24:ST3_smx:INFO: List of broken channels: []
15:39:26:ST3_smx:INFO: chip: 28-3 40.898880 C 1189.190035 mV
15:39:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:39:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:39:26:ST3_smx:INFO: Electrons
15:39:26:ST3_smx:INFO: # loops 0
15:39:28:ST3_smx:INFO: # loops 1
15:39:30:ST3_smx:INFO: # loops 2
15:39:32:ST3_smx:INFO: Total # of broken channels: 0
15:39:32:ST3_smx:INFO: List of broken channels: []
15:39:32:ST3_smx:INFO: Total # of broken channels: 0
15:39:32:ST3_smx:INFO: List of broken channels: []
15:39:33:ST3_smx:INFO: chip: 26-5 37.726682 C 1171.483840 mV
15:39:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:39:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:39:33:ST3_smx:INFO: Electrons
15:39:33:ST3_smx:INFO: # loops 0
15:39:35:ST3_smx:INFO: # loops 1
15:39:37:ST3_smx:INFO: # loops 2
15:39:39:ST3_smx:INFO: Total # of broken channels: 0
15:39:39:ST3_smx:INFO: List of broken channels: []
15:39:39:ST3_smx:INFO: Total # of broken channels: 0
15:39:39:ST3_smx:INFO: List of broken channels: []
15:39:41:ST3_smx:INFO: chip: 24-7 34.556970 C 1177.390875 mV
15:39:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:39:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:39:41:ST3_smx:INFO: Electrons
15:39:41:ST3_smx:INFO: # loops 0
15:39:43:ST3_smx:INFO: # loops 1
15:39:45:ST3_smx:INFO: # loops 2
15:39:47:ST3_smx:INFO: Total # of broken channels: 0
15:39:47:ST3_smx:INFO: List of broken channels: []
15:39:47:ST3_smx:INFO: Total # of broken channels: 0
15:39:47:ST3_smx:INFO: List of broken channels: []
15:39:47:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:39:47:febtest:INFO: 30-01 | XA-000-09-004-042-004-023-04 | 40.9 | 1183.3
15:39:48:febtest:INFO: 28-03 | XA-000-09-004-042-007-026-10 | 37.7 | 1288.7
15:39:48:febtest:INFO: 26-05 | XA-000-09-004-042-013-025-05 | 40.9 | 1195.1
15:39:48:febtest:INFO: 24-07 | XA-000-09-004-042-007-023-10 | 37.7 | 1201.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_10_16-15_38_55
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4268| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7446', '1.850', '1.6500']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0120', '1.850', '1.3030']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9937', '1.850', '0.2631']