FEB_4269    22.10.25 13:25:58

Info
            13:25:58:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:25:58:ST3_Shared:INFO:	                       FEB-Microcable                       
13:25:58:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:25:58:febtest:INFO:	Testing FEB with SN 4269
13:26:00:smx_tester:INFO:	Scanning setup
13:26:00:elinks:INFO:	Disabling clock on downlink 0
13:26:00:elinks:INFO:	Disabling clock on downlink 1
13:26:00:elinks:INFO:	Disabling clock on downlink 2
13:26:00:elinks:INFO:	Disabling clock on downlink 3
13:26:00:elinks:INFO:	Disabling clock on downlink 4
13:26:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:26:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:26:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:26:00:elinks:INFO:	Disabling clock on downlink 0
13:26:00:elinks:INFO:	Disabling clock on downlink 1
13:26:00:elinks:INFO:	Disabling clock on downlink 2
13:26:00:elinks:INFO:	Disabling clock on downlink 3
13:26:00:elinks:INFO:	Disabling clock on downlink 4
13:26:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:26:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:26:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:26:00:elinks:INFO:	Disabling clock on downlink 0
13:26:00:elinks:INFO:	Disabling clock on downlink 1
13:26:00:elinks:INFO:	Disabling clock on downlink 2
13:26:00:elinks:INFO:	Disabling clock on downlink 3
13:26:00:elinks:INFO:	Disabling clock on downlink 4
13:26:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:26:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:26:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
13:26:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
13:26:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
13:26:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
13:26:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
13:26:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
13:26:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
13:26:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
13:26:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
13:26:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
13:26:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
13:26:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
13:26:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
13:26:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
13:26:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:26:00:elinks:INFO:	Disabling clock on downlink 0
13:26:00:elinks:INFO:	Disabling clock on downlink 1
13:26:00:elinks:INFO:	Disabling clock on downlink 2
13:26:00:elinks:INFO:	Disabling clock on downlink 3
13:26:00:elinks:INFO:	Disabling clock on downlink 4
13:26:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:26:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:26:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:26:00:elinks:INFO:	Disabling clock on downlink 0
13:26:00:elinks:INFO:	Disabling clock on downlink 1
13:26:00:elinks:INFO:	Disabling clock on downlink 2
13:26:00:elinks:INFO:	Disabling clock on downlink 3
13:26:00:elinks:INFO:	Disabling clock on downlink 4
13:26:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:26:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:26:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:26:00:setup_element:INFO:	Scanning clock phase
13:26:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:26:00:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:26:01:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
13:26:01:setup_element:INFO:	Eye window for uplink 16: XXXX________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
13:26:01:setup_element:INFO:	Eye window for uplink 17: XXXX________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
13:26:01:setup_element:INFO:	Eye window for uplink 18: XXXX________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
13:26:01:setup_element:INFO:	Eye window for uplink 19: XXXX________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
13:26:01:setup_element:INFO:	Eye window for uplink 20: XX________________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 33
13:26:01:setup_element:INFO:	Eye window for uplink 21: XX________________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 33
13:26:01:setup_element:INFO:	Eye window for uplink 24: XXXXXXXX__________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 36
13:26:01:setup_element:INFO:	Eye window for uplink 25: XXXXXXXX__________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 36
13:26:01:setup_element:INFO:	Eye window for uplink 26: XXXXXXX____________________________________________________________XXXXXXXXXXXXX
Clock Delay: 36
13:26:01:setup_element:INFO:	Eye window for uplink 27: XXXXXXX____________________________________________________________XXXXXXXXXXXXX
Clock Delay: 36
13:26:01:setup_element:INFO:	Eye window for uplink 28: XXXXXXXX__________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 36
13:26:01:setup_element:INFO:	Eye window for uplink 29: XXXXXXXX__________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 36
13:26:01:setup_element:INFO:	Eye window for uplink 30: XXXXXXXX_____________________________________________________________XXXXXXXXXXX
Clock Delay: 38
13:26:01:setup_element:INFO:	Eye window for uplink 31: XXXXXXXX_____________________________________________________________XXXXXXXXXXX
Clock Delay: 38
13:26:01:setup_element:INFO:	Setting the clock phase to 36 for group 0, downlink 2
13:26:01:setup_element:INFO:	Scanning data phases
13:26:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:26:01:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:26:06:setup_element:INFO:	Data phase scan results for group 0, downlink 2
13:26:06:setup_element:INFO:	Eye window for uplink 16: ________________________XXXXXXXXXXXX____
Data delay found: 9
13:26:06:setup_element:INFO:	Eye window for uplink 17: ________________________XXXXXXXXXXX_____
Data delay found: 9
13:26:06:setup_element:INFO:	Eye window for uplink 18: ____________________________XXXXXXXX____
Data delay found: 11
13:26:06:setup_element:INFO:	Eye window for uplink 19: ____________________________XXXXXXXXX___
Data delay found: 12
13:26:06:setup_element:INFO:	Eye window for uplink 20: ___________________________XXXXXXXX_____
Data delay found: 10
13:26:06:setup_element:INFO:	Eye window for uplink 21: _____________________________XXXXXXXX___
Data delay found: 12
13:26:06:setup_element:INFO:	Eye window for uplink 24: XXXXXX__________________________XXXXXXXX
Data delay found: 18
13:26:06:setup_element:INFO:	Eye window for uplink 25: XXXXXXXX_________________________XXXXXXX
Data delay found: 20
13:26:06:setup_element:INFO:	Eye window for uplink 26: XXXXXXXX____________________________XXXX
Data delay found: 21
13:26:06:setup_element:INFO:	Eye window for uplink 27: XXXXXXXXXX____________________________X_
Data delay found: 23
13:26:06:setup_element:INFO:	Eye window for uplink 28: ____XXXXXXXXXX__________________________
Data delay found: 28
13:26:06:setup_element:INFO:	Eye window for uplink 29: ____XXXXXXXXXX__________________________
Data delay found: 28
13:26:06:setup_element:INFO:	Eye window for uplink 30: _______XXXXXXXXXXXX_____________________
Data delay found: 32
13:26:06:setup_element:INFO:	Eye window for uplink 31: ______XXXXXXXXXX________________________
Data delay found: 30
13:26:06:setup_element:INFO:	Setting the data phase to 9 for uplink 16
13:26:06:setup_element:INFO:	Setting the data phase to 9 for uplink 17
13:26:06:setup_element:INFO:	Setting the data phase to 11 for uplink 18
13:26:06:setup_element:INFO:	Setting the data phase to 12 for uplink 19
13:26:06:setup_element:INFO:	Setting the data phase to 10 for uplink 20
13:26:06:setup_element:INFO:	Setting the data phase to 12 for uplink 21
13:26:06:setup_element:INFO:	Setting the data phase to 18 for uplink 24
13:26:06:setup_element:INFO:	Setting the data phase to 20 for uplink 25
13:26:06:setup_element:INFO:	Setting the data phase to 21 for uplink 26
13:26:06:setup_element:INFO:	Setting the data phase to 23 for uplink 27
13:26:06:setup_element:INFO:	Setting the data phase to 28 for uplink 28
13:26:06:setup_element:INFO:	Setting the data phase to 28 for uplink 29
13:26:06:setup_element:INFO:	Setting the data phase to 32 for uplink 30
13:26:06:setup_element:INFO:	Setting the data phase to 30 for uplink 31
13:26:06:setup_element:INFO:	Beginning SMX ASICs map scan
13:26:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:26:06:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:26:06:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:26:06:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:26:06:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 24, 25, 26, 27, 28, 29, 30, 31]
13:26:06:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:26:06:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:26:06:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
13:26:06:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
13:26:06:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:26:07:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:26:07:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
13:26:07:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
13:26:07:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:26:07:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:26:07:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
13:26:07:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
13:26:07:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:26:07:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:26:08:setup_element:INFO:	Performing Elink synchronization
13:26:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:26:08:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:26:09:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:26:09:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:26:09:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
13:26:09:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:26:09:febtest:INFO:	Init all SMX (CSA): 30
13:26:22:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:26:22:febtest:INFO:	30-01 | XA-000-09-004-042-018-013-10 |  25.1 | 1201.0
13:26:22:febtest:INFO:	21-02 | XA-000-09-004-042-003-014-11 |  31.4 | 1177.4
13:26:22:febtest:INFO:	28-03 | XA-000-09-004-042-015-013-01 |  50.4 | 1118.1
13:26:22:febtest:INFO:	19-04 | XA-000-09-004-042-003-013-11 |  21.9 | 1212.7
13:26:23:febtest:INFO:	26-05 | XA-000-09-004-042-012-013-15 |  28.2 | 1212.7
13:26:23:febtest:INFO:	17-06 | XA-000-09-004-042-006-013-00 |  34.6 | 1177.4
13:26:23:febtest:INFO:	24-07 | XA-000-09-004-042-009-013-04 |  31.4 | 1195.1
13:26:24:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:26:25:febtest:ERROR:	HW addres 1 != 0
13:26:33:ST3_smx:INFO:	chip: 30-1 	 25.062742 C 	 1218.600960 mV
13:26:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:26:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:26:33:ST3_smx:INFO:		Electrons
13:26:33:ST3_smx:INFO:	# loops 0
13:26:35:ST3_smx:INFO:	# loops 1
13:26:36:ST3_smx:INFO:	# loops 2
13:26:38:ST3_smx:INFO:	Total # of broken channels: 0
13:26:38:ST3_smx:INFO:	List of broken channels: []
13:26:38:ST3_smx:INFO:	Total # of broken channels: 0
13:26:38:ST3_smx:INFO:	List of broken channels: []
13:26:40:ST3_smx:INFO:	chip: 21-2 	 31.389742 C 	 1189.190035 mV
13:26:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:26:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:26:40:ST3_smx:INFO:		Electrons
13:26:40:ST3_smx:INFO:	# loops 0
13:26:41:ST3_smx:INFO:	# loops 1
13:26:43:ST3_smx:INFO:	# loops 2
13:26:45:ST3_smx:INFO:	Total # of broken channels: 0
13:26:45:ST3_smx:INFO:	List of broken channels: []
13:26:45:ST3_smx:INFO:	Total # of broken channels: 0
13:26:45:ST3_smx:INFO:	List of broken channels: []
13:26:46:ST3_smx:INFO:	chip: 28-3 	 50.430383 C 	 1135.937260 mV
13:26:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:26:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:26:46:ST3_smx:INFO:		Electrons
13:26:46:ST3_smx:INFO:	# loops 0
13:26:48:ST3_smx:INFO:	# loops 1
13:26:50:ST3_smx:INFO:	# loops 2
13:26:51:ST3_smx:INFO:	Total # of broken channels: 0
13:26:51:ST3_smx:INFO:	List of broken channels: []
13:26:51:ST3_smx:INFO:	Total # of broken channels: 0
13:26:51:ST3_smx:INFO:	List of broken channels: []
13:26:53:ST3_smx:INFO:	chip: 19-4 	 25.062742 C 	 1224.468235 mV
13:26:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:26:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:26:53:ST3_smx:INFO:		Electrons
13:26:53:ST3_smx:INFO:	# loops 0
13:26:55:ST3_smx:INFO:	# loops 1
13:26:56:ST3_smx:INFO:	# loops 2
13:26:58:ST3_smx:INFO:	Total # of broken channels: 0
13:26:58:ST3_smx:INFO:	List of broken channels: []
13:26:58:ST3_smx:INFO:	Total # of broken channels: 0
13:26:58:ST3_smx:INFO:	List of broken channels: []
13:27:00:ST3_smx:INFO:	chip: 26-5 	 31.389742 C 	 1224.468235 mV
13:27:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:27:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:27:00:ST3_smx:INFO:		Electrons
13:27:00:ST3_smx:INFO:	# loops 0
13:27:02:ST3_smx:INFO:	# loops 1
13:27:03:ST3_smx:INFO:	# loops 2
13:27:05:ST3_smx:INFO:	Total # of broken channels: 0
13:27:05:ST3_smx:INFO:	List of broken channels: []
13:27:05:ST3_smx:INFO:	Total # of broken channels: 0
13:27:05:ST3_smx:INFO:	List of broken channels: []
13:27:07:ST3_smx:INFO:	chip: 17-6 	 37.726682 C 	 1183.292940 mV
13:27:07:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:27:07:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:27:07:ST3_smx:INFO:		Electrons
13:27:07:ST3_smx:INFO:	# loops 0
13:27:08:ST3_smx:INFO:	# loops 1
13:27:10:ST3_smx:INFO:	# loops 2
13:27:12:ST3_smx:INFO:	Total # of broken channels: 0
13:27:12:ST3_smx:INFO:	List of broken channels: []
13:27:12:ST3_smx:INFO:	Total # of broken channels: 0
13:27:12:ST3_smx:INFO:	List of broken channels: []
13:27:13:ST3_smx:INFO:	chip: 24-7 	 34.556970 C 	 1206.851500 mV
13:27:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:27:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:27:13:ST3_smx:INFO:		Electrons
13:27:13:ST3_smx:INFO:	# loops 0
13:27:15:ST3_smx:INFO:	# loops 1
13:27:16:ST3_smx:INFO:	# loops 2
13:27:18:ST3_smx:INFO:	Total # of broken channels: 0
13:27:18:ST3_smx:INFO:	List of broken channels: []
13:27:18:ST3_smx:INFO:	Total # of broken channels: 0
13:27:18:ST3_smx:INFO:	List of broken channels: []
13:27:18:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:27:19:febtest:INFO:	30-01 | XA-000-09-004-042-018-013-10 |  28.2 | 1236.2
13:27:19:febtest:INFO:	21-02 | XA-000-09-004-042-003-014-11 |  34.6 | 1206.9
13:27:19:febtest:INFO:	28-03 | XA-000-09-004-042-015-013-01 |  53.6 | 1171.5
13:27:19:febtest:INFO:	19-04 | XA-000-09-004-042-003-013-11 |  25.1 | 1253.7
13:27:19:febtest:INFO:	26-05 | XA-000-09-004-042-012-013-15 |  31.4 | 1253.7
13:27:20:febtest:INFO:	17-06 | XA-000-09-004-042-006-013-00 |  37.7 | 1201.0
13:27:20:febtest:INFO:	24-07 | XA-000-09-004-042-009-013-04 |  34.6 | 1224.5
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
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#                   S U M M A R Y                          #
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TEST_NAME : FEB-Microcable
TEST_DATE : 25_10_22-13_25_58
OPERATOR  : Benjamin; 
SITE : KIT | SETUP : KIT_TEST_SETUP_1
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| FEB_SN : 4269| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
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VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.6420', '1.850', '2.4050']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0570', '1.850', '2.5210']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0190', '1.850', '0.7846']