FEB_4274 24.10.25 14:11:52
Info
14:11:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:11:52:ST3_Shared:INFO: FEB-Microcable
14:11:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:11:52:febtest:INFO: Testing FEB with SN 4274
14:11:54:smx_tester:INFO: Scanning setup
14:11:54:elinks:INFO: Disabling clock on downlink 0
14:11:54:elinks:INFO: Disabling clock on downlink 1
14:11:54:elinks:INFO: Disabling clock on downlink 2
14:11:54:elinks:INFO: Disabling clock on downlink 3
14:11:54:elinks:INFO: Disabling clock on downlink 4
14:11:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:11:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:11:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:11:54:elinks:INFO: Disabling clock on downlink 0
14:11:54:elinks:INFO: Disabling clock on downlink 1
14:11:54:elinks:INFO: Disabling clock on downlink 2
14:11:54:elinks:INFO: Disabling clock on downlink 3
14:11:54:elinks:INFO: Disabling clock on downlink 4
14:11:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:11:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:11:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:11:54:elinks:INFO: Disabling clock on downlink 0
14:11:54:elinks:INFO: Disabling clock on downlink 1
14:11:54:elinks:INFO: Disabling clock on downlink 2
14:11:54:elinks:INFO: Disabling clock on downlink 3
14:11:54:elinks:INFO: Disabling clock on downlink 4
14:11:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:11:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:11:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
14:11:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
14:11:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
14:11:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
14:11:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
14:11:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
14:11:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
14:11:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
14:11:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:11:54:elinks:INFO: Disabling clock on downlink 0
14:11:54:elinks:INFO: Disabling clock on downlink 1
14:11:54:elinks:INFO: Disabling clock on downlink 2
14:11:54:elinks:INFO: Disabling clock on downlink 3
14:11:54:elinks:INFO: Disabling clock on downlink 4
14:11:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:11:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:11:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:11:54:elinks:INFO: Disabling clock on downlink 0
14:11:54:elinks:INFO: Disabling clock on downlink 1
14:11:54:elinks:INFO: Disabling clock on downlink 2
14:11:54:elinks:INFO: Disabling clock on downlink 3
14:11:54:elinks:INFO: Disabling clock on downlink 4
14:11:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:11:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:11:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:11:54:setup_element:INFO: Scanning clock phase
14:11:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:11:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:11:55:setup_element:INFO: Clock phase scan results for group 0, downlink 2
14:11:55:setup_element:INFO: Eye window for uplink 24: X__________________________________________________________________XXXXXXXXXXXXX
Clock Delay: 33
14:11:55:setup_element:INFO: Eye window for uplink 25: X__________________________________________________________________XXXXXXXXXXXXX
Clock Delay: 33
14:11:55:setup_element:INFO: Eye window for uplink 26: XX______________________________________________________________________________
Clock Delay: 40
14:11:55:setup_element:INFO: Eye window for uplink 27: XX______________________________________________________________________________
Clock Delay: 40
14:11:55:setup_element:INFO: Eye window for uplink 28: X_X_________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
14:11:55:setup_element:INFO: Eye window for uplink 29: X_X_________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
14:11:55:setup_element:INFO: Eye window for uplink 30: XXXX______________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 34
14:11:55:setup_element:INFO: Eye window for uplink 31: XXXX______________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 34
14:11:55:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
14:11:55:setup_element:INFO: Scanning data phases
14:11:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:11:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:12:00:setup_element:INFO: Data phase scan results for group 0, downlink 2
14:12:00:setup_element:INFO: Eye window for uplink 24: __XXXXXXXXXX___________________________X
Data delay found: 25
14:12:00:setup_element:INFO: Eye window for uplink 25: ____XXXXXXXXXX__________________________
Data delay found: 28
14:12:00:setup_element:INFO: Eye window for uplink 26: _XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 20
14:12:00:setup_element:INFO: Eye window for uplink 27: _XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 20
14:12:00:setup_element:INFO: Eye window for uplink 28: ________XXXXXXXXXXXX____________________
Data delay found: 33
14:12:00:setup_element:INFO: Eye window for uplink 29: ________XXXXXXXXXXXX____________________
Data delay found: 33
14:12:00:setup_element:INFO: Eye window for uplink 30: ________XXXXXXXXXXXXX___________________
Data delay found: 34
14:12:00:setup_element:INFO: Eye window for uplink 31: ________XXXXXXXXXX______________________
Data delay found: 32
14:12:00:setup_element:INFO: Setting the data phase to 25 for uplink 24
14:12:00:setup_element:INFO: Setting the data phase to 28 for uplink 25
14:12:00:setup_element:INFO: Setting the data phase to 20 for uplink 26
14:12:00:setup_element:INFO: Setting the data phase to 20 for uplink 27
14:12:00:setup_element:INFO: Setting the data phase to 33 for uplink 28
14:12:00:setup_element:INFO: Setting the data phase to 33 for uplink 29
14:12:00:setup_element:INFO: Setting the data phase to 34 for uplink 30
14:12:00:setup_element:INFO: Setting the data phase to 32 for uplink 31
14:12:00:setup_element:INFO: Beginning SMX ASICs map scan
14:12:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:12:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:12:00:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:12:00:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:12:00:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
14:12:00:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:12:00:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:12:00:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:12:01:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:12:01:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:12:01:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:12:01:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:12:01:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:12:03:setup_element:INFO: Performing Elink synchronization
14:12:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:12:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:12:03:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:12:03:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:12:03:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
14:12:03:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
14:12:03:febtest:INFO: Init all SMX (CSA): 30
14:12:12:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:12:12:febtest:INFO: 30-01 | XA-000-09-004-042-008-026-14 | 34.6 | 1165.6
14:12:12:febtest:INFO: 28-03 | XA-000-09-004-042-012-002-15 | 44.1 | 1135.9
14:12:12:febtest:INFO: 26-05 | XA-000-09-004-042-012-003-15 | 28.2 | 1189.2
14:12:12:febtest:INFO: 24-07 | XA-000-09-004-042-011-026-00 | 21.9 | 1201.0
14:12:13:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:12:15:ST3_smx:INFO: chip: 30-1 34.556970 C 1171.483840 mV
14:12:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:12:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:12:15:ST3_smx:INFO: Electrons
14:12:15:ST3_smx:INFO: # loops 0
14:12:17:ST3_smx:INFO: # loops 1
14:12:19:ST3_smx:INFO: # loops 2
14:12:21:ST3_smx:INFO: Total # of broken channels: 0
14:12:21:ST3_smx:INFO: List of broken channels: []
14:12:21:ST3_smx:INFO: Total # of broken channels: 0
14:12:21:ST3_smx:INFO: List of broken channels: []
14:12:23:ST3_smx:INFO: chip: 28-3 44.073563 C 1147.806000 mV
14:12:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:12:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:12:23:ST3_smx:INFO: Electrons
14:12:23:ST3_smx:INFO: # loops 0
14:12:25:ST3_smx:INFO: # loops 1
14:12:27:ST3_smx:INFO: # loops 2
14:12:29:ST3_smx:INFO: Total # of broken channels: 0
14:12:29:ST3_smx:INFO: List of broken channels: []
14:12:29:ST3_smx:INFO: Total # of broken channels: 0
14:12:29:ST3_smx:INFO: List of broken channels: []
14:12:30:ST3_smx:INFO: chip: 26-5 28.225000 C 1200.969315 mV
14:12:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:12:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:12:30:ST3_smx:INFO: Electrons
14:12:30:ST3_smx:INFO: # loops 0
14:12:32:ST3_smx:INFO: # loops 1
14:12:34:ST3_smx:INFO: # loops 2
14:12:36:ST3_smx:INFO: Total # of broken channels: 0
14:12:36:ST3_smx:INFO: List of broken channels: []
14:12:36:ST3_smx:INFO: Total # of broken channels: 0
14:12:36:ST3_smx:INFO: List of broken channels: []
14:12:38:ST3_smx:INFO: chip: 24-7 21.902970 C 1212.728715 mV
14:12:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:12:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:12:38:ST3_smx:INFO: Electrons
14:12:38:ST3_smx:INFO: # loops 0
14:12:40:ST3_smx:INFO: # loops 1
14:12:42:ST3_smx:INFO: # loops 2
14:12:44:ST3_smx:INFO: Total # of broken channels: 0
14:12:44:ST3_smx:INFO: List of broken channels: []
14:12:44:ST3_smx:INFO: Total # of broken channels: 0
14:12:44:ST3_smx:INFO: List of broken channels: []
14:12:45:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:12:45:febtest:INFO: 30-01 | XA-000-09-004-042-008-026-14 | 34.6 | 1195.1
14:12:45:febtest:INFO: 28-03 | XA-000-09-004-042-012-002-15 | 44.1 | 1171.5
14:12:45:febtest:INFO: 26-05 | XA-000-09-004-042-012-003-15 | 28.2 | 1218.6
14:12:45:febtest:INFO: 24-07 | XA-000-09-004-042-011-026-00 | 25.1 | 1230.3
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_10_24-14_11_52
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4274| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.8105', '1.850', '1.2850']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0060', '1.850', '1.1670']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9906', '1.850', '0.2605']