DTL-STS tests database

FEB_4275 28.10.25 10:53:14

link: XA-000-09-004-042-008-002-09
...SMX_0.root
link: XA-000-09-004-042-005-004-14
...SMX_2.root
link: XA-000-09-004-042-008-004-09
...SMX_4.root
link: XA-000-09-004-042-011-002-07
...SMX_6.root
link: XA-000-09-004-042-014-004-12
...SMX_1.root
link: XA-000-09-004-042-008-005-09
...SMX_3.root
link: XA-000-09-004-042-005-005-14
...SMX_5.root
link: XA-000-09-004-042-011-004-07
...SMX_7.root
link: XA-000-09-004-042-011-004-07
...VddmCSAstatus.root
Info
            10:53:14:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:53:14:ST3_Shared:INFO:	                       FEB-Microcable                       
10:53:14:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:53:14:febtest:INFO:	Testing FEB with SN 4275
10:53:16:smx_tester:INFO:	Scanning setup
10:53:16:elinks:INFO:	Disabling clock on downlink 0
10:53:16:elinks:INFO:	Disabling clock on downlink 1
10:53:16:elinks:INFO:	Disabling clock on downlink 2
10:53:16:elinks:INFO:	Disabling clock on downlink 3
10:53:16:elinks:INFO:	Disabling clock on downlink 4
10:53:16:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:53:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:53:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:53:16:elinks:INFO:	Disabling clock on downlink 0
10:53:16:elinks:INFO:	Disabling clock on downlink 1
10:53:16:elinks:INFO:	Disabling clock on downlink 2
10:53:16:elinks:INFO:	Disabling clock on downlink 3
10:53:16:elinks:INFO:	Disabling clock on downlink 4
10:53:16:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:53:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:53:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:53:16:elinks:INFO:	Disabling clock on downlink 0
10:53:16:elinks:INFO:	Disabling clock on downlink 1
10:53:16:elinks:INFO:	Disabling clock on downlink 2
10:53:16:elinks:INFO:	Disabling clock on downlink 3
10:53:16:elinks:INFO:	Disabling clock on downlink 4
10:53:16:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:53:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:53:16:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
10:53:16:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
10:53:16:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
10:53:16:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
10:53:16:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
10:53:16:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
10:53:16:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
10:53:16:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
10:53:16:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
10:53:16:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
10:53:16:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
10:53:16:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
10:53:16:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
10:53:16:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
10:53:16:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
10:53:16:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
10:53:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:53:16:elinks:INFO:	Disabling clock on downlink 0
10:53:16:elinks:INFO:	Disabling clock on downlink 1
10:53:16:elinks:INFO:	Disabling clock on downlink 2
10:53:16:elinks:INFO:	Disabling clock on downlink 3
10:53:16:elinks:INFO:	Disabling clock on downlink 4
10:53:16:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:53:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:53:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:53:16:elinks:INFO:	Disabling clock on downlink 0
10:53:16:elinks:INFO:	Disabling clock on downlink 1
10:53:16:elinks:INFO:	Disabling clock on downlink 2
10:53:16:elinks:INFO:	Disabling clock on downlink 3
10:53:16:elinks:INFO:	Disabling clock on downlink 4
10:53:16:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:53:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:53:16:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:53:16:setup_element:INFO:	Scanning clock phase
10:53:16:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:53:16:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:53:17:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
10:53:17:setup_element:INFO:	Eye window for uplink 16: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
10:53:17:setup_element:INFO:	Eye window for uplink 17: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
10:53:17:setup_element:INFO:	Eye window for uplink 18: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
10:53:17:setup_element:INFO:	Eye window for uplink 19: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
10:53:17:setup_element:INFO:	Eye window for uplink 20: ____________________________________________________________________XXXXXX______
Clock Delay: 30
10:53:17:setup_element:INFO:	Eye window for uplink 21: ____________________________________________________________________XXXXXX______
Clock Delay: 30
10:53:17:setup_element:INFO:	Eye window for uplink 22: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
10:53:17:setup_element:INFO:	Eye window for uplink 23: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
10:53:17:setup_element:INFO:	Eye window for uplink 24: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
10:53:17:setup_element:INFO:	Eye window for uplink 25: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
10:53:17:setup_element:INFO:	Eye window for uplink 26: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
10:53:17:setup_element:INFO:	Eye window for uplink 27: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
10:53:17:setup_element:INFO:	Eye window for uplink 28: ____________________________________________________________________XXXXXX______
Clock Delay: 30
10:53:17:setup_element:INFO:	Eye window for uplink 29: ____________________________________________________________________XXXXXX______
Clock Delay: 30
10:53:17:setup_element:INFO:	Eye window for uplink 30: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
10:53:17:setup_element:INFO:	Eye window for uplink 31: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
10:53:17:setup_element:INFO:	Setting the clock phase to 30 for group 0, downlink 2
10:53:17:setup_element:INFO:	Scanning data phases
10:53:17:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:53:17:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:53:22:setup_element:INFO:	Data phase scan results for group 0, downlink 2
10:53:22:setup_element:INFO:	Eye window for uplink 16: XXXX_________________________________XXX
Data delay found: 20
10:53:22:setup_element:INFO:	Eye window for uplink 17: XXX__________________________________XXX
Data delay found: 19
10:53:22:setup_element:INFO:	Eye window for uplink 18: XXXX________________________________XXXX
Data delay found: 19
10:53:22:setup_element:INFO:	Eye window for uplink 19: XXXX________________________________XXXX
Data delay found: 19
10:53:22:setup_element:INFO:	Eye window for uplink 20: XXXXX________________________________XXX
Data delay found: 20
10:53:22:setup_element:INFO:	Eye window for uplink 21: XXXXXX________________________________XX
Data delay found: 21
10:53:22:setup_element:INFO:	Eye window for uplink 22: XXXXX______________________________XXXXX
Data delay found: 19
10:53:22:setup_element:INFO:	Eye window for uplink 23: XXX______________________________XXXXXXX
Data delay found: 17
10:53:22:setup_element:INFO:	Eye window for uplink 24: _____XXXXXXXXXX_________________________
Data delay found: 29
10:53:22:setup_element:INFO:	Eye window for uplink 25: _______XXXXXXXXXX_______________________
Data delay found: 31
10:53:22:setup_element:INFO:	Eye window for uplink 26: __________XXXXXXXXX_____________________
Data delay found: 34
10:53:22:setup_element:INFO:	Eye window for uplink 27: ___________XXXXXXXXXXX__________________
Data delay found: 36
10:53:22:setup_element:INFO:	Eye window for uplink 28: ____________XXXXXXXXXX__________________
Data delay found: 36
10:53:22:setup_element:INFO:	Eye window for uplink 29: _____________XXXXXXXXX__________________
Data delay found: 37
10:53:22:setup_element:INFO:	Eye window for uplink 30: ________________XXXXXXXXXX______________
Data delay found: 0
10:53:22:setup_element:INFO:	Eye window for uplink 31: ________________XXXXXXXX________________
Data delay found: 39
10:53:22:setup_element:INFO:	Setting the data phase to 20 for uplink 16
10:53:22:setup_element:INFO:	Setting the data phase to 19 for uplink 17
10:53:22:setup_element:INFO:	Setting the data phase to 19 for uplink 18
10:53:22:setup_element:INFO:	Setting the data phase to 19 for uplink 19
10:53:22:setup_element:INFO:	Setting the data phase to 20 for uplink 20
10:53:22:setup_element:INFO:	Setting the data phase to 21 for uplink 21
10:53:22:setup_element:INFO:	Setting the data phase to 19 for uplink 22
10:53:22:setup_element:INFO:	Setting the data phase to 17 for uplink 23
10:53:22:setup_element:INFO:	Setting the data phase to 29 for uplink 24
10:53:22:setup_element:INFO:	Setting the data phase to 31 for uplink 25
10:53:22:setup_element:INFO:	Setting the data phase to 34 for uplink 26
10:53:22:setup_element:INFO:	Setting the data phase to 36 for uplink 27
10:53:22:setup_element:INFO:	Setting the data phase to 36 for uplink 28
10:53:22:setup_element:INFO:	Setting the data phase to 37 for uplink 29
10:53:22:setup_element:INFO:	Setting the data phase to 0 for uplink 30
10:53:22:setup_element:INFO:	Setting the data phase to 39 for uplink 31
10:53:22:setup_element:INFO:	Beginning SMX ASICs map scan
10:53:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:53:22:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:53:22:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:53:22:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
10:53:22:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:53:22:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:53:22:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:53:22:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:53:22:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:53:23:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:53:23:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:53:23:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:53:23:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:53:23:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:53:23:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:53:23:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:53:23:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:53:23:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:53:23:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:53:23:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:53:23:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:53:25:setup_element:INFO:	Performing Elink synchronization
10:53:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:53:25:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:53:25:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
10:53:25:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
10:53:25:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
10:53:25:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:53:26:febtest:INFO:	Init all SMX (CSA): 30
10:53:44:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:53:44:febtest:INFO:	23-00 | XA-000-09-004-042-008-002-09 |  37.7 | 1153.7
10:53:44:febtest:INFO:	30-01 | XA-000-09-004-042-014-004-12 |  37.7 | 1147.8
10:53:44:febtest:INFO:	21-02 | XA-000-09-004-042-005-004-14 |  40.9 | 1141.9
10:53:44:febtest:INFO:	28-03 | XA-000-09-004-042-008-005-09 |  40.9 | 1141.9
10:53:45:febtest:INFO:	19-04 | XA-000-09-004-042-008-004-09 |  37.7 | 1159.7
10:53:45:febtest:INFO:	26-05 | XA-000-09-004-042-005-005-14 |  34.6 | 1177.4
10:53:45:febtest:INFO:	17-06 | XA-000-09-004-042-011-002-07 |  40.9 | 1153.7
10:53:45:febtest:INFO:	24-07 | XA-000-09-004-042-011-004-07 |  34.6 | 1171.5
10:53:46:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:53:48:ST3_smx:INFO:	chip: 23-0 	 37.726682 C 	 1165.571835 mV
10:53:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:53:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:53:48:ST3_smx:INFO:		Electrons
10:53:48:ST3_smx:INFO:	# loops 0
10:53:50:ST3_smx:INFO:	# loops 1
10:53:52:ST3_smx:INFO:	# loops 2
10:53:55:ST3_smx:INFO:	Total # of broken channels: 0
10:53:55:ST3_smx:INFO:	List of broken channels: []
10:53:55:ST3_smx:INFO:	Total # of broken channels: 0
10:53:55:ST3_smx:INFO:	List of broken channels: []
10:53:56:ST3_smx:INFO:	chip: 30-1 	 37.726682 C 	 1165.571835 mV
10:53:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:53:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:53:56:ST3_smx:INFO:		Electrons
10:53:56:ST3_smx:INFO:	# loops 0
10:53:58:ST3_smx:INFO:	# loops 1
10:54:00:ST3_smx:INFO:	# loops 2
10:54:02:ST3_smx:INFO:	Total # of broken channels: 0
10:54:02:ST3_smx:INFO:	List of broken channels: []
10:54:02:ST3_smx:INFO:	Total # of broken channels: 1
10:54:02:ST3_smx:INFO:	List of broken channels: [37]
10:54:04:ST3_smx:INFO:	chip: 21-2 	 44.073563 C 	 1153.732915 mV
10:54:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:54:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:54:04:ST3_smx:INFO:		Electrons
10:54:04:ST3_smx:INFO:	# loops 0
10:54:06:ST3_smx:INFO:	# loops 1
10:54:09:ST3_smx:INFO:	# loops 2
10:54:11:ST3_smx:INFO:	Total # of broken channels: 0
10:54:11:ST3_smx:INFO:	List of broken channels: []
10:54:11:ST3_smx:INFO:	Total # of broken channels: 0
10:54:11:ST3_smx:INFO:	List of broken channels: []
10:54:12:ST3_smx:INFO:	chip: 28-3 	 40.898880 C 	 1159.654860 mV
10:54:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:54:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:54:12:ST3_smx:INFO:		Electrons
10:54:12:ST3_smx:INFO:	# loops 0
10:54:15:ST3_smx:INFO:	# loops 1
10:54:17:ST3_smx:INFO:	# loops 2
10:54:19:ST3_smx:INFO:	Total # of broken channels: 0
10:54:19:ST3_smx:INFO:	List of broken channels: []
10:54:19:ST3_smx:INFO:	Total # of broken channels: 0
10:54:19:ST3_smx:INFO:	List of broken channels: []
10:54:21:ST3_smx:INFO:	chip: 19-4 	 40.898880 C 	 1171.483840 mV
10:54:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:54:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:54:21:ST3_smx:INFO:		Electrons
10:54:21:ST3_smx:INFO:	# loops 0
10:54:23:ST3_smx:INFO:	# loops 1
10:54:25:ST3_smx:INFO:	# loops 2
10:54:27:ST3_smx:INFO:	Total # of broken channels: 0
10:54:27:ST3_smx:INFO:	List of broken channels: []
10:54:27:ST3_smx:INFO:	Total # of broken channels: 0
10:54:27:ST3_smx:INFO:	List of broken channels: []
10:54:28:ST3_smx:INFO:	chip: 26-5 	 34.556970 C 	 1189.190035 mV
10:54:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:54:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:54:28:ST3_smx:INFO:		Electrons
10:54:28:ST3_smx:INFO:	# loops 0
10:54:31:ST3_smx:INFO:	# loops 1
10:54:33:ST3_smx:INFO:	# loops 2
10:54:35:ST3_smx:INFO:	Total # of broken channels: 0
10:54:35:ST3_smx:INFO:	List of broken channels: []
10:54:35:ST3_smx:INFO:	Total # of broken channels: 0
10:54:35:ST3_smx:INFO:	List of broken channels: []
10:54:36:ST3_smx:INFO:	chip: 17-6 	 40.898880 C 	 1165.571835 mV
10:54:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:54:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:54:36:ST3_smx:INFO:		Electrons
10:54:36:ST3_smx:INFO:	# loops 0
10:54:38:ST3_smx:INFO:	# loops 1
10:54:40:ST3_smx:INFO:	# loops 2
10:54:42:ST3_smx:INFO:	Total # of broken channels: 0
10:54:42:ST3_smx:INFO:	List of broken channels: []
10:54:42:ST3_smx:INFO:	Total # of broken channels: 0
10:54:42:ST3_smx:INFO:	List of broken channels: []
10:54:44:ST3_smx:INFO:	chip: 24-7 	 37.726682 C 	 1183.292940 mV
10:54:44:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:54:44:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:54:44:ST3_smx:INFO:		Electrons
10:54:44:ST3_smx:INFO:	# loops 0
10:54:46:ST3_smx:INFO:	# loops 1
10:54:49:ST3_smx:INFO:	# loops 2
10:54:50:ST3_smx:INFO:	Total # of broken channels: 0
10:54:50:ST3_smx:INFO:	List of broken channels: []
10:54:50:ST3_smx:INFO:	Total # of broken channels: 0
10:54:50:ST3_smx:INFO:	List of broken channels: []
10:54:51:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:54:51:febtest:INFO:	23-00 | XA-000-09-004-042-008-002-09 |  40.9 | 1189.2
10:54:51:febtest:INFO:	30-01 | XA-000-09-004-042-014-004-12 |  40.9 | 1183.3
10:54:51:febtest:INFO:	21-02 | XA-000-09-004-042-005-004-14 |  44.1 | 1177.4
10:54:52:febtest:INFO:	28-03 | XA-000-09-004-042-008-005-09 |  44.1 | 1177.4
10:54:52:febtest:INFO:	19-04 | XA-000-09-004-042-008-004-09 |  40.9 | 1189.2
10:54:52:febtest:INFO:	26-05 | XA-000-09-004-042-005-005-14 |  37.7 | 1212.7
10:54:52:febtest:INFO:	17-06 | XA-000-09-004-042-011-002-07 |  44.1 | 1183.3
10:54:53:febtest:INFO:	24-07 | XA-000-09-004-042-011-004-07 |  37.7 | 1206.9
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_10_28-10_53_14
OPERATOR  : Benjamin; 
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4275| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5780', '1.846', '2.2900']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0120', '1.850', '2.5710']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9780', '1.850', '0.5182']
Comment