FEB_4282 03.11.25 13:55:05
Info
13:55:05:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:55:05:ST3_Shared:INFO: FEB-Microcable
13:55:05:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:55:05:febtest:INFO: Testing FEB with SN 4282
13:55:07:smx_tester:INFO: Scanning setup
13:55:07:elinks:INFO: Disabling clock on downlink 0
13:55:07:elinks:INFO: Disabling clock on downlink 1
13:55:07:elinks:INFO: Disabling clock on downlink 2
13:55:07:elinks:INFO: Disabling clock on downlink 3
13:55:07:elinks:INFO: Disabling clock on downlink 4
13:55:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:55:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:55:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:55:07:elinks:INFO: Disabling clock on downlink 0
13:55:07:elinks:INFO: Disabling clock on downlink 1
13:55:07:elinks:INFO: Disabling clock on downlink 2
13:55:07:elinks:INFO: Disabling clock on downlink 3
13:55:07:elinks:INFO: Disabling clock on downlink 4
13:55:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:55:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:55:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:55:07:elinks:INFO: Disabling clock on downlink 0
13:55:07:elinks:INFO: Disabling clock on downlink 1
13:55:07:elinks:INFO: Disabling clock on downlink 2
13:55:07:elinks:INFO: Disabling clock on downlink 3
13:55:07:elinks:INFO: Disabling clock on downlink 4
13:55:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:55:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:55:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:55:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:55:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:55:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:55:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:55:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:55:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:55:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:55:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:55:07:elinks:INFO: Disabling clock on downlink 0
13:55:07:elinks:INFO: Disabling clock on downlink 1
13:55:07:elinks:INFO: Disabling clock on downlink 2
13:55:07:elinks:INFO: Disabling clock on downlink 3
13:55:07:elinks:INFO: Disabling clock on downlink 4
13:55:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:55:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:55:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:55:08:elinks:INFO: Disabling clock on downlink 0
13:55:08:elinks:INFO: Disabling clock on downlink 1
13:55:08:elinks:INFO: Disabling clock on downlink 2
13:55:08:elinks:INFO: Disabling clock on downlink 3
13:55:08:elinks:INFO: Disabling clock on downlink 4
13:55:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:55:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:55:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:55:08:setup_element:INFO: Scanning clock phase
13:55:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:55:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:55:08:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:55:08:setup_element:INFO: Eye window for uplink 24: _________________________________________________________________XXXXXXXXXXXX_X_
Clock Delay: 31
13:55:08:setup_element:INFO: Eye window for uplink 25: _________________________________________________________________XXXXXXXXXXXX_X_
Clock Delay: 31
13:55:08:setup_element:INFO: Eye window for uplink 26: X_________________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 33
13:55:08:setup_element:INFO: Eye window for uplink 27: X_________________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 33
13:55:08:setup_element:INFO: Eye window for uplink 28: X_X_____________________________________________________________________________
Clock Delay: 41
13:55:08:setup_element:INFO: Eye window for uplink 29: X_X_____________________________________________________________________________
Clock Delay: 41
13:55:08:setup_element:INFO: Eye window for uplink 30: XXX______________________________________________________________XXXXXXXXXXXXXXX
Clock Delay: 33
13:55:08:setup_element:INFO: Eye window for uplink 31: XXX______________________________________________________________XXXXXXXXXXXXXXX
Clock Delay: 33
13:55:08:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
13:55:08:setup_element:INFO: Scanning data phases
13:55:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:55:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:55:13:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:55:13:setup_element:INFO: Eye window for uplink 24: XXXXXXXX_____________________________XXX
Data delay found: 22
13:55:13:setup_element:INFO: Eye window for uplink 25: _XXXXXXXXX_____________________________X
Data delay found: 24
13:55:13:setup_element:INFO: Eye window for uplink 26: ____XXXXXXXXXX__________________________
Data delay found: 28
13:55:13:setup_element:INFO: Eye window for uplink 27: ______XXXXXXXXXX________________________
Data delay found: 30
13:55:13:setup_element:INFO: Eye window for uplink 28: ________XXXXXXXXXXX_____________________
Data delay found: 33
13:55:13:setup_element:INFO: Eye window for uplink 29: ________XXXXXXXXXXX_____________________
Data delay found: 33
13:55:13:setup_element:INFO: Eye window for uplink 30: _______XXXXXXXXXXX_X____________________
Data delay found: 33
13:55:13:setup_element:INFO: Eye window for uplink 31: _______XXXXXXXXX________________________
Data delay found: 31
13:55:13:setup_element:INFO: Setting the data phase to 22 for uplink 24
13:55:13:setup_element:INFO: Setting the data phase to 24 for uplink 25
13:55:13:setup_element:INFO: Setting the data phase to 28 for uplink 26
13:55:13:setup_element:INFO: Setting the data phase to 30 for uplink 27
13:55:13:setup_element:INFO: Setting the data phase to 33 for uplink 28
13:55:13:setup_element:INFO: Setting the data phase to 33 for uplink 29
13:55:13:setup_element:INFO: Setting the data phase to 33 for uplink 30
13:55:13:setup_element:INFO: Setting the data phase to 31 for uplink 31
13:55:13:setup_element:INFO: Beginning SMX ASICs map scan
13:55:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:55:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:55:13:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:55:13:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:55:13:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:55:13:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:55:13:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:55:14:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:55:14:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:55:14:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:55:14:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:55:14:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:55:14:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:55:16:setup_element:INFO: Performing Elink synchronization
13:55:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:55:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:55:16:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:55:16:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:55:16:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:55:16:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:55:16:febtest:INFO: Init all SMX (CSA): 30
13:55:23:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:55:24:febtest:INFO: 30-01 | XA-000-09-004-036-016-021-03 | 9.3 | 1253.7
13:55:24:febtest:INFO: 28-03 | XA-000-09-004-036-016-020-03 | 12.4 | 1259.6
13:55:24:febtest:INFO: 26-05 | XA-000-09-004-036-013-020-08 | 21.9 | 1218.6
13:55:24:febtest:INFO: 24-07 | XA-000-09-004-036-014-012-01 | 25.1 | 1206.9
13:55:25:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:55:27:ST3_smx:INFO: chip: 30-1 9.288730 C 1259.567515 mV
13:55:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:55:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:55:27:ST3_smx:INFO: Electrons
13:55:27:ST3_smx:INFO: # loops 0
13:55:29:ST3_smx:INFO: # loops 1
13:55:30:ST3_smx:INFO: # loops 2
13:55:32:ST3_smx:INFO: Total # of broken channels: 0
13:55:32:ST3_smx:INFO: List of broken channels: []
13:55:32:ST3_smx:INFO: Total # of broken channels: 0
13:55:32:ST3_smx:INFO: List of broken channels: []
13:55:33:ST3_smx:INFO: chip: 28-3 12.438562 C 1265.400000 mV
13:55:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:55:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:55:33:ST3_smx:INFO: Electrons
13:55:33:ST3_smx:INFO: # loops 0
13:55:35:ST3_smx:INFO: # loops 1
13:55:37:ST3_smx:INFO: # loops 2
13:55:38:ST3_smx:INFO: Total # of broken channels: 0
13:55:38:ST3_smx:INFO: List of broken channels: []
13:55:38:ST3_smx:INFO: Total # of broken channels: 0
13:55:38:ST3_smx:INFO: List of broken channels: []
13:55:40:ST3_smx:INFO: chip: 26-5 21.902970 C 1230.330540 mV
13:55:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:55:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:55:40:ST3_smx:INFO: Electrons
13:55:40:ST3_smx:INFO: # loops 0
13:55:41:ST3_smx:INFO: # loops 1
13:55:43:ST3_smx:INFO: # loops 2
13:55:44:ST3_smx:INFO: Total # of broken channels: 0
13:55:44:ST3_smx:INFO: List of broken channels: []
13:55:44:ST3_smx:INFO: Total # of broken channels: 0
13:55:44:ST3_smx:INFO: List of broken channels: []
13:55:46:ST3_smx:INFO: chip: 24-7 28.225000 C 1212.728715 mV
13:55:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:55:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:55:46:ST3_smx:INFO: Electrons
13:55:46:ST3_smx:INFO: # loops 0
13:55:48:ST3_smx:INFO: # loops 1
13:55:50:ST3_smx:INFO: # loops 2
13:55:51:ST3_smx:INFO: Total # of broken channels: 0
13:55:51:ST3_smx:INFO: List of broken channels: []
13:55:51:ST3_smx:INFO: Total # of broken channels: 0
13:55:51:ST3_smx:INFO: List of broken channels: []
13:55:52:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:55:52:febtest:INFO: 30-01 | XA-000-09-004-036-016-021-03 | 12.4 | 1282.9
13:55:52:febtest:INFO: 28-03 | XA-000-09-004-036-016-020-03 | 12.4 | 1294.5
13:55:52:febtest:INFO: 26-05 | XA-000-09-004-036-013-020-08 | 25.1 | 1253.7
13:55:52:febtest:INFO: 24-07 | XA-000-09-004-036-014-012-01 | 28.2 | 1242.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_11_03-13_55_05
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4282| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7804', '1.850', '0.9351']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0050', '1.850', '1.2130']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9781', '1.850', '0.2578']