FEB_4293 13.11.25 13:57:18
Info
13:57:18:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:57:18:ST3_Shared:INFO: FEB-Microcable
13:57:18:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:57:18:febtest:INFO: Testing FEB with SN 4293
13:57:20:smx_tester:INFO: Scanning setup
13:57:20:elinks:INFO: Disabling clock on downlink 0
13:57:20:elinks:INFO: Disabling clock on downlink 1
13:57:20:elinks:INFO: Disabling clock on downlink 2
13:57:20:elinks:INFO: Disabling clock on downlink 3
13:57:20:elinks:INFO: Disabling clock on downlink 4
13:57:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:57:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:57:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:57:20:elinks:INFO: Disabling clock on downlink 0
13:57:20:elinks:INFO: Disabling clock on downlink 1
13:57:20:elinks:INFO: Disabling clock on downlink 2
13:57:20:elinks:INFO: Disabling clock on downlink 3
13:57:20:elinks:INFO: Disabling clock on downlink 4
13:57:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:57:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:57:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:57:20:elinks:INFO: Disabling clock on downlink 0
13:57:20:elinks:INFO: Disabling clock on downlink 1
13:57:20:elinks:INFO: Disabling clock on downlink 2
13:57:20:elinks:INFO: Disabling clock on downlink 3
13:57:20:elinks:INFO: Disabling clock on downlink 4
13:57:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:57:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:57:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:57:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:57:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:57:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:57:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:57:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:57:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:57:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:57:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:57:20:elinks:INFO: Disabling clock on downlink 0
13:57:20:elinks:INFO: Disabling clock on downlink 1
13:57:20:elinks:INFO: Disabling clock on downlink 2
13:57:20:elinks:INFO: Disabling clock on downlink 3
13:57:20:elinks:INFO: Disabling clock on downlink 4
13:57:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:57:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:57:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:57:20:elinks:INFO: Disabling clock on downlink 0
13:57:20:elinks:INFO: Disabling clock on downlink 1
13:57:20:elinks:INFO: Disabling clock on downlink 2
13:57:21:elinks:INFO: Disabling clock on downlink 3
13:57:21:elinks:INFO: Disabling clock on downlink 4
13:57:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:57:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:57:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:57:21:setup_element:INFO: Scanning clock phase
13:57:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:57:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:57:21:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:57:21:setup_element:INFO: Eye window for uplink 24: __________________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 32
13:57:21:setup_element:INFO: Eye window for uplink 25: __________________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 32
13:57:21:setup_element:INFO: Eye window for uplink 26: _________________________________________________________________XXXXXXXXXXXXXXX
Clock Delay: 32
13:57:21:setup_element:INFO: Eye window for uplink 27: _________________________________________________________________XXXXXXXXXXXXXXX
Clock Delay: 32
13:57:21:setup_element:INFO: Eye window for uplink 28: XX________________________________________________________________XXXXXXXX______
Clock Delay: 33
13:57:21:setup_element:INFO: Eye window for uplink 29: XX________________________________________________________________XXXXXXXX______
Clock Delay: 33
13:57:21:setup_element:INFO: Eye window for uplink 30: XXXX______________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 34
13:57:21:setup_element:INFO: Eye window for uplink 31: XXXX______________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 34
13:57:21:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
13:57:21:setup_element:INFO: Scanning data phases
13:57:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:57:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:57:26:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:57:26:setup_element:INFO: Eye window for uplink 24: __XXXXXXXXX____________________________X
Data delay found: 24
13:57:26:setup_element:INFO: Eye window for uplink 25: __XXXXXXXXXX____________________________
Data delay found: 26
13:57:26:setup_element:INFO: Eye window for uplink 26: ____XXXXXXXX_________________________XXX
Data delay found: 24
13:57:26:setup_element:INFO: Eye window for uplink 27: _____XXXXXXXXX_______________________XXX
Data delay found: 25
13:57:26:setup_element:INFO: Eye window for uplink 28: _______XXXXXXXXXXX___X__________________
Data delay found: 34
13:57:26:setup_element:INFO: Eye window for uplink 29: _______XXXXXXXXXXX___X__________________
Data delay found: 34
13:57:26:setup_element:INFO: Eye window for uplink 30: _________XXXXXXXXXXXXX__________________
Data delay found: 35
13:57:26:setup_element:INFO: Eye window for uplink 31: _________XXXXXXXXX___X__________________
Data delay found: 35
13:57:26:setup_element:INFO: Setting the data phase to 24 for uplink 24
13:57:26:setup_element:INFO: Setting the data phase to 26 for uplink 25
13:57:26:setup_element:INFO: Setting the data phase to 24 for uplink 26
13:57:26:setup_element:INFO: Setting the data phase to 25 for uplink 27
13:57:26:setup_element:INFO: Setting the data phase to 34 for uplink 28
13:57:26:setup_element:INFO: Setting the data phase to 34 for uplink 29
13:57:26:setup_element:INFO: Setting the data phase to 35 for uplink 30
13:57:26:setup_element:INFO: Setting the data phase to 35 for uplink 31
13:57:26:setup_element:INFO: Beginning SMX ASICs map scan
13:57:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:57:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:57:26:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:57:26:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:57:26:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:57:26:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:57:26:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:57:27:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:57:27:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:57:27:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:57:27:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:57:27:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:57:27:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:57:29:setup_element:INFO: Performing Elink synchronization
13:57:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:57:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:57:29:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:57:29:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:57:29:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:57:29:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:57:29:febtest:INFO: Init all SMX (CSA): 30
13:57:36:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:57:36:febtest:INFO: 30-01 | XA-000-09-004-036-016-008-04 | 25.1 | 1201.0
13:57:37:febtest:INFO: 28-03 | XA-000-09-004-036-004-008-14 | 31.4 | 1183.3
13:57:37:febtest:INFO: 26-05 | XA-000-09-004-036-007-008-00 | 34.6 | 1171.5
13:57:37:febtest:INFO: 24-07 | XA-000-09-004-036-010-008-07 | 31.4 | 1177.4
13:57:38:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:57:40:ST3_smx:INFO: chip: 30-1 25.062742 C 1212.728715 mV
13:57:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:57:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:57:40:ST3_smx:INFO: Electrons
13:57:40:ST3_smx:INFO: # loops 0
13:57:41:ST3_smx:INFO: # loops 1
13:57:43:ST3_smx:INFO: # loops 2
13:57:44:ST3_smx:INFO: Total # of broken channels: 0
13:57:44:ST3_smx:INFO: List of broken channels: []
13:57:44:ST3_smx:INFO: Total # of broken channels: 0
13:57:44:ST3_smx:INFO: List of broken channels: []
13:57:46:ST3_smx:INFO: chip: 28-3 34.556970 C 1195.082160 mV
13:57:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:57:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:57:46:ST3_smx:INFO: Electrons
13:57:46:ST3_smx:INFO: # loops 0
13:57:48:ST3_smx:INFO: # loops 1
13:57:49:ST3_smx:INFO: # loops 2
13:57:51:ST3_smx:INFO: Total # of broken channels: 0
13:57:51:ST3_smx:INFO: List of broken channels: []
13:57:51:ST3_smx:INFO: Total # of broken channels: 0
13:57:51:ST3_smx:INFO: List of broken channels: []
13:57:53:ST3_smx:INFO: chip: 26-5 34.556970 C 1183.292940 mV
13:57:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:57:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:57:53:ST3_smx:INFO: Electrons
13:57:53:ST3_smx:INFO: # loops 0
13:57:54:ST3_smx:INFO: # loops 1
13:57:56:ST3_smx:INFO: # loops 2
13:57:57:ST3_smx:INFO: Total # of broken channels: 0
13:57:57:ST3_smx:INFO: List of broken channels: []
13:57:57:ST3_smx:INFO: Total # of broken channels: 0
13:57:57:ST3_smx:INFO: List of broken channels: []
13:57:59:ST3_smx:INFO: chip: 24-7 34.556970 C 1189.190035 mV
13:57:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:57:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:57:59:ST3_smx:INFO: Electrons
13:57:59:ST3_smx:INFO: # loops 0
13:58:00:ST3_smx:INFO: # loops 1
13:58:02:ST3_smx:INFO: # loops 2
13:58:03:ST3_smx:INFO: Total # of broken channels: 0
13:58:03:ST3_smx:INFO: List of broken channels: []
13:58:03:ST3_smx:INFO: Total # of broken channels: 0
13:58:03:ST3_smx:INFO: List of broken channels: []
13:58:04:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:58:04:febtest:INFO: 30-01 | XA-000-09-004-036-016-008-04 | 25.1 | 1236.2
13:58:04:febtest:INFO: 28-03 | XA-000-09-004-036-004-008-14 | 34.6 | 1218.6
13:58:04:febtest:INFO: 26-05 | XA-000-09-004-036-007-008-00 | 34.6 | 1201.0
13:58:05:febtest:INFO: 24-07 | XA-000-09-004-036-010-008-07 | 34.6 | 1206.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_11_13-13_57_18
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4293| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.6855', '1.850', '1.2030']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0130', '1.850', '1.2760']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9867', '1.850', '0.2623']