FEB_4294 14.11.25 10:54:46
Info
10:54:46:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:54:46:ST3_Shared:INFO: FEB-Microcable
10:54:46:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:54:46:febtest:INFO: Testing FEB with SN 4294
10:54:48:smx_tester:INFO: Scanning setup
10:54:48:elinks:INFO: Disabling clock on downlink 0
10:54:48:elinks:INFO: Disabling clock on downlink 1
10:54:48:elinks:INFO: Disabling clock on downlink 2
10:54:48:elinks:INFO: Disabling clock on downlink 3
10:54:48:elinks:INFO: Disabling clock on downlink 4
10:54:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:54:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:54:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:54:48:elinks:INFO: Disabling clock on downlink 0
10:54:48:elinks:INFO: Disabling clock on downlink 1
10:54:48:elinks:INFO: Disabling clock on downlink 2
10:54:48:elinks:INFO: Disabling clock on downlink 3
10:54:48:elinks:INFO: Disabling clock on downlink 4
10:54:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:54:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:54:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:54:48:elinks:INFO: Disabling clock on downlink 0
10:54:48:elinks:INFO: Disabling clock on downlink 1
10:54:48:elinks:INFO: Disabling clock on downlink 2
10:54:48:elinks:INFO: Disabling clock on downlink 3
10:54:48:elinks:INFO: Disabling clock on downlink 4
10:54:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:54:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:54:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:54:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:54:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:54:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:54:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:54:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:54:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:54:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:54:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:54:48:elinks:INFO: Disabling clock on downlink 0
10:54:48:elinks:INFO: Disabling clock on downlink 1
10:54:48:elinks:INFO: Disabling clock on downlink 2
10:54:48:elinks:INFO: Disabling clock on downlink 3
10:54:48:elinks:INFO: Disabling clock on downlink 4
10:54:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:54:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:54:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:54:48:elinks:INFO: Disabling clock on downlink 0
10:54:48:elinks:INFO: Disabling clock on downlink 1
10:54:48:elinks:INFO: Disabling clock on downlink 2
10:54:48:elinks:INFO: Disabling clock on downlink 3
10:54:48:elinks:INFO: Disabling clock on downlink 4
10:54:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:54:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:54:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:54:49:setup_element:INFO: Scanning clock phase
10:54:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:54:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:54:49:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:54:49:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXX_____X__
Clock Delay: 32
10:54:49:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXX_____X__
Clock Delay: 32
10:54:49:setup_element:INFO: Eye window for uplink 26: XXXXX________________________________________________________________XXXX_______
Clock Delay: 36
10:54:49:setup_element:INFO: Eye window for uplink 27: XXXXX________________________________________________________________XXXX_______
Clock Delay: 36
10:54:49:setup_element:INFO: Eye window for uplink 28: XXX_________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
10:54:49:setup_element:INFO: Eye window for uplink 29: XXX_________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
10:54:49:setup_element:INFO: Eye window for uplink 30: XXXXX_______________________________________________________________XXXXXXXXXX__
Clock Delay: 36
10:54:49:setup_element:INFO: Eye window for uplink 31: XXXXX_______________________________________________________________XXXXXXXXXX__
Clock Delay: 36
10:54:49:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 2
10:54:49:setup_element:INFO: Scanning data phases
10:54:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:54:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:54:54:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:54:54:setup_element:INFO: Eye window for uplink 24: _____XXXXX______________________________
Data delay found: 27
10:54:54:setup_element:INFO: Eye window for uplink 25: ______XXXXXX____________________________
Data delay found: 28
10:54:54:setup_element:INFO: Eye window for uplink 26: ______XXXXXX____________________________
Data delay found: 28
10:54:54:setup_element:INFO: Eye window for uplink 27: ________XXXXXXX_________________________
Data delay found: 31
10:54:54:setup_element:INFO: Eye window for uplink 28: ___________XXXXXX____XXXXXXXXXXXXXXXXXXX
Data delay found: 5
10:54:54:setup_element:INFO: Eye window for uplink 29: ___________XXXXXX____XXXXXXXXXXXXXXXXXXX
Data delay found: 5
10:54:54:setup_element:INFO: Eye window for uplink 30: __________XXXXXXX_______________________
Data delay found: 33
10:54:54:setup_element:INFO: Eye window for uplink 31: _________XXXXXX_________________________
Data delay found: 31
10:54:54:setup_element:INFO: Setting the data phase to 27 for uplink 24
10:54:54:setup_element:INFO: Setting the data phase to 28 for uplink 25
10:54:54:setup_element:INFO: Setting the data phase to 28 for uplink 26
10:54:54:setup_element:INFO: Setting the data phase to 31 for uplink 27
10:54:54:setup_element:INFO: Setting the data phase to 5 for uplink 28
10:54:54:setup_element:INFO: Setting the data phase to 5 for uplink 29
10:54:54:setup_element:INFO: Setting the data phase to 33 for uplink 30
10:54:54:setup_element:INFO: Setting the data phase to 31 for uplink 31
10:54:54:setup_element:INFO: Beginning SMX ASICs map scan
10:54:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:54:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:54:54:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:54:54:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:54:54:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
10:54:54:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:54:54:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:54:55:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:54:55:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:54:55:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:54:55:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:54:55:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:54:55:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:54:57:setup_element:INFO: Performing Elink synchronization
10:54:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:54:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:54:57:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:54:57:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:54:57:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:54:57:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:54:57:febtest:INFO: Init all SMX (CSA): 30
10:55:04:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:55:05:febtest:INFO: 30-01 | XA-000-09-004-036-016-012-04 | 21.9 | 1195.1
10:55:05:febtest:INFO: 28-03 | XA-000-09-004-036-004-013-14 | 31.4 | 1171.5
10:55:05:febtest:INFO: 26-05 | XA-000-09-004-036-010-013-07 | 37.7 | 1153.7
10:55:05:febtest:INFO: 24-07 | XA-000-09-004-036-013-013-15 | 31.4 | 1177.4
10:55:06:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:55:08:ST3_smx:INFO: chip: 30-1 25.062742 C 1206.851500 mV
10:55:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:08:ST3_smx:INFO: Electrons
10:55:08:ST3_smx:INFO: # loops 0
10:55:10:ST3_smx:INFO: # loops 1
10:55:12:ST3_smx:INFO: # loops 2
10:55:13:ST3_smx:INFO: Total # of broken channels: 0
10:55:13:ST3_smx:INFO: List of broken channels: []
10:55:13:ST3_smx:INFO: Total # of broken channels: 0
10:55:13:ST3_smx:INFO: List of broken channels: []
10:55:15:ST3_smx:INFO: chip: 28-3 31.389742 C 1183.292940 mV
10:55:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:15:ST3_smx:INFO: Electrons
10:55:15:ST3_smx:INFO: # loops 0
10:55:16:ST3_smx:INFO: # loops 1
10:55:18:ST3_smx:INFO: # loops 2
10:55:20:ST3_smx:INFO: Total # of broken channels: 0
10:55:20:ST3_smx:INFO: List of broken channels: []
10:55:20:ST3_smx:INFO: Total # of broken channels: 0
10:55:20:ST3_smx:INFO: List of broken channels: []
10:55:21:ST3_smx:INFO: chip: 26-5 40.898880 C 1165.571835 mV
10:55:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:21:ST3_smx:INFO: Electrons
10:55:21:ST3_smx:INFO: # loops 0
10:55:23:ST3_smx:INFO: # loops 1
10:55:24:ST3_smx:INFO: # loops 2
10:55:26:ST3_smx:INFO: Total # of broken channels: 0
10:55:26:ST3_smx:INFO: List of broken channels: []
10:55:26:ST3_smx:INFO: Total # of broken channels: 0
10:55:26:ST3_smx:INFO: List of broken channels: []
10:55:27:ST3_smx:INFO: chip: 24-7 34.556970 C 1189.190035 mV
10:55:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:27:ST3_smx:INFO: Electrons
10:55:27:ST3_smx:INFO: # loops 0
10:55:29:ST3_smx:INFO: # loops 1
10:55:31:ST3_smx:INFO: # loops 2
10:55:32:ST3_smx:INFO: Total # of broken channels: 0
10:55:32:ST3_smx:INFO: List of broken channels: []
10:55:32:ST3_smx:INFO: Total # of broken channels: 0
10:55:32:ST3_smx:INFO: List of broken channels: []
10:55:32:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:55:33:febtest:INFO: 30-01 | XA-000-09-004-036-016-012-04 | 25.1 | 1230.3
10:55:33:febtest:INFO: 28-03 | XA-000-09-004-036-004-013-14 | 34.6 | 1212.7
10:55:33:febtest:INFO: 26-05 | XA-000-09-004-036-010-013-07 | 40.9 | 1189.2
10:55:33:febtest:INFO: 24-07 | XA-000-09-004-036-013-013-15 | 37.7 | 1206.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_11_14-10_54_46
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4294| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7387', '1.850', '0.9884']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0120', '1.850', '1.2520']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9835', '1.850', '0.2599']