FEB_4302 21.11.25 13:04:41
Info
13:04:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:04:41:ST3_Shared:INFO: FEB-Microcable
13:04:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:04:41:febtest:INFO: Testing FEB with SN 4302
13:04:43:smx_tester:INFO: Scanning setup
13:04:43:elinks:INFO: Disabling clock on downlink 0
13:04:43:elinks:INFO: Disabling clock on downlink 1
13:04:43:elinks:INFO: Disabling clock on downlink 2
13:04:43:elinks:INFO: Disabling clock on downlink 3
13:04:43:elinks:INFO: Disabling clock on downlink 4
13:04:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:04:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:04:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:04:43:elinks:INFO: Disabling clock on downlink 0
13:04:43:elinks:INFO: Disabling clock on downlink 1
13:04:43:elinks:INFO: Disabling clock on downlink 2
13:04:43:elinks:INFO: Disabling clock on downlink 3
13:04:43:elinks:INFO: Disabling clock on downlink 4
13:04:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:04:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:04:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:04:43:elinks:INFO: Disabling clock on downlink 0
13:04:43:elinks:INFO: Disabling clock on downlink 1
13:04:43:elinks:INFO: Disabling clock on downlink 2
13:04:43:elinks:INFO: Disabling clock on downlink 3
13:04:43:elinks:INFO: Disabling clock on downlink 4
13:04:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:04:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:04:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:04:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:04:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:04:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:04:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:04:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:04:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:04:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:04:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:04:43:elinks:INFO: Disabling clock on downlink 0
13:04:43:elinks:INFO: Disabling clock on downlink 1
13:04:43:elinks:INFO: Disabling clock on downlink 2
13:04:43:elinks:INFO: Disabling clock on downlink 3
13:04:43:elinks:INFO: Disabling clock on downlink 4
13:04:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:04:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:04:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:04:43:elinks:INFO: Disabling clock on downlink 0
13:04:43:elinks:INFO: Disabling clock on downlink 1
13:04:43:elinks:INFO: Disabling clock on downlink 2
13:04:43:elinks:INFO: Disabling clock on downlink 3
13:04:43:elinks:INFO: Disabling clock on downlink 4
13:04:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:04:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:04:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:04:43:setup_element:INFO: Scanning clock phase
13:04:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:04:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:04:44:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:04:44:setup_element:INFO: Eye window for uplink 24: X_________________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 33
13:04:44:setup_element:INFO: Eye window for uplink 25: X_________________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 33
13:04:44:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
13:04:44:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
13:04:44:setup_element:INFO: Eye window for uplink 28: X__________________________________________________________________XXXX_________
Clock Delay: 33
13:04:44:setup_element:INFO: Eye window for uplink 29: X__________________________________________________________________XXXX_________
Clock Delay: 33
13:04:44:setup_element:INFO: Eye window for uplink 30: _________________________________________________________________XXXXXXXXXXXXXXX
Clock Delay: 32
13:04:44:setup_element:INFO: Eye window for uplink 31: _________________________________________________________________XXXXXXXXXXXXXXX
Clock Delay: 32
13:04:44:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
13:04:44:setup_element:INFO: Scanning data phases
13:04:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:04:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:04:49:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:04:49:setup_element:INFO: Eye window for uplink 24: _____XXXXXXXXX__________________________
Data delay found: 29
13:04:49:setup_element:INFO: Eye window for uplink 25: ______XXXXXXXXXX________________________
Data delay found: 30
13:04:49:setup_element:INFO: Eye window for uplink 26: __XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX_____
Data delay found: 38
13:04:49:setup_element:INFO: Eye window for uplink 27: __XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX_____
Data delay found: 38
13:04:49:setup_element:INFO: Eye window for uplink 28: _________XXXXXXXXXXXXXX_____________XXXX
Data delay found: 29
13:04:49:setup_element:INFO: Eye window for uplink 29: _________XXXXXXXXXXXXXX_____________XXXX
Data delay found: 29
13:04:49:setup_element:INFO: Eye window for uplink 30: _________XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 4
13:04:49:setup_element:INFO: Eye window for uplink 31: ________XXXXXXXXXXX__XXXXXXXXXXXXXXXXXXX
Data delay found: 3
13:04:49:setup_element:INFO: Setting the data phase to 29 for uplink 24
13:04:49:setup_element:INFO: Setting the data phase to 30 for uplink 25
13:04:49:setup_element:INFO: Setting the data phase to 38 for uplink 26
13:04:49:setup_element:INFO: Setting the data phase to 38 for uplink 27
13:04:49:setup_element:INFO: Setting the data phase to 29 for uplink 28
13:04:49:setup_element:INFO: Setting the data phase to 29 for uplink 29
13:04:49:setup_element:INFO: Setting the data phase to 4 for uplink 30
13:04:49:setup_element:INFO: Setting the data phase to 3 for uplink 31
13:04:49:setup_element:INFO: Beginning SMX ASICs map scan
13:04:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:04:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:04:49:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:04:49:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:04:49:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:04:49:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:04:49:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:04:49:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:04:49:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:04:50:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:04:50:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:04:50:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:04:50:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:04:51:setup_element:INFO: Performing Elink synchronization
13:04:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:04:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:04:51:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:04:51:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:04:51:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:04:51:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:04:52:febtest:INFO: Init all SMX (CSA): 30
13:04:59:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:04:59:febtest:INFO: 30-01 | XA-000-09-004-036-008-010-04 | 28.2 | 1189.2
13:05:00:febtest:INFO: 28-03 | XA-000-09-004-036-005-010-03 | 37.7 | 1159.7
13:05:00:febtest:INFO: 26-05 | XA-000-09-004-036-011-010-10 | 25.1 | 1212.7
13:05:00:febtest:INFO: 24-07 | XA-000-09-004-036-002-011-11 | 34.6 | 1171.5
13:05:01:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:05:03:ST3_smx:INFO: chip: 30-1 28.225000 C 1200.969315 mV
13:05:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:05:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:05:03:ST3_smx:INFO: Electrons
13:05:03:ST3_smx:INFO: # loops 0
13:05:04:ST3_smx:INFO: # loops 1
13:05:06:ST3_smx:INFO: # loops 2
13:05:08:ST3_smx:INFO: Total # of broken channels: 0
13:05:08:ST3_smx:INFO: List of broken channels: []
13:05:08:ST3_smx:INFO: Total # of broken channels: 0
13:05:08:ST3_smx:INFO: List of broken channels: []
13:05:09:ST3_smx:INFO: chip: 28-3 37.726682 C 1171.483840 mV
13:05:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:05:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:05:10:ST3_smx:INFO: Electrons
13:05:10:ST3_smx:INFO: # loops 0
13:05:11:ST3_smx:INFO: # loops 1
13:05:13:ST3_smx:INFO: # loops 2
13:05:14:ST3_smx:INFO: Total # of broken channels: 0
13:05:14:ST3_smx:INFO: List of broken channels: []
13:05:14:ST3_smx:INFO: Total # of broken channels: 0
13:05:14:ST3_smx:INFO: List of broken channels: []
13:05:16:ST3_smx:INFO: chip: 26-5 25.062742 C 1224.468235 mV
13:05:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:05:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:05:16:ST3_smx:INFO: Electrons
13:05:16:ST3_smx:INFO: # loops 0
13:05:18:ST3_smx:INFO: # loops 1
13:05:19:ST3_smx:INFO: # loops 2
13:05:21:ST3_smx:INFO: Total # of broken channels: 0
13:05:21:ST3_smx:INFO: List of broken channels: []
13:05:21:ST3_smx:INFO: Total # of broken channels: 0
13:05:21:ST3_smx:INFO: List of broken channels: []
13:05:22:ST3_smx:INFO: chip: 24-7 37.726682 C 1183.292940 mV
13:05:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:05:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:05:22:ST3_smx:INFO: Electrons
13:05:23:ST3_smx:INFO: # loops 0
13:05:24:ST3_smx:INFO: # loops 1
13:05:26:ST3_smx:INFO: # loops 2
13:05:27:ST3_smx:INFO: Total # of broken channels: 0
13:05:27:ST3_smx:INFO: List of broken channels: []
13:05:27:ST3_smx:INFO: Total # of broken channels: 0
13:05:27:ST3_smx:INFO: List of broken channels: []
13:05:28:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:05:28:febtest:INFO: 30-01 | XA-000-09-004-036-008-010-04 | 28.2 | 1224.5
13:05:28:febtest:INFO: 28-03 | XA-000-09-004-036-005-010-03 | 37.7 | 1195.1
13:05:28:febtest:INFO: 26-05 | XA-000-09-004-036-011-010-10 | 25.1 | 1242.0
13:05:29:febtest:INFO: 24-07 | XA-000-09-004-036-002-011-11 | 37.7 | 1201.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_11_21-13_04_41
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4302| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.8076', '1.850', '1.3140']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0200', '1.850', '1.2740']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9870', '1.850', '0.2614']