FEB_4304 24.11.25 08:53:38
Info
08:53:38:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:53:38:ST3_Shared:INFO: FEB-Microcable
08:53:38:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:53:38:febtest:INFO: Testing FEB with SN 4304
08:53:40:smx_tester:INFO: Scanning setup
08:53:40:elinks:INFO: Disabling clock on downlink 0
08:53:40:elinks:INFO: Disabling clock on downlink 1
08:53:40:elinks:INFO: Disabling clock on downlink 2
08:53:40:elinks:INFO: Disabling clock on downlink 3
08:53:40:elinks:INFO: Disabling clock on downlink 4
08:53:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:53:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:53:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:53:40:elinks:INFO: Disabling clock on downlink 0
08:53:40:elinks:INFO: Disabling clock on downlink 1
08:53:40:elinks:INFO: Disabling clock on downlink 2
08:53:40:elinks:INFO: Disabling clock on downlink 3
08:53:40:elinks:INFO: Disabling clock on downlink 4
08:53:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:53:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:53:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:53:40:elinks:INFO: Disabling clock on downlink 0
08:53:40:elinks:INFO: Disabling clock on downlink 1
08:53:40:elinks:INFO: Disabling clock on downlink 2
08:53:40:elinks:INFO: Disabling clock on downlink 3
08:53:40:elinks:INFO: Disabling clock on downlink 4
08:53:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:53:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:53:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
08:53:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
08:53:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
08:53:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
08:53:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
08:53:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
08:53:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
08:53:40:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
08:53:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:53:40:elinks:INFO: Disabling clock on downlink 0
08:53:40:elinks:INFO: Disabling clock on downlink 1
08:53:40:elinks:INFO: Disabling clock on downlink 2
08:53:40:elinks:INFO: Disabling clock on downlink 3
08:53:40:elinks:INFO: Disabling clock on downlink 4
08:53:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:53:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:53:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:53:40:elinks:INFO: Disabling clock on downlink 0
08:53:40:elinks:INFO: Disabling clock on downlink 1
08:53:40:elinks:INFO: Disabling clock on downlink 2
08:53:40:elinks:INFO: Disabling clock on downlink 3
08:53:40:elinks:INFO: Disabling clock on downlink 4
08:53:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:53:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:53:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:53:40:setup_element:INFO: Scanning clock phase
08:53:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:53:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:53:41:setup_element:INFO: Clock phase scan results for group 0, downlink 2
08:53:41:setup_element:INFO: Eye window for uplink 24: X__________________________________________________________________XXXXXXXXXXXXX
Clock Delay: 33
08:53:41:setup_element:INFO: Eye window for uplink 25: X__________________________________________________________________XXXXXXXXXXXXX
Clock Delay: 33
08:53:41:setup_element:INFO: Eye window for uplink 26: X_________________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 33
08:53:41:setup_element:INFO: Eye window for uplink 27: X_________________________________________________________________XXXXXXXXXXXXXX
Clock Delay: 33
08:53:41:setup_element:INFO: Eye window for uplink 28: X_________________________________________________________________________XXXXXX
Clock Delay: 37
08:53:41:setup_element:INFO: Eye window for uplink 29: X_________________________________________________________________________XXXXXX
Clock Delay: 37
08:53:41:setup_element:INFO: Eye window for uplink 30: XXXX____________________________________________________________________________
Clock Delay: 41
08:53:41:setup_element:INFO: Eye window for uplink 31: XXXX____________________________________________________________________________
Clock Delay: 41
08:53:41:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
08:53:41:setup_element:INFO: Scanning data phases
08:53:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:53:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:53:46:setup_element:INFO: Data phase scan results for group 0, downlink 2
08:53:46:setup_element:INFO: Eye window for uplink 24: ___XXXXXXXXXX___________________________
Data delay found: 27
08:53:46:setup_element:INFO: Eye window for uplink 25: _____XXXXXXXXXX_________________________
Data delay found: 29
08:53:46:setup_element:INFO: Eye window for uplink 26: ______XXXXXXXXX________XXXXX____________
Data delay found: 36
08:53:46:setup_element:INFO: Eye window for uplink 27: _______XXXXXXXXXX______XXXXX____________
Data delay found: 37
08:53:46:setup_element:INFO: Eye window for uplink 28: ________XXXXXXXXXXX_____________________
Data delay found: 33
08:53:46:setup_element:INFO: Eye window for uplink 29: ________XXXXXXXXXX______________________
Data delay found: 32
08:53:46:setup_element:INFO: Eye window for uplink 30: _______XXXXXXXXXXXXXX___________________
Data delay found: 33
08:53:46:setup_element:INFO: Eye window for uplink 31: _______XXXXXXXXXXXX_____________________
Data delay found: 32
08:53:46:setup_element:INFO: Setting the data phase to 27 for uplink 24
08:53:46:setup_element:INFO: Setting the data phase to 29 for uplink 25
08:53:46:setup_element:INFO: Setting the data phase to 36 for uplink 26
08:53:46:setup_element:INFO: Setting the data phase to 37 for uplink 27
08:53:46:setup_element:INFO: Setting the data phase to 33 for uplink 28
08:53:46:setup_element:INFO: Setting the data phase to 32 for uplink 29
08:53:46:setup_element:INFO: Setting the data phase to 33 for uplink 30
08:53:46:setup_element:INFO: Setting the data phase to 32 for uplink 31
08:53:46:setup_element:INFO: Beginning SMX ASICs map scan
08:53:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:53:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:53:46:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:53:46:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:53:46:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
08:53:46:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:53:46:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:53:46:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:53:46:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:53:47:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:53:47:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:53:47:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:53:47:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:53:48:setup_element:INFO: Performing Elink synchronization
08:53:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:53:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:53:48:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:53:48:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:53:48:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
08:53:48:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:53:49:febtest:INFO: Init all SMX (CSA): 30
08:53:56:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:53:56:febtest:INFO: 30-01 | XA-000-09-004-026-011-008-15 | 31.4 | 1177.4
08:53:56:febtest:INFO: 28-03 | XA-000-09-004-026-008-008-01 | 31.4 | 1183.3
08:53:57:febtest:INFO: 26-05 | XA-000-09-004-026-005-008-06 | 34.6 | 1177.4
08:53:57:febtest:INFO: 24-07 | XA-000-09-004-026-005-007-06 | 28.2 | 1195.1
08:53:58:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:54:00:ST3_smx:INFO: chip: 30-1 34.556970 C 1189.190035 mV
08:54:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:00:ST3_smx:INFO: Electrons
08:54:00:ST3_smx:INFO: # loops 0
08:54:01:ST3_smx:INFO: # loops 1
08:54:03:ST3_smx:INFO: # loops 2
08:54:05:ST3_smx:INFO: Total # of broken channels: 0
08:54:05:ST3_smx:INFO: List of broken channels: []
08:54:05:ST3_smx:INFO: Total # of broken channels: 0
08:54:05:ST3_smx:INFO: List of broken channels: []
08:54:06:ST3_smx:INFO: chip: 28-3 31.389742 C 1195.082160 mV
08:54:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:06:ST3_smx:INFO: Electrons
08:54:06:ST3_smx:INFO: # loops 0
08:54:08:ST3_smx:INFO: # loops 1
08:54:09:ST3_smx:INFO: # loops 2
08:54:11:ST3_smx:INFO: Total # of broken channels: 0
08:54:11:ST3_smx:INFO: List of broken channels: []
08:54:11:ST3_smx:INFO: Total # of broken channels: 0
08:54:11:ST3_smx:INFO: List of broken channels: []
08:54:13:ST3_smx:INFO: chip: 26-5 37.726682 C 1183.292940 mV
08:54:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:13:ST3_smx:INFO: Electrons
08:54:13:ST3_smx:INFO: # loops 0
08:54:14:ST3_smx:INFO: # loops 1
08:54:16:ST3_smx:INFO: # loops 2
08:54:17:ST3_smx:INFO: Total # of broken channels: 0
08:54:17:ST3_smx:INFO: List of broken channels: []
08:54:17:ST3_smx:INFO: Total # of broken channels: 0
08:54:17:ST3_smx:INFO: List of broken channels: []
08:54:19:ST3_smx:INFO: chip: 24-7 31.389742 C 1200.969315 mV
08:54:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:19:ST3_smx:INFO: Electrons
08:54:19:ST3_smx:INFO: # loops 0
08:54:20:ST3_smx:INFO: # loops 1
08:54:22:ST3_smx:INFO: # loops 2
08:54:23:ST3_smx:INFO: Total # of broken channels: 0
08:54:23:ST3_smx:INFO: List of broken channels: []
08:54:23:ST3_smx:INFO: Total # of broken channels: 0
08:54:23:ST3_smx:INFO: List of broken channels: []
08:54:24:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:54:24:febtest:INFO: 30-01 | XA-000-09-004-026-011-008-15 | 34.6 | 1218.6
08:54:24:febtest:INFO: 28-03 | XA-000-09-004-026-008-008-01 | 34.6 | 1218.6
08:54:24:febtest:INFO: 26-05 | XA-000-09-004-026-005-008-06 | 37.7 | 1206.9
08:54:25:febtest:INFO: 24-07 | XA-000-09-004-026-005-007-06 | 31.4 | 1224.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_11_24-08_53_38
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4304| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7530', '1.848', '0.9409']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0190', '1.849', '1.3040']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9949', '1.850', '0.2669']