FEB_4306 25.11.25 13:51:12
Info
13:51:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:51:12:ST3_Shared:INFO: FEB-Microcable
13:51:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:51:12:febtest:INFO: Testing FEB with SN 4306
13:51:14:smx_tester:INFO: Scanning setup
13:51:14:elinks:INFO: Disabling clock on downlink 0
13:51:14:elinks:INFO: Disabling clock on downlink 1
13:51:14:elinks:INFO: Disabling clock on downlink 2
13:51:14:elinks:INFO: Disabling clock on downlink 3
13:51:14:elinks:INFO: Disabling clock on downlink 4
13:51:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:51:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:51:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:51:14:elinks:INFO: Disabling clock on downlink 0
13:51:14:elinks:INFO: Disabling clock on downlink 1
13:51:14:elinks:INFO: Disabling clock on downlink 2
13:51:14:elinks:INFO: Disabling clock on downlink 3
13:51:14:elinks:INFO: Disabling clock on downlink 4
13:51:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:51:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:51:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:51:14:elinks:INFO: Disabling clock on downlink 0
13:51:14:elinks:INFO: Disabling clock on downlink 1
13:51:14:elinks:INFO: Disabling clock on downlink 2
13:51:14:elinks:INFO: Disabling clock on downlink 3
13:51:14:elinks:INFO: Disabling clock on downlink 4
13:51:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:51:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:51:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:51:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:51:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:51:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:51:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:51:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:51:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:51:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:51:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:51:14:elinks:INFO: Disabling clock on downlink 0
13:51:14:elinks:INFO: Disabling clock on downlink 1
13:51:14:elinks:INFO: Disabling clock on downlink 2
13:51:14:elinks:INFO: Disabling clock on downlink 3
13:51:14:elinks:INFO: Disabling clock on downlink 4
13:51:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:51:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:51:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:51:14:elinks:INFO: Disabling clock on downlink 0
13:51:14:elinks:INFO: Disabling clock on downlink 1
13:51:14:elinks:INFO: Disabling clock on downlink 2
13:51:14:elinks:INFO: Disabling clock on downlink 3
13:51:14:elinks:INFO: Disabling clock on downlink 4
13:51:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:51:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:51:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:51:14:setup_element:INFO: Scanning clock phase
13:51:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:51:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:51:15:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:51:15:setup_element:INFO: Eye window for uplink 24: XX_X_______________________________________________________________XXXXXXXXXXXXX
Clock Delay: 35
13:51:15:setup_element:INFO: Eye window for uplink 25: XX_X_______________________________________________________________XXXXXXXXXXXXX
Clock Delay: 35
13:51:15:setup_element:INFO: Eye window for uplink 26: XX_________________________________________________________________XXXXXXXXXXXX_
Clock Delay: 34
13:51:15:setup_element:INFO: Eye window for uplink 27: XX_________________________________________________________________XXXXXXXXXXXX_
Clock Delay: 34
13:51:15:setup_element:INFO: Eye window for uplink 28: X__________________________________________________________________XXXXXXXXXXXXX
Clock Delay: 33
13:51:15:setup_element:INFO: Eye window for uplink 29: X__________________________________________________________________XXXXXXXXXXXXX
Clock Delay: 33
13:51:15:setup_element:INFO: Eye window for uplink 30: XX_X_____________________________________________________________XXXXXXXXXXXXXXX
Clock Delay: 34
13:51:15:setup_element:INFO: Eye window for uplink 31: XX_X_____________________________________________________________XXXXXXXXXXXXXXX
Clock Delay: 34
13:51:15:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
13:51:15:setup_element:INFO: Scanning data phases
13:51:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:51:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:51:20:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:51:20:setup_element:INFO: Eye window for uplink 24: ___XXXXXXXXXXXX_________________________
Data delay found: 28
13:51:20:setup_element:INFO: Eye window for uplink 25: _____XXXXXXXXXXX________________________
Data delay found: 30
13:51:20:setup_element:INFO: Eye window for uplink 26: ____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 1
13:51:20:setup_element:INFO: Eye window for uplink 27: ______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 2
13:51:20:setup_element:INFO: Eye window for uplink 28: __________XXXXXXXXXXXXXXXXXXXXXXXX______
Data delay found: 1
13:51:20:setup_element:INFO: Eye window for uplink 29: __________XXXXXXXXXXXXXXXXXXXXXXXX______
Data delay found: 1
13:51:20:setup_element:INFO: Eye window for uplink 30: ________XXXXXXXXXXXX____________________
Data delay found: 33
13:51:20:setup_element:INFO: Eye window for uplink 31: ________XXXXXXXXX_______________________
Data delay found: 32
13:51:20:setup_element:INFO: Setting the data phase to 28 for uplink 24
13:51:20:setup_element:INFO: Setting the data phase to 30 for uplink 25
13:51:20:setup_element:INFO: Setting the data phase to 1 for uplink 26
13:51:20:setup_element:INFO: Setting the data phase to 2 for uplink 27
13:51:20:setup_element:INFO: Setting the data phase to 1 for uplink 28
13:51:20:setup_element:INFO: Setting the data phase to 1 for uplink 29
13:51:20:setup_element:INFO: Setting the data phase to 33 for uplink 30
13:51:20:setup_element:INFO: Setting the data phase to 32 for uplink 31
13:51:20:setup_element:INFO: Beginning SMX ASICs map scan
13:51:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:51:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:51:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:51:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:51:20:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:51:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:51:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:51:20:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:51:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:51:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:51:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:51:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:51:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:51:22:setup_element:INFO: Performing Elink synchronization
13:51:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:51:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:51:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:51:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:51:23:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:51:23:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:51:23:febtest:INFO: Init all SMX (CSA): 30
13:51:30:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:51:30:febtest:INFO: 30-01 | XA-000-09-004-026-007-003-05 | 50.4 | 1124.0
13:51:30:febtest:INFO: 28-03 | XA-000-09-004-026-007-004-05 | 53.6 | 1124.0
13:51:31:febtest:INFO: 26-05 | XA-000-09-004-026-010-004-02 | 40.9 | 1165.6
13:51:31:febtest:INFO: 24-07 | XA-000-09-004-026-013-004-10 | 40.9 | 1153.7
13:51:32:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:51:34:ST3_smx:INFO: chip: 30-1 50.430383 C 1135.937260 mV
13:51:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:51:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:51:34:ST3_smx:INFO: Electrons
13:51:34:ST3_smx:INFO: # loops 0
13:51:36:ST3_smx:INFO: # loops 1
13:51:38:ST3_smx:INFO: # loops 2
13:51:40:ST3_smx:INFO: Total # of broken channels: 0
13:51:40:ST3_smx:INFO: List of broken channels: []
13:51:40:ST3_smx:INFO: Total # of broken channels: 0
13:51:40:ST3_smx:INFO: List of broken channels: []
13:51:41:ST3_smx:INFO: chip: 28-3 53.612520 C 1135.937260 mV
13:51:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:51:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:51:41:ST3_smx:INFO: Electrons
13:51:41:ST3_smx:INFO: # loops 0
13:51:43:ST3_smx:INFO: # loops 1
13:51:44:ST3_smx:INFO: # loops 2
13:51:46:ST3_smx:INFO: Total # of broken channels: 0
13:51:46:ST3_smx:INFO: List of broken channels: []
13:51:46:ST3_smx:INFO: Total # of broken channels: 0
13:51:46:ST3_smx:INFO: List of broken channels: []
13:51:48:ST3_smx:INFO: chip: 26-5 40.898880 C 1171.483840 mV
13:51:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:51:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:51:48:ST3_smx:INFO: Electrons
13:51:48:ST3_smx:INFO: # loops 0
13:51:49:ST3_smx:INFO: # loops 1
13:51:51:ST3_smx:INFO: # loops 2
13:51:52:ST3_smx:INFO: Total # of broken channels: 0
13:51:52:ST3_smx:INFO: List of broken channels: []
13:51:52:ST3_smx:INFO: Total # of broken channels: 0
13:51:52:ST3_smx:INFO: List of broken channels: []
13:51:54:ST3_smx:INFO: chip: 24-7 47.250730 C 1159.654860 mV
13:51:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:51:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:51:54:ST3_smx:INFO: Electrons
13:51:54:ST3_smx:INFO: # loops 0
13:51:55:ST3_smx:INFO: # loops 1
13:51:57:ST3_smx:INFO: # loops 2
13:51:58:ST3_smx:INFO: Total # of broken channels: 0
13:51:58:ST3_smx:INFO: List of broken channels: []
13:51:58:ST3_smx:INFO: Total # of broken channels: 0
13:51:58:ST3_smx:INFO: List of broken channels: []
13:51:59:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:51:59:febtest:INFO: 30-01 | XA-000-09-004-026-007-003-05 | 53.6 | 1159.7
13:51:59:febtest:INFO: 28-03 | XA-000-09-004-026-007-004-05 | 56.8 | 1159.7
13:51:59:febtest:INFO: 26-05 | XA-000-09-004-026-010-004-02 | 44.1 | 1195.1
13:52:00:febtest:INFO: 24-07 | XA-000-09-004-026-013-004-10 | 50.4 | 1177.4
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_11_25-13_51_12
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4306| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.8214', '1.850', '1.3100']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0330', '1.850', '1.2540']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0060', '1.850', '0.2663']