FEB_4314 28.11.25 15:23:42
Info
15:23:42:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:23:42:ST3_Shared:INFO: FEB-Microcable
15:23:42:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:23:42:febtest:INFO: Testing FEB with SN 4314
15:23:43:smx_tester:INFO: Scanning setup
15:23:43:elinks:INFO: Disabling clock on downlink 0
15:23:43:elinks:INFO: Disabling clock on downlink 1
15:23:43:elinks:INFO: Disabling clock on downlink 2
15:23:43:elinks:INFO: Disabling clock on downlink 3
15:23:43:elinks:INFO: Disabling clock on downlink 4
15:23:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:23:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:23:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:23:44:elinks:INFO: Disabling clock on downlink 0
15:23:44:elinks:INFO: Disabling clock on downlink 1
15:23:44:elinks:INFO: Disabling clock on downlink 2
15:23:44:elinks:INFO: Disabling clock on downlink 3
15:23:44:elinks:INFO: Disabling clock on downlink 4
15:23:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:23:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:23:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:23:44:elinks:INFO: Disabling clock on downlink 0
15:23:44:elinks:INFO: Disabling clock on downlink 1
15:23:44:elinks:INFO: Disabling clock on downlink 2
15:23:44:elinks:INFO: Disabling clock on downlink 3
15:23:44:elinks:INFO: Disabling clock on downlink 4
15:23:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:23:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
15:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
15:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
15:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
15:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
15:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
15:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
15:23:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
15:23:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:23:44:elinks:INFO: Disabling clock on downlink 0
15:23:44:elinks:INFO: Disabling clock on downlink 1
15:23:44:elinks:INFO: Disabling clock on downlink 2
15:23:44:elinks:INFO: Disabling clock on downlink 3
15:23:44:elinks:INFO: Disabling clock on downlink 4
15:23:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:23:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:23:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:23:44:elinks:INFO: Disabling clock on downlink 0
15:23:44:elinks:INFO: Disabling clock on downlink 1
15:23:44:elinks:INFO: Disabling clock on downlink 2
15:23:44:elinks:INFO: Disabling clock on downlink 3
15:23:44:elinks:INFO: Disabling clock on downlink 4
15:23:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:23:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:23:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:23:44:setup_element:INFO: Scanning clock phase
15:23:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:23:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:23:44:setup_element:INFO: Clock phase scan results for group 0, downlink 2
15:23:44:setup_element:INFO: Eye window for uplink 24: _________________________________________________________________XXXXXXXXXXXXXXX
Clock Delay: 32
15:23:44:setup_element:INFO: Eye window for uplink 25: _________________________________________________________________XXXXXXXXXXXXXXX
Clock Delay: 32
15:23:44:setup_element:INFO: Eye window for uplink 26: __________________________________________________________________XXX___________
Clock Delay: 27
15:23:44:setup_element:INFO: Eye window for uplink 27: __________________________________________________________________XXX___________
Clock Delay: 27
15:23:44:setup_element:INFO: Eye window for uplink 28: _________________________________________________________________XXXXXXXXXXXXXXX
Clock Delay: 32
15:23:44:setup_element:INFO: Eye window for uplink 29: _________________________________________________________________XXXXXXXXXXXXXXX
Clock Delay: 32
15:23:44:setup_element:INFO: Eye window for uplink 30: XXX______________________________________________________________XXXXXXXXXXXXXXX
Clock Delay: 33
15:23:44:setup_element:INFO: Eye window for uplink 31: XXX______________________________________________________________XXXXXXXXXXXXXXX
Clock Delay: 33
15:23:44:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
15:23:44:setup_element:INFO: Scanning data phases
15:23:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:23:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:23:49:setup_element:INFO: Data phase scan results for group 0, downlink 2
15:23:49:setup_element:INFO: Eye window for uplink 24: _____XXXXXXXX___________________________
Data delay found: 28
15:23:49:setup_element:INFO: Eye window for uplink 25: _______XXXXXXX__________________________
Data delay found: 30
15:23:49:setup_element:INFO: Eye window for uplink 26: _______XXXXXXXXX_XXXXXXXXX_____XXXXXXX__
Data delay found: 2
15:23:49:setup_element:INFO: Eye window for uplink 27: _________XXXXXXXXXXXXXXXXX_____XXXXXXX__
Data delay found: 3
15:23:49:setup_element:INFO: Eye window for uplink 28: ___________XXXXXXXX_____________________
Data delay found: 34
15:23:49:setup_element:INFO: Eye window for uplink 29: ___________XXXXXXXX_____________________
Data delay found: 34
15:23:49:setup_element:INFO: Eye window for uplink 30: __________XXXXXXXXXXX______XXXXXXXXXXXXX
Data delay found: 4
15:23:49:setup_element:INFO: Eye window for uplink 31: _________XXXXXXXXXX________XXXXXXXXXXXXX
Data delay found: 4
15:23:49:setup_element:INFO: Setting the data phase to 28 for uplink 24
15:23:49:setup_element:INFO: Setting the data phase to 30 for uplink 25
15:23:49:setup_element:INFO: Setting the data phase to 2 for uplink 26
15:23:49:setup_element:INFO: Setting the data phase to 3 for uplink 27
15:23:49:setup_element:INFO: Setting the data phase to 34 for uplink 28
15:23:49:setup_element:INFO: Setting the data phase to 34 for uplink 29
15:23:49:setup_element:INFO: Setting the data phase to 4 for uplink 30
15:23:49:setup_element:INFO: Setting the data phase to 4 for uplink 31
15:23:49:setup_element:INFO: Beginning SMX ASICs map scan
15:23:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:23:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:23:50:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:23:50:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:23:50:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
15:23:50:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
15:23:50:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
15:23:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
15:23:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
15:23:50:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
15:23:50:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
15:23:51:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
15:23:51:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
15:23:52:setup_element:INFO: Performing Elink synchronization
15:23:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:23:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:23:52:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:23:52:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:23:52:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
15:23:52:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
15:23:53:febtest:INFO: Init all SMX (CSA): 30
15:24:01:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:24:01:febtest:INFO: 30-01 | XA-000-09-004-026-010-013-02 | 40.9 | 1147.8
15:24:01:febtest:INFO: 28-03 | XA-000-09-004-026-007-013-05 | 34.6 | 1171.5
15:24:01:febtest:INFO: 26-05 | XA-000-09-004-026-004-013-11 | 21.9 | 1218.6
15:24:02:febtest:INFO: 24-07 | XA-000-09-004-026-013-014-10 | 28.2 | 1201.0
15:24:03:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
15:24:05:ST3_smx:INFO: chip: 30-1 40.898880 C 1159.654860 mV
15:24:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:24:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:24:05:ST3_smx:INFO: Electrons
15:24:05:ST3_smx:INFO: # loops 0
15:24:06:ST3_smx:INFO: # loops 1
15:24:08:ST3_smx:INFO: # loops 2
15:24:10:ST3_smx:INFO: Total # of broken channels: 0
15:24:10:ST3_smx:INFO: List of broken channels: []
15:24:10:ST3_smx:INFO: Total # of broken channels: 0
15:24:10:ST3_smx:INFO: List of broken channels: []
15:24:12:ST3_smx:INFO: chip: 28-3 37.726682 C 1183.292940 mV
15:24:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:24:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:24:12:ST3_smx:INFO: Electrons
15:24:12:ST3_smx:INFO: # loops 0
15:24:14:ST3_smx:INFO: # loops 1
15:24:16:ST3_smx:INFO: # loops 2
15:24:17:ST3_smx:INFO: Total # of broken channels: 0
15:24:17:ST3_smx:INFO: List of broken channels: []
15:24:17:ST3_smx:INFO: Total # of broken channels: 0
15:24:17:ST3_smx:INFO: List of broken channels: []
15:24:19:ST3_smx:INFO: chip: 26-5 25.062742 C 1242.040240 mV
15:24:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:24:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:24:19:ST3_smx:INFO: Electrons
15:24:19:ST3_smx:INFO: # loops 0
15:24:21:ST3_smx:INFO: # loops 1
15:24:23:ST3_smx:INFO: # loops 2
15:24:24:ST3_smx:INFO: Total # of broken channels: 0
15:24:24:ST3_smx:INFO: List of broken channels: []
15:24:24:ST3_smx:INFO: Total # of broken channels: 0
15:24:24:ST3_smx:INFO: List of broken channels: []
15:24:26:ST3_smx:INFO: chip: 24-7 31.389742 C 1212.728715 mV
15:24:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:24:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:24:26:ST3_smx:INFO: Electrons
15:24:26:ST3_smx:INFO: # loops 0
15:24:28:ST3_smx:INFO: # loops 1
15:24:30:ST3_smx:INFO: # loops 2
15:24:31:ST3_smx:INFO: Total # of broken channels: 0
15:24:31:ST3_smx:INFO: List of broken channels: []
15:24:31:ST3_smx:INFO: Total # of broken channels: 0
15:24:31:ST3_smx:INFO: List of broken channels: []
15:24:32:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:24:32:febtest:INFO: 30-01 | XA-000-09-004-026-010-013-02 | 44.1 | 1183.3
15:24:32:febtest:INFO: 28-03 | XA-000-09-004-026-007-013-05 | 37.7 | 1206.9
15:24:32:febtest:INFO: 26-05 | XA-000-09-004-026-004-013-11 | 25.1 | 1323.5
15:24:33:febtest:INFO: 24-07 | XA-000-09-004-026-013-014-10 | 34.6 | 1236.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_11_28-15_23_42
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4314| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.8703', '1.850', '0.9810']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0310', '1.850', '1.2770']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9911', '1.850', '0.2608']