FEB_5008    01.12.23 08:20:58

TextEdit.txt
            08:20:58:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:20:58:ST3_Shared:INFO:	--------------------------FEB-ASIC--------------------------
08:20:58:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:20:59:febtest:INFO:	Testing FEB with SN 5008
08:21:00:smx_tester:INFO:	Scanning setup
08:21:00:elinks:INFO:	Disabling clock on downlink 0
08:21:00:elinks:INFO:	Disabling clock on downlink 1
08:21:00:elinks:INFO:	Disabling clock on downlink 2
08:21:00:elinks:INFO:	Disabling clock on downlink 3
08:21:00:elinks:INFO:	Disabling clock on downlink 4
08:21:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:21:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
08:21:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:21:00:elinks:INFO:	Disabling clock on downlink 0
08:21:00:elinks:INFO:	Disabling clock on downlink 1
08:21:00:elinks:INFO:	Disabling clock on downlink 2
08:21:00:elinks:INFO:	Disabling clock on downlink 3
08:21:00:elinks:INFO:	Disabling clock on downlink 4
08:21:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:21:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:21:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:21:00:elinks:INFO:	Disabling clock on downlink 0
08:21:00:elinks:INFO:	Disabling clock on downlink 1
08:21:00:elinks:INFO:	Disabling clock on downlink 2
08:21:00:elinks:INFO:	Disabling clock on downlink 3
08:21:00:elinks:INFO:	Disabling clock on downlink 4
08:21:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:21:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:21:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 8
08:21:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 9
08:21:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 10
08:21:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 11
08:21:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 12
08:21:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 13
08:21:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
08:21:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
08:21:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
08:21:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
08:21:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
08:21:01:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
08:21:01:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
08:21:01:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
08:21:01:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
08:21:01:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
08:21:01:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
08:21:01:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
08:21:01:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
08:21:01:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
08:21:01:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:21:01:elinks:INFO:	Disabling clock on downlink 0
08:21:01:elinks:INFO:	Disabling clock on downlink 1
08:21:01:elinks:INFO:	Disabling clock on downlink 2
08:21:01:elinks:INFO:	Disabling clock on downlink 3
08:21:01:elinks:INFO:	Disabling clock on downlink 4
08:21:01:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:21:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
08:21:01:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:21:01:elinks:INFO:	Disabling clock on downlink 0
08:21:01:elinks:INFO:	Disabling clock on downlink 1
08:21:01:elinks:INFO:	Disabling clock on downlink 2
08:21:01:elinks:INFO:	Disabling clock on downlink 3
08:21:01:elinks:INFO:	Disabling clock on downlink 4
08:21:01:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:21:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
08:21:01:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:21:01:setup_element:INFO:	Scanning clock phase
08:21:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:21:01:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:21:01:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
08:21:01:setup_element:INFO:	Eye window for uplink 8 : _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
08:21:01:setup_element:INFO:	Eye window for uplink 9 : _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
08:21:01:setup_element:INFO:	Eye window for uplink 10: _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
08:21:01:setup_element:INFO:	Eye window for uplink 11: _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
08:21:01:setup_element:INFO:	Eye window for uplink 12: _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
08:21:01:setup_element:INFO:	Eye window for uplink 13: _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
08:21:01:setup_element:INFO:	Eye window for uplink 16: ______________________________________________________________XXXXXXXXXXXX______
Clock Delay: 27
08:21:01:setup_element:INFO:	Eye window for uplink 17: _______________________________________________________________XXXXXXXXXXXX_____
Clock Delay: 28
08:21:01:setup_element:INFO:	Eye window for uplink 18: ______________________________________________________________XXXXXXXXXXXX______
Clock Delay: 27
08:21:01:setup_element:INFO:	Eye window for uplink 19: _______________________________________________________________XXXXXXXXXXXX_____
Clock Delay: 28
08:21:01:setup_element:INFO:	Eye window for uplink 20: _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
08:21:01:setup_element:INFO:	Eye window for uplink 21: _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
08:21:01:setup_element:INFO:	Eye window for uplink 22: _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
08:21:01:setup_element:INFO:	Eye window for uplink 23: _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
08:21:01:setup_element:INFO:	Eye window for uplink 26: ______________________________________________________________XXXXXXXXXXXX______
Clock Delay: 27
08:21:01:setup_element:INFO:	Eye window for uplink 27: _______________________________________________________________XXXXXXXXXXXX_____
Clock Delay: 28
08:21:01:setup_element:INFO:	Eye window for uplink 28: ______________________________________________________________XXXXXXXXXXXX______
Clock Delay: 27
08:21:01:setup_element:INFO:	Eye window for uplink 29: _______________________________________________________________XXXXXXXXXXXX_____
Clock Delay: 28
08:21:01:setup_element:INFO:	Eye window for uplink 30: ______________________________________________________________XXXXXXXXXXXX______
Clock Delay: 27
08:21:01:setup_element:INFO:	Eye window for uplink 31: _______________________________________________________________XXXXXXXXXXXX_____
Clock Delay: 28
08:21:01:setup_element:INFO:	Setting the clock phase to 28 for group 0, downlink 2
08:21:01:setup_element:INFO:	Scanning data phases
08:21:01:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:21:01:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:21:06:setup_element:INFO:	Data phase scan results for group 0, downlink 2
08:21:06:setup_element:INFO:	Eye window for uplink 8 : _________________________________XXXXX__
Data delay found: 15
08:21:06:setup_element:INFO:	Eye window for uplink 9 : X__________________________________XXXXX
Data delay found: 17
08:21:06:setup_element:INFO:	Eye window for uplink 10: _______________________________XXXXXX___
Data delay found: 13
08:21:06:setup_element:INFO:	Eye window for uplink 11: __________________________________XXXXXX
Data delay found: 16
08:21:06:setup_element:INFO:	Eye window for uplink 12: _________________________________XXXXXX_
Data delay found: 15
08:21:06:setup_element:INFO:	Eye window for uplink 13: __________________________________XXXX__
Data delay found: 15
08:21:06:setup_element:INFO:	Eye window for uplink 16: XXXX___________________________________X
Data delay found: 21
08:21:06:setup_element:INFO:	Eye window for uplink 17: XXXXX_________________________________XX
Data delay found: 21
08:21:06:setup_element:INFO:	Eye window for uplink 18: XXXX__________________________________XX
Data delay found: 20
08:21:06:setup_element:INFO:	Eye window for uplink 19: XXX__________________________________XXX
Data delay found: 19
08:21:06:setup_element:INFO:	Eye window for uplink 20: XXX___________________________________XX
Data delay found: 20
08:21:06:setup_element:INFO:	Eye window for uplink 21: XXX___________________________________XX
Data delay found: 20
08:21:06:setup_element:INFO:	Eye window for uplink 22: XXXXX__________________________________X
Data delay found: 21
08:21:06:setup_element:INFO:	Eye window for uplink 23: XXX_________________________________XXXX
Data delay found: 19
08:21:06:setup_element:INFO:	Eye window for uplink 26: X___________________________________XXXX
Data delay found: 18
08:21:06:setup_element:INFO:	Eye window for uplink 27: XXXXX_________________________________XX
Data delay found: 21
08:21:06:setup_element:INFO:	Eye window for uplink 28: XXX__________________________________XXX
Data delay found: 19
08:21:06:setup_element:INFO:	Eye window for uplink 29: XXXXX_________________________________XX
Data delay found: 21
08:21:07:setup_element:INFO:	Eye window for uplink 30: _XXXXX_________________________________X
Data delay found: 22
08:21:07:setup_element:INFO:	Eye window for uplink 31: _XXXXX_________________________________X
Data delay found: 22
08:21:07:setup_element:INFO:	Setting the data phase to 15 for uplink 8
08:21:07:setup_element:INFO:	Setting the data phase to 17 for uplink 9
08:21:07:setup_element:INFO:	Setting the data phase to 13 for uplink 10
08:21:07:setup_element:INFO:	Setting the data phase to 16 for uplink 11
08:21:07:setup_element:INFO:	Setting the data phase to 15 for uplink 12
08:21:07:setup_element:INFO:	Setting the data phase to 15 for uplink 13
08:21:07:setup_element:INFO:	Setting the data phase to 21 for uplink 16
08:21:07:setup_element:INFO:	Setting the data phase to 21 for uplink 17
08:21:07:setup_element:INFO:	Setting the data phase to 20 for uplink 18
08:21:07:setup_element:INFO:	Setting the data phase to 19 for uplink 19
08:21:07:setup_element:INFO:	Setting the data phase to 20 for uplink 20
08:21:07:setup_element:INFO:	Setting the data phase to 20 for uplink 21
08:21:07:setup_element:INFO:	Setting the data phase to 21 for uplink 22
08:21:07:setup_element:INFO:	Setting the data phase to 19 for uplink 23
08:21:07:setup_element:INFO:	Setting the data phase to 18 for uplink 26
08:21:07:setup_element:INFO:	Setting the data phase to 21 for uplink 27
08:21:07:setup_element:INFO:	Setting the data phase to 19 for uplink 28
08:21:07:setup_element:INFO:	Setting the data phase to 21 for uplink 29
08:21:07:setup_element:INFO:	Setting the data phase to 22 for uplink 30
08:21:07:setup_element:INFO:	Setting the data phase to 22 for uplink 31
08:21:07:ST3_emu:ERROR:	[
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [8, 9, 10, 11, 12, 13, 16, 17, 18, 19, 20, 21, 22, 23, 26, 27, 28, 29, 30, 31]
  ASICs Map: None
  Clock Phase Characteristic:
    Optimal Phase: 28
    Window Length: 67
    Eye Windows:
      Uplink  8: _______________________________________________________________XXXXXXXXXXX______
      Uplink  9: _______________________________________________________________XXXXXXXXXXX______
      Uplink 10: _______________________________________________________________XXXXXXXXXXX______
      Uplink 11: _______________________________________________________________XXXXXXXXXXX______
      Uplink 12: _______________________________________________________________XXXXXXXXXXX______
      Uplink 13: _______________________________________________________________XXXXXXXXXXX______
      Uplink 16: ______________________________________________________________XXXXXXXXXXXX______
      Uplink 17: _______________________________________________________________XXXXXXXXXXXX_____
      Uplink 18: ______________________________________________________________XXXXXXXXXXXX______
      Uplink 19: _______________________________________________________________XXXXXXXXXXXX_____
      Uplink 20: _______________________________________________________________XXXXXXXXXXX______
      Uplink 21: _______________________________________________________________XXXXXXXXXXX______
      Uplink 22: _______________________________________________________________XXXXXXXXXXX______
      Uplink 23: _______________________________________________________________XXXXXXXXXXX______
      Uplink 26: ______________________________________________________________XXXXXXXXXXXX______
      Uplink 27: _______________________________________________________________XXXXXXXXXXXX_____
      Uplink 28: ______________________________________________________________XXXXXXXXXXXX______
      Uplink 29: _______________________________________________________________XXXXXXXXXXXX_____
      Uplink 30: ______________________________________________________________XXXXXXXXXXXX______
      Uplink 31: _______________________________________________________________XXXXXXXXXXXX_____
  Data phase characteristics:
    Uplink 8:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 9:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 10:
      Optimal Phase: 13
      Window Length: 34
      Eye Window: _______________________________XXXXXX___
    Uplink 11:
      Optimal Phase: 16
      Window Length: 34
      Eye Window: __________________________________XXXXXX
    Uplink 12:
      Optimal Phase: 15
      Window Length: 34
      Eye Window: _________________________________XXXXXX_
    Uplink 13:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 16:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 17:
      Optimal Phase: 21
      Window Length: 33
      Eye Window: XXXXX_________________________________XX
    Uplink 18:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 19:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 20:
      Optimal Phase: 20
      Window Length: 35
      Eye Window: XXX___________________________________XX
    Uplink 21:
      Optimal Phase: 20
      Window Length: 35
      Eye Window: XXX___________________________________XX
    Uplink 22:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 23:
      Optimal Phase: 19
      Window Length: 33
      Eye Window: XXX_________________________________XXXX
    Uplink 26:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 27:
      Optimal Phase: 21
      Window Length: 33
      Eye Window: XXXXX_________________________________XX
    Uplink 28:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 29:
      Optimal Phase: 21
      Window Length: 33
      Eye Window: XXXXX_________________________________XX
    Uplink 30:
      Optimal Phase: 22
      Window Length: 33
      Eye Window: _XXXXX_________________________________X
    Uplink 31:
      Optimal Phase: 22
      Window Length: 33
      Eye Window: _XXXXX_________________________________X
]
08:21:07:setup_element:INFO:	Beginning SMX ASICs map scan
08:21:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:21:07:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:21:07:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
08:21:07:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
08:21:07:uplink:INFO:	Setting uplinks mask [8, 9, 10, 11, 12, 13, 16, 17, 18, 19, 20, 21, 22, 23, 26, 27, 28, 29, 30, 31]
08:21:07:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 11
08:21:07:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 13
08:21:07:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 2, uplink 21
08:21:07:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 3, uplink 23
08:21:07:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 4, uplink 9
08:21:07:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:21:07:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 26
08:21:07:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 2, uplink 18
08:21:07:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 3, uplink 16
08:21:07:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 4, uplink 30
08:21:08:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 10
08:21:08:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 12
08:21:08:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 2, uplink 20
08:21:08:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 3, uplink 22
08:21:08:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 4, uplink 8
08:21:08:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 29
08:21:08:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 27
08:21:08:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 2, uplink 19
08:21:08:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 3, uplink 17
08:21:08:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 4, uplink 31
08:21:09:ST3_emu:ERROR:	
Setup Element:
  Group: 0
  Downlink: 2
  Uplinks: [8, 9, 10, 11, 12, 13, 16, 17, 18, 19, 20, 21, 22, 23, 26, 27, 28, 29, 30, 31]
  ASICs Map:
    ASIC address 0x1: (ASIC uplink, uplink): (0, 11), (1, 13), (2, 21), (3, 23), (4, 9)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 28), (1, 26), (2, 18), (3, 16), (4, 30)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 10), (1, 12), (2, 20), (3, 22), (4, 8)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 29), (1, 27), (2, 19), (3, 17), (4, 31)
  Clock Phase Characteristic:
    Optimal Phase: 28
    Window Length: 67
    Eye Windows:
      Uplink  8: _______________________________________________________________XXXXXXXXXXX______
      Uplink  9: _______________________________________________________________XXXXXXXXXXX______
      Uplink 10: _______________________________________________________________XXXXXXXXXXX______
      Uplink 11: _______________________________________________________________XXXXXXXXXXX______
      Uplink 12: _______________________________________________________________XXXXXXXXXXX______
      Uplink 13: _______________________________________________________________XXXXXXXXXXX______
      Uplink 16: ______________________________________________________________XXXXXXXXXXXX______
      Uplink 17: _______________________________________________________________XXXXXXXXXXXX_____
      Uplink 18: ______________________________________________________________XXXXXXXXXXXX______
      Uplink 19: _______________________________________________________________XXXXXXXXXXXX_____
      Uplink 20: _______________________________________________________________XXXXXXXXXXX______
      Uplink 21: _______________________________________________________________XXXXXXXXXXX______
      Uplink 22: _______________________________________________________________XXXXXXXXXXX______
      Uplink 23: _______________________________________________________________XXXXXXXXXXX______
      Uplink 26: ______________________________________________________________XXXXXXXXXXXX______
      Uplink 27: _______________________________________________________________XXXXXXXXXXXX_____
      Uplink 28: ______________________________________________________________XXXXXXXXXXXX______
      Uplink 29: _______________________________________________________________XXXXXXXXXXXX_____
      Uplink 30: ______________________________________________________________XXXXXXXXXXXX______
      Uplink 31: _______________________________________________________________XXXXXXXXXXXX_____
  Data phase characteristics:
    Uplink 8:
      Optimal Phase: 15
      Window Length: 35
      Eye Window: _________________________________XXXXX__
    Uplink 9:
      Optimal Phase: 17
      Window Length: 34
      Eye Window: X__________________________________XXXXX
    Uplink 10:
      Optimal Phase: 13
      Window Length: 34
      Eye Window: _______________________________XXXXXX___
    Uplink 11:
      Optimal Phase: 16
      Window Length: 34
      Eye Window: __________________________________XXXXXX
    Uplink 12:
      Optimal Phase: 15
      Window Length: 34
      Eye Window: _________________________________XXXXXX_
    Uplink 13:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__
    Uplink 16:
      Optimal Phase: 21
      Window Length: 35
      Eye Window: XXXX___________________________________X
    Uplink 17:
      Optimal Phase: 21
      Window Length: 33
      Eye Window: XXXXX_________________________________XX
    Uplink 18:
      Optimal Phase: 20
      Window Length: 34
      Eye Window: XXXX__________________________________XX
    Uplink 19:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 20:
      Optimal Phase: 20
      Window Length: 35
      Eye Window: XXX___________________________________XX
    Uplink 21:
      Optimal Phase: 20
      Window Length: 35
      Eye Window: XXX___________________________________XX
    Uplink 22:
      Optimal Phase: 21
      Window Length: 34
      Eye Window: XXXXX__________________________________X
    Uplink 23:
      Optimal Phase: 19
      Window Length: 33
      Eye Window: XXX_________________________________XXXX
    Uplink 26:
      Optimal Phase: 18
      Window Length: 35
      Eye Window: X___________________________________XXXX
    Uplink 27:
      Optimal Phase: 21
      Window Length: 33
      Eye Window: XXXXX_________________________________XX
    Uplink 28:
      Optimal Phase: 19
      Window Length: 34
      Eye Window: XXX__________________________________XXX
    Uplink 29:
      Optimal Phase: 21
      Window Length: 33
      Eye Window: XXXXX_________________________________XX
    Uplink 30:
      Optimal Phase: 22
      Window Length: 33
      Eye Window: _XXXXX_________________________________X
    Uplink 31:
      Optimal Phase: 22
      Window Length: 33
      Eye Window: _XXXXX_________________________________X

08:21:09:setup_element:INFO:	Performing Elink synchronization
08:21:09:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:21:09:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:21:09:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
08:21:09:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
08:21:09:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
08:21:09:uplink:INFO:	Enabling uplinks [8, 9, 10, 11, 12, 13, 16, 17, 18, 19, 20, 21, 22, 23, 26, 27, 28, 29, 30, 31]
08:21:09:ST3_emu:INFO:	Number of chips: 4
addr  |  upli  |  dwnli  |  grp |  uplinks | uplinks_map
   1  |   [0]   |  2  |  0  |     [11]     |  [(0, 11), (1, 13), (2, 21), (3, 23), (4, 9)]
   3  |   [0]   |  2  |  0  |     [28]     |  [(0, 28), (1, 26), (2, 18), (3, 16), (4, 30)]
   5  |   [0]   |  2  |  0  |     [10]     |  [(0, 10), (1, 12), (2, 20), (3, 22), (4, 8)]
   7  |   [0]   |  2  |  0  |     [29]     |  [(0, 29), (1, 27), (2, 19), (3, 17), (4, 31)]
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_1_11 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_1_11 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_1_11 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_1_11 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_1_11 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_1_11 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_1_11 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_1_11 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_1_11 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_1_11 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_1_11 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_1_11 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_1__upli_11
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_3_28 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_3_28 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_3__upli_28
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_5_10 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_5_10 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_5__upli_10
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_h_7_29 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_h_7_29 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_h_7_29 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_h_7_29 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_h_7_29 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_h_7_29 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_front_e_7_29 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: h2D_back_e_7_29 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_fastD_e_7_29 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_front_e_7_29 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hDist_back_e_7_29 (Potential memory leak).
TROOT::Append:0: RuntimeWarning: Replacing existing TH1: hBroken_e_7_29 (Potential memory leak).
TCanvas::Constructor:0: RuntimeWarning: Deleting canvas with same name: cDist_FEB_A__addr_7__upli_29
08:21:10:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
08:21:11:febtest:INFO:	11-1 | XA-000-08-001-064-042-016-14 |  31.4 | 1212.7
08:21:11:febtest:INFO:	28-3 | XA-000-08-001-064-042-008-09 |  31.4 | 1206.9
08:21:11:febtest:INFO:	10-5 | XA-000-08-001-064-042-216-01 |  50.4 | 1135.9
08:21:11:febtest:INFO:	29-7 | XA-000-08-001-064-042-048-00 |  47.3 | 1153.7
08:21:11:ST3_smx:INFO:	Configuring SMX FAST
08:21:13:ST3_smx:INFO:	chip: 11-1 	 34.556970 C 	 1195.082160 mV
08:21:13:ST3_smx:INFO:		Electrons
08:21:13:ST3_smx:INFO:			Injected pulses: 110LSB, amp_cal 6.160000 fC
08:21:15:ST3_smx:INFO:	----> Checking Analog response
08:21:15:ST3_smx:INFO:	----> Checking broken channels
08:21:16:ST3_smx:INFO:	Total # broken ch: 7
08:21:16:ST3_smx:INFO:	List FAST: [10, 11, 16, 33, 98, 107, 118]
08:21:16:ST3_smx:INFO:	List SLOW: []
08:21:16:ST3_smx:INFO:		Holes
08:21:16:ST3_smx:INFO:			Injected pulses: 110LSB, amp_cal 6.160000 fC
08:21:18:ST3_smx:INFO:	----> Checking Analog response
08:21:18:ST3_smx:INFO:	----> Checking broken channels
08:21:18:ST3_smx:INFO:	Total # broken ch: 7
08:21:18:ST3_smx:INFO:	List FAST: [10, 11, 16, 33, 98, 107, 118]
08:21:18:ST3_smx:INFO:	List SLOW: []
08:21:18:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
08:21:18:febtest:INFO:	11-1 | XA-000-08-001-064-042-016-14 |  34.6 | 1189.2
08:21:19:febtest:INFO:	28-3 | XA-000-08-001-064-042-008-09 |  31.4 | 1206.9
08:21:19:febtest:INFO:	10-5 | XA-000-08-001-064-042-216-01 |  47.3 | 1135.9
08:21:19:febtest:INFO:	29-7 | XA-000-08-001-064-042-048-00 |  44.1 | 1153.7
08:21:20:ST3_smx:INFO:	Configuring SMX FAST
08:21:22:ST3_smx:INFO:	chip: 28-3 	 40.898880 C 	 1165.571835 mV
08:21:22:ST3_smx:INFO:		Electrons
08:21:22:ST3_smx:INFO:			Injected pulses: 110LSB, amp_cal 6.160000 fC
08:21:24:ST3_smx:INFO:	----> Checking Analog response
08:21:24:ST3_smx:INFO:	----> Checking broken channels
08:21:24:ST3_smx:INFO:	Total # broken ch: 2
08:21:24:ST3_smx:INFO:	List FAST: [4, 113]
08:21:24:ST3_smx:INFO:	List SLOW: []
08:21:24:ST3_smx:INFO:		Holes
08:21:24:ST3_smx:INFO:			Injected pulses: 110LSB, amp_cal 6.160000 fC
08:21:26:ST3_smx:INFO:	----> Checking Analog response
08:21:26:ST3_smx:INFO:	----> Checking broken channels
08:21:26:ST3_smx:INFO:	Total # broken ch: 2
08:21:26:ST3_smx:INFO:	List FAST: [4, 113]
08:21:26:ST3_smx:INFO:	List SLOW: []
08:21:26:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
08:21:26:febtest:INFO:	11-1 | XA-000-08-001-064-042-016-14 |  34.6 | 1195.1
08:21:27:febtest:INFO:	28-3 | XA-000-08-001-064-042-008-09 |  44.1 | 1165.6
08:21:27:febtest:INFO:	10-5 | XA-000-08-001-064-042-216-01 |  47.3 | 1135.9
08:21:27:febtest:INFO:	29-7 | XA-000-08-001-064-042-048-00 |  44.1 | 1153.7
08:21:28:ST3_smx:INFO:	Configuring SMX FAST
08:21:30:ST3_smx:INFO:	chip: 10-5 	 40.898880 C 	 1165.571835 mV
08:21:30:ST3_smx:INFO:		Electrons
08:21:30:ST3_smx:INFO:			Injected pulses: 110LSB, amp_cal 6.160000 fC
08:21:32:ST3_smx:INFO:	----> Checking Analog response
08:21:32:ST3_smx:INFO:	----> Checking broken channels
08:21:32:ST3_smx:INFO:	Total # broken ch: 3
08:21:32:ST3_smx:INFO:	List FAST: [18, 47, 123]
08:21:32:ST3_smx:INFO:	List SLOW: []
08:21:32:ST3_smx:INFO:		Holes
08:21:32:ST3_smx:INFO:			Injected pulses: 110LSB, amp_cal 6.160000 fC
08:21:34:ST3_smx:INFO:	----> Checking Analog response
08:21:34:ST3_smx:INFO:	----> Checking broken channels
08:21:35:ST3_smx:INFO:	Total # broken ch: 3
08:21:35:ST3_smx:INFO:	List FAST: [18, 47, 123]
08:21:35:ST3_smx:INFO:	List SLOW: []
08:21:35:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
08:21:35:febtest:INFO:	11-1 | XA-000-08-001-064-042-016-14 |  34.6 | 1195.1
08:21:35:febtest:INFO:	28-3 | XA-000-08-001-064-042-008-09 |  44.1 | 1165.6
08:21:35:febtest:INFO:	10-5 | XA-000-08-001-064-042-216-01 |  44.1 | 1159.7
08:21:36:febtest:INFO:	29-7 | XA-000-08-001-064-042-048-00 |  44.1 | 1153.7
08:21:36:ST3_smx:INFO:	Configuring SMX FAST
08:21:38:ST3_smx:INFO:	chip: 29-7 	 44.073563 C 	 1159.654860 mV
08:21:38:ST3_smx:INFO:		Electrons
08:21:38:ST3_smx:INFO:			Injected pulses: 110LSB, amp_cal 6.160000 fC
08:21:40:ST3_smx:INFO:	----> Checking Analog response
08:21:40:ST3_smx:INFO:	----> Checking broken channels
08:21:40:ST3_smx:INFO:	Total # broken ch: 3
08:21:40:ST3_smx:INFO:	List FAST: [2, 21, 96]
08:21:40:ST3_smx:INFO:	List SLOW: []
08:21:40:ST3_smx:INFO:		Holes
08:21:40:ST3_smx:INFO:			Injected pulses: 110LSB, amp_cal 6.160000 fC
08:21:42:ST3_smx:INFO:	----> Checking Analog response
08:21:42:ST3_smx:INFO:	----> Checking broken channels
08:21:43:ST3_smx:INFO:	Total # broken ch: 3
08:21:43:ST3_smx:INFO:	List FAST: [2, 21, 96]
08:21:43:ST3_smx:INFO:	List SLOW: []
08:21:43:febtest:INFO:	 Add. | ASIC-ID                      | T [C] | Vddm [mV]
08:21:43:febtest:INFO:	11-1 | XA-000-08-001-064-042-016-14 |  34.6 | 1195.1
08:21:43:febtest:INFO:	28-3 | XA-000-08-001-064-042-008-09 |  44.1 | 1165.6
08:21:43:febtest:INFO:	10-5 | XA-000-08-001-064-042-216-01 |  44.1 | 1159.7
08:21:44:febtest:INFO:	29-7 | XA-000-08-001-064-042-048-00 |  44.1 | 1153.7
############################################################
#                   S U M M A R Y                          #
############################################################
{'TEST_NAME': 'FEB-ASIC', 'TEST_DATE': '2023_12_01-08_20_58', 'OPERATOR': 'Henrik; Benjamin; ', 'PROJECT': 'KIT', 'SITE': 'KIT', 'SETUP': 'KIT_TEST_SETUP_1', 'ASIC_ID': 'XA-000-08-001-064-042-048-00', 'FUSED_ID': 6359364698915382016, 'HW_ADDR': 7, 'UPLINK': 29, 'VERS_NO': '', 'CABLE_SET_ID': '', 'IC_TEMP': '0', 'VDDM': '0', 'AUX': '0', 'CSABIAS': '0', 'VDDM_INT': '0', 'ADC_Chi2': 0.0, 'ADC_NDF': 0, 'ADC_P0': 0.0, 'ADC_P1': 0.006824, 'ADC_P2': -2.485e-06, 'ADC_P0err': 0.001, 'ADC_P1err': 0.001, 'ADC_P2err': 1e-05, 'ADC_VREF_P': 58, 'ADC_VREF_N': 30, 'ADC_VREF_T': 128, 'ADC_VREF_TR': 122, 'THR2_GLB': 30, 'LOOP__PLS': 100, 'CALIB_PLS': 250, 'SnsLoop': 5, 'IFED': 31, 'CSA_BIAS': 15, 'CSA_Chi2': 0.0, 'CSA_NDF': 0, 'CSA_P0': 0.0, 'CSA_P1': 0.0, 'CSA_P2': 0.0, 'CSA_P0err': 0.0, 'CSA_P1err': 0.0, 'CSA_P2err': 0.0, 'CONF_FAIL_REG': 0, 'N_BROKEN_DISC': 3, 'N_BROKEN_FAST': '[2, 21, 96]', 'N_BROKEN_SLOW': '[]', 'P_BROKEN_DISC': 3, 'P_BROKEN_FAST': '[2, 21, 96]', 'P_BROKEN_SLOW': '[]', 'ASIC_QA_category': '', 'N_BROKEN_CABLE': 0, 'LIST_OF_BROKEN_CABLES': 0, 'FEB_SN': '5008', 'FEB_TYPE': 8.5, 'FEB_UPLINKS': 5, 'FEB_A': 1, 'FEB_B': 0, 'ADDR_0': '', 'ADDR_1': '', 'ADDR_2': '', 'ADDR_3': '', 'ADDR_4': '', 'ADDR_5': '', 'ADDR_6': '', 'ADDR_7': '', 'SENSOR_ID': '', 'MODULE_NAME': '', 'MODULE_LADDER': '', 'MODULE_MODULE': '', 'MODULE_SIZE': '', 'MODULE_GRADE': '', 'MODULE_TYPE': '', 'VI_bInit': ['2.800', '1.0680', '2.203', '1.3170', '0.000', '0.0000', '7.000', '1.6040'], 'VI_aInit': ['0', '0', '0', '0', '0', '0'], 'VI_atEnd': ['0', '0', '0', '0', '0', '0'], 'AMP_CAL': 110, 'PlsLoop': 5, 'N_ANA_PRESENT': 'Analog response OK', 'N_DISC_FAIL_CH': 0, 'N_ANA_FAIL_CH': '0', 'P_ANA_PRESENT': 'Analog response OK', 'P_DISC_FAIL_CH': 0, 'P_ANA_FAIL_CH': '0'}
===============================

{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-ASIC
TEST_DATE : 2023_12_01-08_20_58
OPERATOR  : Henrik; Benjamin; 
SITE      : KIT
SETUP     : KIT_TEST_SETUP_1
Set-ID    : 
---------------------------------------
MODULE_NAME : 
FEB_SN : 5008
FEB_TYPE : 8.5
FEB_UPLINKS : 5
FEB_A : 1
FEB_B : 0
---------------------------------------
MODULE_NAME
---------------------------------------
VI_before_Init : ['2.800', '1.0680', '2.203', '1.3170', '0.000', '0.0000', '7.000', '1.6040']
VI_after__Init : ['2.800', '1.0180', '2.200', '0.1679', '0.000', '0.0000', '7.000', '1.5950']
VI_at__the_End : ['2.800', '1.0180', '2.200', '0.1679', '0.000', '0.0000', '7.000', '1.5950']
08:21:56:ST3_Shared:INFO:	/home/cbm/public_html/KIT_LogDir//FEB/FEB_5008/TestDate_2023_12_01-08_20_58/