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FEB_6019 23.11.23 14:46:35
Info
14:46:24:ST3_hmp4040:INFO: ROHDE&SCHWARZ,HMP4040,110099,HW50020003/SW2.72
14:46:24:febtest:INFO: FEB8.2 selected
14:46:25:smx_tester:INFO: Setting Elink clock mode to 160 MHz
14:46:32:febtest:INFO: FEB8.5 selected
14:46:32:smx_tester:INFO: Setting Elink clock mode to 160 MHz
14:46:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:46:35:ST3_Shared:INFO: --------------------------FEB-ASIC--------------------------
14:46:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:46:35:febtest:INFO: Tsting FEB with SN 6019
14:46:37:smx_tester:INFO: Scanning setup
14:46:37:elinks:INFO: Disabling clock on downlink 0
14:46:37:elinks:INFO: Disabling clock on downlink 1
14:46:37:elinks:INFO: Disabling clock on downlink 2
14:46:37:elinks:INFO: Disabling clock on downlink 3
14:46:37:elinks:INFO: Disabling clock on downlink 4
14:46:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:46:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:46:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:46:37:elinks:INFO: Disabling clock on downlink 0
14:46:37:elinks:INFO: Disabling clock on downlink 1
14:46:37:elinks:INFO: Disabling clock on downlink 2
14:46:37:elinks:INFO: Disabling clock on downlink 3
14:46:37:elinks:INFO: Disabling clock on downlink 4
14:46:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:46:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:46:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:46:37:elinks:INFO: Disabling clock on downlink 0
14:46:37:elinks:INFO: Disabling clock on downlink 1
14:46:37:elinks:INFO: Disabling clock on downlink 2
14:46:37:elinks:INFO: Disabling clock on downlink 3
14:46:37:elinks:INFO: Disabling clock on downlink 4
14:46:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:46:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 0
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 1
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 2
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 3
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 4
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 5
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 6
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 7
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 8
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 9
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 10
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 11
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 12
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 13
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 14
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 15
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 32
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 33
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 34
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 35
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 36
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 37
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 38
14:46:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 39
14:46:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:46:37:elinks:INFO: Disabling clock on downlink 0
14:46:37:elinks:INFO: Disabling clock on downlink 1
14:46:37:elinks:INFO: Disabling clock on downlink 2
14:46:37:elinks:INFO: Disabling clock on downlink 3
14:46:37:elinks:INFO: Disabling clock on downlink 4
14:46:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:46:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:46:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:46:38:elinks:INFO: Disabling clock on downlink 0
14:46:38:elinks:INFO: Disabling clock on downlink 1
14:46:38:elinks:INFO: Disabling clock on downlink 2
14:46:38:elinks:INFO: Disabling clock on downlink 3
14:46:38:elinks:INFO: Disabling clock on downlink 4
14:46:38:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:46:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:46:38:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:46:38:setup_element:INFO: Scanning clock phase
14:46:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:46:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:46:38:setup_element:INFO: Clock phase scan results for group 0, downlink 2
14:46:38:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
14:46:38:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
14:46:38:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
14:46:38:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
14:46:38:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
14:46:38:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
14:46:38:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
14:46:38:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
14:46:38:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________XXXXXXXXXXX_____
Clock Delay: 29
14:46:38:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________XXXXXXXXXXXX______
Clock Delay: 27
14:46:38:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________XXXXXXXXXXX_____
Clock Delay: 29
14:46:38:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________XXXXXXXXXXXX______
Clock Delay: 27
14:46:38:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________XXXXXXXXXXX_____
Clock Delay: 29
14:46:38:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________XXXXXXXXXXXX______
Clock Delay: 27
14:46:38:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
14:46:38:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
14:46:38:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________XXXXXXXXXXXX_____
Clock Delay: 28
14:46:38:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________XXXXXXXXXX______
Clock Delay: 28
14:46:38:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________XXXXXXXXXXXX_____
Clock Delay: 28
14:46:38:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________XXXXXXXXXX______
Clock Delay: 28
14:46:38:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________XXXXXXXXXXX_____
Clock Delay: 29
14:46:38:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________XXXXXXXXXXXX______
Clock Delay: 27
14:46:38:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________XXXXXXXXXXX_____
Clock Delay: 29
14:46:38:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________XXXXXXXXXXXX______
Clock Delay: 27
14:46:38:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
14:46:38:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________XXXXXXXXXXX_______
Clock Delay: 27
14:46:38:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________XXXXXXXXXXXX_____
Clock Delay: 28
14:46:38:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________XXXXXXXXXX______
Clock Delay: 28
14:46:38:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________XXXXXXXXXXXX_____
Clock Delay: 28
14:46:38:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________XXXXXXXXXX______
Clock Delay: 28
14:46:38:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________XXXXXXXXXXXX_____
Clock Delay: 28
14:46:38:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________XXXXXXXXXX______
Clock Delay: 28
14:46:38:setup_element:INFO: Eye window for uplink 32: _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
14:46:38:setup_element:INFO: Eye window for uplink 33: ______________________________________________________________XXXXXXXXXXX_______
Clock Delay: 27
14:46:38:setup_element:INFO: Eye window for uplink 34: _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
14:46:38:setup_element:INFO: Eye window for uplink 35: ______________________________________________________________XXXXXXXXXXX_______
Clock Delay: 27
14:46:38:setup_element:INFO: Eye window for uplink 36: _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
14:46:38:setup_element:INFO: Eye window for uplink 37: ______________________________________________________________XXXXXXXXXXX_______
Clock Delay: 27
14:46:38:setup_element:INFO: Eye window for uplink 38: _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
14:46:38:setup_element:INFO: Eye window for uplink 39: ______________________________________________________________XXXXXXXXXXX_______
Clock Delay: 27
14:46:38:setup_element:INFO: Setting the clock phase to 28 for group 0, downlink 2
14:46:38:setup_element:INFO: Scanning data phases
14:46:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:46:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:46:44:setup_element:INFO: Data phase scan results for group 0, downlink 2
14:46:44:setup_element:INFO: Eye window for uplink 0 : ____XXXXXX______________________________
Data delay found: 26
14:46:44:setup_element:INFO: Eye window for uplink 1 : _________XXXX___________________________
Data delay found: 30
14:46:44:setup_element:INFO: Eye window for uplink 2 : _____XXXXX______________________________
Data delay found: 27
14:46:44:setup_element:INFO: Eye window for uplink 3 : _________XXXXX__________________________
Data delay found: 31
14:46:44:setup_element:INFO: Eye window for uplink 4 : _____XXXXX______________________________
Data delay found: 27
14:46:44:setup_element:INFO: Eye window for uplink 5 : __________XXXXX_________________________
Data delay found: 32
14:46:44:setup_element:INFO: Eye window for uplink 6 : __XXXXX_________________________________
Data delay found: 24
14:46:44:setup_element:INFO: Eye window for uplink 7 : _______XXXXX____________________________
Data delay found: 29
14:46:44:setup_element:INFO: Eye window for uplink 8 : _____________________________XXXXX______
Data delay found: 11
14:46:44:setup_element:INFO: Eye window for uplink 9 : ________________________________XXXXX___
Data delay found: 14
14:46:44:setup_element:INFO: Eye window for uplink 10: ______________________________XXXXXX____
Data delay found: 12
14:46:44:setup_element:INFO: Eye window for uplink 11: _________________________________XXXX___
Data delay found: 14
14:46:44:setup_element:INFO: Eye window for uplink 12: _______________________________XXXXX____
Data delay found: 13
14:46:44:setup_element:INFO: Eye window for uplink 13: ________________________________XXXX____
Data delay found: 13
14:46:44:setup_element:INFO: Eye window for uplink 14: __XXXXX_________________________________
Data delay found: 24
14:46:44:setup_element:INFO: Eye window for uplink 15: _________XXXXX__________________________
Data delay found: 31
14:46:44:setup_element:INFO: Eye window for uplink 16: XX___________________________________XXX
Data delay found: 19
14:46:44:setup_element:INFO: Eye window for uplink 17: X__________________________________XXXXX
Data delay found: 17
14:46:44:setup_element:INFO: Eye window for uplink 18: XXX__________________________________XXX
Data delay found: 19
14:46:44:setup_element:INFO: Eye window for uplink 19: XX__________________________________XXXX
Data delay found: 18
14:46:44:setup_element:INFO: Eye window for uplink 20: X__________________________________XXXXX
Data delay found: 17
14:46:44:setup_element:INFO: Eye window for uplink 21: X___________________________________XXXX
Data delay found: 18
14:46:44:setup_element:INFO: Eye window for uplink 22: XX__________________________________XXXX
Data delay found: 18
14:46:44:setup_element:INFO: Eye window for uplink 23: __________________________________XXXX__
Data delay found: 15
14:46:44:setup_element:INFO: Eye window for uplink 24: ________XXXX____________________________
Data delay found: 29
14:46:44:setup_element:INFO: Eye window for uplink 25: XXXXXX________________________________XX
Data delay found: 21
14:46:44:setup_element:INFO: Eye window for uplink 26: __________________________________XXXXX_
Data delay found: 16
14:46:44:setup_element:INFO: Eye window for uplink 27: XX_________________________________XXXXX
Data delay found: 18
14:46:44:setup_element:INFO: Eye window for uplink 28: XXXX__________________________________XX
Data delay found: 20
14:46:44:setup_element:INFO: Eye window for uplink 29: XXX__________________________________XXX
Data delay found: 19
14:46:44:setup_element:INFO: Eye window for uplink 30: XXXX________________________________XXXX
Data delay found: 19
14:46:44:setup_element:INFO: Eye window for uplink 31: XX_________________________________XXXXX
Data delay found: 18
14:46:44:setup_element:INFO: Eye window for uplink 32: ________XXXXX___________________________
Data delay found: 30
14:46:44:setup_element:INFO: Eye window for uplink 33: _XXXXX_________________________________X
Data delay found: 22
14:46:44:setup_element:INFO: Eye window for uplink 34: ________XXXXX___________________________
Data delay found: 30
14:46:44:setup_element:INFO: Eye window for uplink 35: _XXXXX__________________________________
Data delay found: 23
14:46:44:setup_element:INFO: Eye window for uplink 36: ________XXXX____________________________
Data delay found: 29
14:46:44:setup_element:INFO: Eye window for uplink 37: __XXXX__________________________________
Data delay found: 23
14:46:44:setup_element:INFO: Eye window for uplink 38: ______XXXXX_____________________________
Data delay found: 28
14:46:44:setup_element:INFO: Eye window for uplink 39: XXXXX_________________________________XX
Data delay found: 21
14:46:44:setup_element:INFO: Setting the data phase to 26 for uplink 0
14:46:44:setup_element:INFO: Setting the data phase to 30 for uplink 1
14:46:44:setup_element:INFO: Setting the data phase to 27 for uplink 2
14:46:44:setup_element:INFO: Setting the data phase to 31 for uplink 3
14:46:44:setup_element:INFO: Setting the data phase to 27 for uplink 4
14:46:44:setup_element:INFO: Setting the data phase to 32 for uplink 5
14:46:44:setup_element:INFO: Setting the data phase to 24 for uplink 6
14:46:44:setup_element:INFO: Setting the data phase to 29 for uplink 7
14:46:44:setup_element:INFO: Setting the data phase to 11 for uplink 8
14:46:44:setup_element:INFO: Setting the data phase to 14 for uplink 9
14:46:44:setup_element:INFO: Setting the data phase to 12 for uplink 10
14:46:44:setup_element:INFO: Setting the data phase to 14 for uplink 11
14:46:44:setup_element:INFO: Setting the data phase to 13 for uplink 12
14:46:44:setup_element:INFO: Setting the data phase to 13 for uplink 13
14:46:44:setup_element:INFO: Setting the data phase to 24 for uplink 14
14:46:44:setup_element:INFO: Setting the data phase to 31 for uplink 15
14:46:44:setup_element:INFO: Setting the data phase to 19 for uplink 16
14:46:44:setup_element:INFO: Setting the data phase to 17 for uplink 17
14:46:44:setup_element:INFO: Setting the data phase to 19 for uplink 18
14:46:44:setup_element:INFO: Setting the data phase to 18 for uplink 19
14:46:44:setup_element:INFO: Setting the data phase to 17 for uplink 20
14:46:44:setup_element:INFO: Setting the data phase to 18 for uplink 21
14:46:44:setup_element:INFO: Setting the data phase to 18 for uplink 22
14:46:44:setup_element:INFO: Setting the data phase to 15 for uplink 23
14:46:44:setup_element:INFO: Setting the data phase to 29 for uplink 24
14:46:44:setup_element:INFO: Setting the data phase to 21 for uplink 25
14:46:44:setup_element:INFO: Setting the data phase to 16 for uplink 26
14:46:44:setup_element:INFO: Setting the data phase to 18 for uplink 27
14:46:44:setup_element:INFO: Setting the data phase to 20 for uplink 28
14:46:44:setup_element:INFO: Setting the data phase to 19 for uplink 29
14:46:44:setup_element:INFO: Setting the data phase to 19 for uplink 30
14:46:44:setup_element:INFO: Setting the data phase to 18 for uplink 31
14:46:44:setup_element:INFO: Setting the data phase to 30 for uplink 32
14:46:44:setup_element:INFO: Setting the data phase to 22 for uplink 33
14:46:44:setup_element:INFO: Setting the data phase to 30 for uplink 34
14:46:44:setup_element:INFO: Setting the data phase to 23 for uplink 35
14:46:44:setup_element:INFO: Setting the data phase to 29 for uplink 36
14:46:44:setup_element:INFO: Setting the data phase to 23 for uplink 37
14:46:44:setup_element:INFO: Setting the data phase to 28 for uplink 38
14:46:44:setup_element:INFO: Setting the data phase to 21 for uplink 39
14:46:44:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 28
Window Length: 67
Eye Windows:
Uplink 0: _______________________________________________________________XXXXXXXXXXX______
Uplink 1: _______________________________________________________________XXXXXXXXXXX______
Uplink 2: _______________________________________________________________XXXXXXXXXXX______
Uplink 3: _______________________________________________________________XXXXXXXXXXX______
Uplink 4: _______________________________________________________________XXXXXXXXXXX______
Uplink 5: _______________________________________________________________XXXXXXXXXXX______
Uplink 6: _______________________________________________________________XXXXXXXXXXX______
Uplink 7: _______________________________________________________________XXXXXXXXXXX______
Uplink 8: ________________________________________________________________XXXXXXXXXXX_____
Uplink 9: ______________________________________________________________XXXXXXXXXXXX______
Uplink 10: ________________________________________________________________XXXXXXXXXXX_____
Uplink 11: ______________________________________________________________XXXXXXXXXXXX______
Uplink 12: ________________________________________________________________XXXXXXXXXXX_____
Uplink 13: ______________________________________________________________XXXXXXXXXXXX______
Uplink 14: _______________________________________________________________XXXXXXXXXXX______
Uplink 15: _______________________________________________________________XXXXXXXXXXX______
Uplink 16: _______________________________________________________________XXXXXXXXXXXX_____
Uplink 17: ________________________________________________________________XXXXXXXXXX______
Uplink 18: _______________________________________________________________XXXXXXXXXXXX_____
Uplink 19: ________________________________________________________________XXXXXXXXXX______
Uplink 20: ________________________________________________________________XXXXXXXXXXX_____
Uplink 21: ______________________________________________________________XXXXXXXXXXXX______
Uplink 22: ________________________________________________________________XXXXXXXXXXX_____
Uplink 23: ______________________________________________________________XXXXXXXXXXXX______
Uplink 24: _______________________________________________________________XXXXXXXXXXX______
Uplink 25: ______________________________________________________________XXXXXXXXXXX_______
Uplink 26: _______________________________________________________________XXXXXXXXXXXX_____
Uplink 27: ________________________________________________________________XXXXXXXXXX______
Uplink 28: _______________________________________________________________XXXXXXXXXXXX_____
Uplink 29: ________________________________________________________________XXXXXXXXXX______
Uplink 30: _______________________________________________________________XXXXXXXXXXXX_____
Uplink 31: ________________________________________________________________XXXXXXXXXX______
Uplink 32: _______________________________________________________________XXXXXXXXXXX______
Uplink 33: ______________________________________________________________XXXXXXXXXXX_______
Uplink 34: _______________________________________________________________XXXXXXXXXXX______
Uplink 35: ______________________________________________________________XXXXXXXXXXX_______
Uplink 36: _______________________________________________________________XXXXXXXXXXX______
Uplink 37: ______________________________________________________________XXXXXXXXXXX_______
Uplink 38: _______________________________________________________________XXXXXXXXXXX______
Uplink 39: ______________________________________________________________XXXXXXXXXXX_______
Data phase characteristics:
Uplink 0:
Optimal Phase: 26
Window Length: 34
Eye Window: ____XXXXXX______________________________
Uplink 1:
Optimal Phase: 30
Window Length: 36
Eye Window: _________XXXX___________________________
Uplink 2:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 3:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 4:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 5:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 6:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 7:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 8:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 9:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 10:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 11:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 12:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 13:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 14:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 15:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 16:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 17:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 18:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 19:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 20:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 21:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 22:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 23:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 24:
Optimal Phase: 29
Window Length: 36
Eye Window: ________XXXX____________________________
Uplink 25:
Optimal Phase: 21
Window Length: 32
Eye Window: XXXXXX________________________________XX
Uplink 26:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 27:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 28:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 29:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 30:
Optimal Phase: 19
Window Length: 32
Eye Window: XXXX________________________________XXXX
Uplink 31:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 32:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 33:
Optimal Phase: 22
Window Length: 33
Eye Window: _XXXXX_________________________________X
Uplink 34:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 35:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 36:
Optimal Phase: 29
Window Length: 36
Eye Window: ________XXXX____________________________
Uplink 37:
Optimal Phase: 23
Window Length: 36
Eye Window: __XXXX__________________________________
Uplink 38:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 39:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
]
14:46:44:setup_element:INFO: Beginning SMX ASICs map scan
14:46:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:46:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:46:44:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:46:44:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:46:44:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39]
14:46:44:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 21
14:46:44:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 23
14:46:44:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 2, uplink 9
14:46:44:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 3, uplink 11
14:46:44:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 4, uplink 13
14:46:44:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 15
14:46:44:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 1
14:46:44:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 2, uplink 3
14:46:44:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 3, uplink 5
14:46:44:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 4, uplink 7
14:46:44:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 18
14:46:44:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 16
14:46:44:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 2, uplink 30
14:46:44:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 3, uplink 28
14:46:44:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 4, uplink 26
14:46:44:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 24
14:46:44:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 38
14:46:44:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 2, uplink 36
14:46:44:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 3, uplink 34
14:46:45:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 4, uplink 32
14:46:45:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 20
14:46:45:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 22
14:46:45:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 2, uplink 8
14:46:45:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 3, uplink 10
14:46:45:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 4, uplink 12
14:46:45:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 14
14:46:45:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 0
14:46:45:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 2, uplink 2
14:46:45:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 3, uplink 4
14:46:45:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 4, uplink 6
14:46:45:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 19
14:46:45:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 17
14:46:45:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 2, uplink 31
14:46:45:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 3, uplink 29
14:46:45:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 4, uplink 27
14:46:45:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 25
14:46:45:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 39
14:46:45:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 2, uplink 37
14:46:45:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 3, uplink 35
14:46:45:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 4, uplink 33
14:46:46:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 21), (1, 23), (2, 9), (3, 11), (4, 13)
ASIC address 0x1: (ASIC uplink, uplink): (0, 15), (1, 1), (2, 3), (3, 5), (4, 7)
ASIC address 0x2: (ASIC uplink, uplink): (0, 18), (1, 16), (2, 30), (3, 28), (4, 26)
ASIC address 0x3: (ASIC uplink, uplink): (0, 24), (1, 38), (2, 36), (3, 34), (4, 32)
ASIC address 0x4: (ASIC uplink, uplink): (0, 20), (1, 22), (2, 8), (3, 10), (4, 12)
ASIC address 0x5: (ASIC uplink, uplink): (0, 14), (1, 0), (2, 2), (3, 4), (4, 6)
ASIC address 0x6: (ASIC uplink, uplink): (0, 19), (1, 17), (2, 31), (3, 29), (4, 27)
ASIC address 0x7: (ASIC uplink, uplink): (0, 25), (1, 39), (2, 37), (3, 35), (4, 33)
Clock Phase Characteristic:
Optimal Phase: 28
Window Length: 67
Eye Windows:
Uplink 0: _______________________________________________________________XXXXXXXXXXX______
Uplink 1: _______________________________________________________________XXXXXXXXXXX______
Uplink 2: _______________________________________________________________XXXXXXXXXXX______
Uplink 3: _______________________________________________________________XXXXXXXXXXX______
Uplink 4: _______________________________________________________________XXXXXXXXXXX______
Uplink 5: _______________________________________________________________XXXXXXXXXXX______
Uplink 6: _______________________________________________________________XXXXXXXXXXX______
Uplink 7: _______________________________________________________________XXXXXXXXXXX______
Uplink 8: ________________________________________________________________XXXXXXXXXXX_____
Uplink 9: ______________________________________________________________XXXXXXXXXXXX______
Uplink 10: ________________________________________________________________XXXXXXXXXXX_____
Uplink 11: ______________________________________________________________XXXXXXXXXXXX______
Uplink 12: ________________________________________________________________XXXXXXXXXXX_____
Uplink 13: ______________________________________________________________XXXXXXXXXXXX______
Uplink 14: _______________________________________________________________XXXXXXXXXXX______
Uplink 15: _______________________________________________________________XXXXXXXXXXX______
Uplink 16: _______________________________________________________________XXXXXXXXXXXX_____
Uplink 17: ________________________________________________________________XXXXXXXXXX______
Uplink 18: _______________________________________________________________XXXXXXXXXXXX_____
Uplink 19: ________________________________________________________________XXXXXXXXXX______
Uplink 20: ________________________________________________________________XXXXXXXXXXX_____
Uplink 21: ______________________________________________________________XXXXXXXXXXXX______
Uplink 22: ________________________________________________________________XXXXXXXXXXX_____
Uplink 23: ______________________________________________________________XXXXXXXXXXXX______
Uplink 24: _______________________________________________________________XXXXXXXXXXX______
Uplink 25: ______________________________________________________________XXXXXXXXXXX_______
Uplink 26: _______________________________________________________________XXXXXXXXXXXX_____
Uplink 27: ________________________________________________________________XXXXXXXXXX______
Uplink 28: _______________________________________________________________XXXXXXXXXXXX_____
Uplink 29: ________________________________________________________________XXXXXXXXXX______
Uplink 30: _______________________________________________________________XXXXXXXXXXXX_____
Uplink 31: ________________________________________________________________XXXXXXXXXX______
Uplink 32: _______________________________________________________________XXXXXXXXXXX______
Uplink 33: ______________________________________________________________XXXXXXXXXXX_______
Uplink 34: _______________________________________________________________XXXXXXXXXXX______
Uplink 35: ______________________________________________________________XXXXXXXXXXX_______
Uplink 36: _______________________________________________________________XXXXXXXXXXX______
Uplink 37: ______________________________________________________________XXXXXXXXXXX_______
Uplink 38: _______________________________________________________________XXXXXXXXXXX______
Uplink 39: ______________________________________________________________XXXXXXXXXXX_______
Data phase characteristics:
Uplink 0:
Optimal Phase: 26
Window Length: 34
Eye Window: ____XXXXXX______________________________
Uplink 1:
Optimal Phase: 30
Window Length: 36
Eye Window: _________XXXX___________________________
Uplink 2:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 3:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 4:
Optimal Phase: 27
Window Length: 35
Eye Window: _____XXXXX______________________________
Uplink 5:
Optimal Phase: 32
Window Length: 35
Eye Window: __________XXXXX_________________________
Uplink 6:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 7:
Optimal Phase: 29
Window Length: 35
Eye Window: _______XXXXX____________________________
Uplink 8:
Optimal Phase: 11
Window Length: 35
Eye Window: _____________________________XXXXX______
Uplink 9:
Optimal Phase: 14
Window Length: 35
Eye Window: ________________________________XXXXX___
Uplink 10:
Optimal Phase: 12
Window Length: 34
Eye Window: ______________________________XXXXXX____
Uplink 11:
Optimal Phase: 14
Window Length: 36
Eye Window: _________________________________XXXX___
Uplink 12:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 13:
Optimal Phase: 13
Window Length: 36
Eye Window: ________________________________XXXX____
Uplink 14:
Optimal Phase: 24
Window Length: 35
Eye Window: __XXXXX_________________________________
Uplink 15:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 16:
Optimal Phase: 19
Window Length: 35
Eye Window: XX___________________________________XXX
Uplink 17:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 18:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 19:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 20:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 21:
Optimal Phase: 18
Window Length: 35
Eye Window: X___________________________________XXXX
Uplink 22:
Optimal Phase: 18
Window Length: 34
Eye Window: XX__________________________________XXXX
Uplink 23:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 24:
Optimal Phase: 29
Window Length: 36
Eye Window: ________XXXX____________________________
Uplink 25:
Optimal Phase: 21
Window Length: 32
Eye Window: XXXXXX________________________________XX
Uplink 26:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 27:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 28:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 29:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 30:
Optimal Phase: 19
Window Length: 32
Eye Window: XXXX________________________________XXXX
Uplink 31:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 32:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 33:
Optimal Phase: 22
Window Length: 33
Eye Window: _XXXXX_________________________________X
Uplink 34:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 35:
Optimal Phase: 23
Window Length: 35
Eye Window: _XXXXX__________________________________
Uplink 36:
Optimal Phase: 29
Window Length: 36
Eye Window: ________XXXX____________________________
Uplink 37:
Optimal Phase: 23
Window Length: 36
Eye Window: __XXXX__________________________________
Uplink 38:
Optimal Phase: 28
Window Length: 35
Eye Window: ______XXXXX_____________________________
Uplink 39:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
14:46:46:setup_element:INFO: Performing Elink synchronization
14:46:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:46:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:46:47:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:46:47:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:46:47:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
14:46:47:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39]
14:46:47:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 2 | 0 | [21] | [(0, 21), (1, 23), (2, 9), (3, 11), (4, 13)]
1 | [0] | 2 | 0 | [15] | [(0, 15), (1, 1), (2, 3), (3, 5), (4, 7)]
2 | [0] | 2 | 0 | [18] | [(0, 18), (1, 16), (2, 30), (3, 28), (4, 26)]
3 | [0] | 2 | 0 | [24] | [(0, 24), (1, 38), (2, 36), (3, 34), (4, 32)]
4 | [0] | 2 | 0 | [20] | [(0, 20), (1, 22), (2, 8), (3, 10), (4, 12)]
5 | [0] | 2 | 0 | [14] | [(0, 14), (1, 0), (2, 2), (3, 4), (4, 6)]
6 | [0] | 2 | 0 | [19] | [(0, 19), (1, 17), (2, 31), (3, 29), (4, 27)]
7 | [0] | 2 | 0 | [25] | [(0, 25), (1, 39), (2, 37), (3, 35), (4, 33)]
14:46:48:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
14:46:48:febtest:INFO: 0-0 | XA-000-08-002-000-007-067-03 | 40.9 | 1171.5
14:46:49:febtest:INFO: 0-1 | XA-000-08-002-000-007-013-06 | 44.1 | 1165.6
14:46:49:febtest:INFO: 0-2 | XA-000-08-002-000-007-044-08 | 18.7 | 1253.7
14:46:49:febtest:INFO: 0-3 | XA-000-08-002-000-007-034-08 | 28.2 | 1224.5
14:46:49:febtest:INFO: 0-4 | XA-000-08-002-000-007-038-08 | 31.4 | 1212.7
14:46:49:febtest:INFO: 0-5 | XA-000-08-002-000-007-043-08 | 25.1 | 1230.3
14:46:50:febtest:INFO: 0-6 | XA-000-08-002-000-007-028-01 | 40.9 | 1177.4
14:46:50:febtest:INFO: 0-7 | XA-000-08-002-000-007-056-15 | 37.7 | 1183.3
14:46:50:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
14:46:53:ST3_smx:INFO: chip: 0-0 37.726682 C 1189.190035 mV
14:46:53:ST3_smx:INFO: Electrons
14:46:53:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
14:46:55:ST3_smx:INFO: ----> Checking Analog response
14:46:55:ST3_smx:INFO: ----> Checking broken channels
14:46:55:ST3_smx:INFO: Total # broken ch: 0
14:46:55:ST3_smx:INFO: List FAST: []
14:46:55:ST3_smx:INFO: List SLOW: []
14:46:55:ST3_smx:INFO: Holes
14:46:55:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
14:46:57:ST3_smx:INFO: ----> Checking Analog response
14:46:57:ST3_smx:INFO: ----> Checking broken channels
14:46:57:ST3_smx:INFO: Total # broken ch: 0
14:46:57:ST3_smx:INFO: List FAST: []
14:46:57:ST3_smx:INFO: List SLOW: []
14:46:57:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
14:46:58:febtest:INFO: 0-0 | XA-000-08-002-000-007-067-03 | 37.7 | 1183.3
14:46:58:febtest:INFO: 0-1 | XA-000-08-002-000-007-013-06 | 40.9 | 1171.5
14:46:58:febtest:INFO: 0-2 | XA-000-08-002-000-007-044-08 | 18.7 | 1253.7
14:46:58:febtest:INFO: 0-3 | XA-000-08-002-000-007-034-08 | 28.2 | 1224.5
14:46:58:febtest:INFO: 0-4 | XA-000-08-002-000-007-038-08 | 31.4 | 1212.7
14:46:59:febtest:INFO: 0-5 | XA-000-08-002-000-007-043-08 | 28.2 | 1230.3
14:46:59:febtest:INFO: 0-6 | XA-000-08-002-000-007-028-01 | 40.9 | 1177.4
14:46:59:febtest:INFO: 0-7 | XA-000-08-002-000-007-056-15 | 37.7 | 1177.4
14:47:00:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
14:47:03:ST3_smx:INFO: chip: 0-1 50.430383 C 1147.806000 mV
14:47:03:ST3_smx:INFO: Electrons
14:47:03:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
14:47:04:ST3_smx:INFO: ----> Checking Analog response
14:47:04:ST3_smx:INFO: ----> Checking broken channels
14:47:05:ST3_smx:INFO: Total # broken ch: 0
14:47:05:ST3_smx:INFO: List FAST: []
14:47:05:ST3_smx:INFO: List SLOW: []
14:47:05:ST3_smx:INFO: Holes
14:47:05:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
14:47:06:ST3_smx:INFO: ----> Checking Analog response
14:47:06:ST3_smx:INFO: ----> Checking broken channels
14:47:07:ST3_smx:INFO: Total # broken ch: 0
14:47:07:ST3_smx:INFO: List FAST: []
14:47:07:ST3_smx:INFO: List SLOW: []
14:47:07:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
14:47:07:febtest:INFO: 0-0 | XA-000-08-002-000-007-067-03 | 37.7 | 1183.3
14:47:07:febtest:INFO: 0-1 | XA-000-08-002-000-007-013-06 | 50.4 | 1141.9
14:47:07:febtest:INFO: 0-2 | XA-000-08-002-000-007-044-08 | 18.7 | 1253.7
14:47:07:febtest:INFO: 0-3 | XA-000-08-002-000-007-034-08 | 28.2 | 1224.5
14:47:08:febtest:INFO: 0-4 | XA-000-08-002-000-007-038-08 | 31.4 | 1212.7
14:47:08:febtest:INFO: 0-5 | XA-000-08-002-000-007-043-08 | 28.2 | 1230.3
14:47:08:febtest:INFO: 0-6 | XA-000-08-002-000-007-028-01 | 37.7 | 1177.4
14:47:08:febtest:INFO: 0-7 | XA-000-08-002-000-007-056-15 | 37.7 | 1177.4
14:47:09:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
14:47:12:ST3_smx:INFO: chip: 0-2 18.745682 C 1253.730060 mV
14:47:12:ST3_smx:INFO: Electrons
14:47:12:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
14:47:14:ST3_smx:INFO: ----> Checking Analog response
14:47:14:ST3_smx:INFO: ----> Checking broken channels
14:47:14:ST3_smx:INFO: Total # broken ch: 0
14:47:14:ST3_smx:INFO: List FAST: []
14:47:14:ST3_smx:INFO: List SLOW: []
14:47:14:ST3_smx:INFO: Holes
14:47:14:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
14:47:16:ST3_smx:INFO: ----> Checking Analog response
14:47:16:ST3_smx:INFO: ----> Checking broken channels
14:47:16:ST3_smx:INFO: Total # broken ch: 0
14:47:16:ST3_smx:INFO: List FAST: []
14:47:16:ST3_smx:INFO: List SLOW: []
14:47:16:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
14:47:16:febtest:INFO: 0-0 | XA-000-08-002-000-007-067-03 | 37.7 | 1183.3
14:47:17:febtest:INFO: 0-1 | XA-000-08-002-000-007-013-06 | 50.4 | 1141.9
14:47:17:febtest:INFO: 0-2 | XA-000-08-002-000-007-044-08 | 21.9 | 1253.7
14:47:17:febtest:INFO: 0-3 | XA-000-08-002-000-007-034-08 | 28.2 | 1224.5
14:47:17:febtest:INFO: 0-4 | XA-000-08-002-000-007-038-08 | 31.4 | 1218.6
14:47:17:febtest:INFO: 0-5 | XA-000-08-002-000-007-043-08 | 25.1 | 1230.3
14:47:18:febtest:INFO: 0-6 | XA-000-08-002-000-007-028-01 | 40.9 | 1177.4
14:47:18:febtest:INFO: 0-7 | XA-000-08-002-000-007-056-15 | 37.7 | 1177.4
14:47:18:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
14:47:22:ST3_smx:INFO: chip: 0-3 34.556970 C 1206.851500 mV
14:47:22:ST3_smx:INFO: Electrons
14:47:22:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
14:47:24:ST3_smx:INFO: ----> Checking Analog response
14:47:24:ST3_smx:INFO: ----> Checking broken channels
14:47:24:ST3_smx:INFO: Total # broken ch: 0
14:47:24:ST3_smx:INFO: List FAST: []
14:47:24:ST3_smx:INFO: List SLOW: []
14:47:24:ST3_smx:INFO: Holes
14:47:24:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
14:47:25:ST3_smx:INFO: ----> Checking Analog response
14:47:25:ST3_smx:INFO: ----> Checking broken channels
14:47:26:ST3_smx:INFO: Total # broken ch: 0
14:47:26:ST3_smx:INFO: List FAST: []
14:47:26:ST3_smx:INFO: List SLOW: []
14:47:26:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
14:47:26:febtest:INFO: 0-0 | XA-000-08-002-000-007-067-03 | 37.7 | 1183.3
14:47:26:febtest:INFO: 0-1 | XA-000-08-002-000-007-013-06 | 50.4 | 1141.9
14:47:26:febtest:INFO: 0-2 | XA-000-08-002-000-007-044-08 | 18.7 | 1247.9
14:47:27:febtest:INFO: 0-3 | XA-000-08-002-000-007-034-08 | 34.6 | 1201.0
14:47:27:febtest:INFO: 0-4 | XA-000-08-002-000-007-038-08 | 31.4 | 1218.6
14:47:27:febtest:INFO: 0-5 | XA-000-08-002-000-007-043-08 | 25.1 | 1230.3
14:47:27:febtest:INFO: 0-6 | XA-000-08-002-000-007-028-01 | 40.9 | 1177.4
14:47:27:febtest:INFO: 0-7 | XA-000-08-002-000-007-056-15 | 37.7 | 1177.4
14:47:28:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
14:47:31:ST3_smx:INFO: chip: 0-4 28.225000 C 1224.468235 mV
14:47:31:ST3_smx:INFO: Electrons
14:47:31:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
14:47:33:ST3_smx:INFO: ----> Checking Analog response
14:47:33:ST3_smx:INFO: ----> Checking broken channels
14:47:33:ST3_smx:INFO: Total # broken ch: 0
14:47:33:ST3_smx:INFO: List FAST: []
14:47:33:ST3_smx:INFO: List SLOW: []
14:47:33:ST3_smx:INFO: Holes
14:47:33:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
14:47:35:ST3_smx:INFO: ----> Checking Analog response
14:47:35:ST3_smx:INFO: ----> Checking broken channels
14:47:35:ST3_smx:INFO: Total # broken ch: 0
14:47:35:ST3_smx:INFO: List FAST: []
14:47:35:ST3_smx:INFO: List SLOW: []
14:47:35:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
14:47:35:febtest:INFO: 0-0 | XA-000-08-002-000-007-067-03 | 37.7 | 1183.3
14:47:35:febtest:INFO: 0-1 | XA-000-08-002-000-007-013-06 | 50.4 | 1141.9
14:47:36:febtest:INFO: 0-2 | XA-000-08-002-000-007-044-08 | 18.7 | 1253.7
14:47:36:febtest:INFO: 0-3 | XA-000-08-002-000-007-034-08 | 34.6 | 1201.0
14:47:36:febtest:INFO: 0-4 | XA-000-08-002-000-007-038-08 | 31.4 | 1218.6
14:47:36:febtest:INFO: 0-5 | XA-000-08-002-000-007-043-08 | 28.2 | 1230.3
14:47:36:febtest:INFO: 0-6 | XA-000-08-002-000-007-028-01 | 40.9 | 1177.4
14:47:37:febtest:INFO: 0-7 | XA-000-08-002-000-007-056-15 | 37.7 | 1177.4
14:47:37:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
14:47:40:ST3_smx:INFO: chip: 0-5 21.902970 C 1247.887635 mV
14:47:40:ST3_smx:INFO: Electrons
14:47:40:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
14:47:42:ST3_smx:INFO: ----> Checking Analog response
14:47:42:ST3_smx:INFO: ----> Checking broken channels
14:47:42:ST3_smx:INFO: Total # broken ch: 0
14:47:42:ST3_smx:INFO: List FAST: []
14:47:42:ST3_smx:INFO: List SLOW: []
14:47:42:ST3_smx:INFO: Holes
14:47:42:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
14:47:44:ST3_smx:INFO: ----> Checking Analog response
14:47:44:ST3_smx:INFO: ----> Checking broken channels
14:47:44:ST3_smx:INFO: Total # broken ch: 0
14:47:44:ST3_smx:INFO: List FAST: []
14:47:44:ST3_smx:INFO: List SLOW: []
14:47:44:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
14:47:45:febtest:INFO: 0-0 | XA-000-08-002-000-007-067-03 | 37.7 | 1183.3
14:47:45:febtest:INFO: 0-1 | XA-000-08-002-000-007-013-06 | 50.4 | 1141.9
14:47:45:febtest:INFO: 0-2 | XA-000-08-002-000-007-044-08 | 18.7 | 1253.7
14:47:45:febtest:INFO: 0-3 | XA-000-08-002-000-007-034-08 | 34.6 | 1201.0
14:47:45:febtest:INFO: 0-4 | XA-000-08-002-000-007-038-08 | 31.4 | 1218.6
14:47:46:febtest:INFO: 0-5 | XA-000-08-002-000-007-043-08 | 25.1 | 1247.9
14:47:46:febtest:INFO: 0-6 | XA-000-08-002-000-007-028-01 | 40.9 | 1177.4
14:47:46:febtest:INFO: 0-7 | XA-000-08-002-000-007-056-15 | 37.7 | 1183.3
14:47:47:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
14:47:50:ST3_smx:INFO: chip: 0-6 40.898880 C 1171.483840 mV
14:47:50:ST3_smx:INFO: Electrons
14:47:50:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
14:47:52:ST3_smx:INFO: ----> Checking Analog response
14:47:52:ST3_smx:INFO: ----> Checking broken channels
14:47:52:ST3_smx:INFO: Total # broken ch: 0
14:47:52:ST3_smx:INFO: List FAST: []
14:47:52:ST3_smx:INFO: List SLOW: []
14:47:52:ST3_smx:INFO: Holes
14:47:52:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
14:47:54:ST3_smx:INFO: ----> Checking Analog response
14:47:54:ST3_smx:INFO: ----> Checking broken channels
14:47:54:ST3_smx:INFO: Total # broken ch: 0
14:47:54:ST3_smx:INFO: List FAST: []
14:47:54:ST3_smx:INFO: List SLOW: []
14:47:54:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
14:47:54:febtest:INFO: 0-0 | XA-000-08-002-000-007-067-03 | 37.7 | 1183.3
14:47:54:febtest:INFO: 0-1 | XA-000-08-002-000-007-013-06 | 50.4 | 1141.9
14:47:54:febtest:INFO: 0-2 | XA-000-08-002-000-007-044-08 | 18.7 | 1253.7
14:47:55:febtest:INFO: 0-3 | XA-000-08-002-000-007-034-08 | 34.6 | 1201.0
14:47:55:febtest:INFO: 0-4 | XA-000-08-002-000-007-038-08 | 31.4 | 1218.6
14:47:55:febtest:INFO: 0-5 | XA-000-08-002-000-007-043-08 | 21.9 | 1247.9
14:47:55:febtest:INFO: 0-6 | XA-000-08-002-000-007-028-01 | 44.1 | 1165.6
14:47:55:febtest:INFO: 0-7 | XA-000-08-002-000-007-056-15 | 37.7 | 1177.4
14:47:56:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
14:47:59:ST3_smx:INFO: chip: 0-7 40.898880 C 1171.483840 mV
14:47:59:ST3_smx:INFO: Electrons
14:47:59:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
14:48:01:ST3_smx:INFO: ----> Checking Analog response
14:48:01:ST3_smx:INFO: ----> Checking broken channels
14:48:01:ST3_smx:INFO: Total # broken ch: 0
14:48:01:ST3_smx:INFO: List FAST: []
14:48:01:ST3_smx:INFO: List SLOW: []
14:48:01:ST3_smx:INFO: Holes
14:48:01:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
14:48:03:ST3_smx:INFO: ----> Checking Analog response
14:48:03:ST3_smx:INFO: ----> Checking broken channels
14:48:03:ST3_smx:INFO: Total # broken ch: 0
14:48:03:ST3_smx:INFO: List FAST: []
14:48:03:ST3_smx:INFO: List SLOW: []
14:48:03:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
14:48:03:febtest:INFO: 0-0 | XA-000-08-002-000-007-067-03 | 37.7 | 1183.3
14:48:03:febtest:INFO: 0-1 | XA-000-08-002-000-007-013-06 | 50.4 | 1141.9
14:48:04:febtest:INFO: 0-2 | XA-000-08-002-000-007-044-08 | 18.7 | 1253.7
14:48:04:febtest:INFO: 0-3 | XA-000-08-002-000-007-034-08 | 34.6 | 1201.0
14:48:04:febtest:INFO: 0-4 | XA-000-08-002-000-007-038-08 | 31.4 | 1218.6
14:48:04:febtest:INFO: 0-5 | XA-000-08-002-000-007-043-08 | 21.9 | 1247.9
14:48:04:febtest:INFO: 0-6 | XA-000-08-002-000-007-028-01 | 40.9 | 1171.5
14:48:05:febtest:INFO: 0-7 | XA-000-08-002-000-007-056-15 | 40.9 | 1171.5
############################################################
# S U M M A R Y #
############################################################
{'TEST_NAME': 'FEB-ASIC', 'TEST_DATE': '2023_11_23-14_46_35', 'OPERATOR': 'Alois Alzheimer', 'PROJECT': 'KIT', 'SITE': 'KIT', 'SETUP': 'KIT_TEST_SETUP_1', 'ASIC_ID': 'XA-000-08-002-000-007-056-15', 'FUSED_ID': 6359364699116565391, 'HW_ADDR': 7, 'UPLINK': 25, 'VERS_NO': '2.2', 'CABLE_SET_ID': '', 'IC_TEMP': '0', 'VDDM': '0', 'AUX': '0', 'CSABIAS': '0', 'VDDM_INT': '0', 'ADC_Chi2': 0.0, 'ADC_NDF': 0, 'ADC_P0': 0.0, 'ADC_P1': 0.006824, 'ADC_P2': -2.485e-06, 'ADC_P0err': 0.001, 'ADC_P1err': 0.001, 'ADC_P2err': 1e-05, 'ADC_VREF_P': 58, 'ADC_VREF_N': 30, 'ADC_VREF_T': 128, 'ADC_VREF_TR': 122, 'THR2_GLB': 30, 'LOOP__PLS': 100, 'CALIB_PLS': 250, 'SnsLoop': 5, 'IFED': 31, 'CSA_BIAS': 15, 'CSA_Chi2': 0.0, 'CSA_NDF': 0, 'CSA_P0': 0.0, 'CSA_P1': 0.0, 'CSA_P2': 0.0, 'CSA_P0err': 0.0, 'CSA_P1err': 0.0, 'CSA_P2err': 0.0, 'CONF_FAIL_REG': 0, 'N_BROKEN_DISC': 0, 'N_BROKEN_FAST': '[]', 'N_BROKEN_SLOW': '[]', 'P_BROKEN_DISC': 0, 'P_BROKEN_FAST': '[]', 'P_BROKEN_SLOW': '[]', 'ASIC_QA_category': '', 'N_BROKEN_CABLE': 0, 'LIST_OF_BROKEN_CABLES': 0, 'FEB_SN': '6019', 'FEB_TYPE': 8.5, 'FEB_UPLINKS': 5, 'FEB_A': 0, 'FEB_B': 1, 'ADDR_0': '', 'ADDR_1': '', 'ADDR_2': '', 'ADDR_3': '', 'ADDR_4': '', 'ADDR_5': '', 'ADDR_6': '', 'ADDR_7': '', 'SENSOR_ID': '', 'MODULE_NAME': '', 'MODULE_LADDER': '', 'MODULE_MODULE': '', 'MODULE_SIZE': '', 'MODULE_GRADE': '', 'MODULE_TYPE': '', 'VI_bInit': ['2.800', '1.9990', '2.200', '2.2520', '0.000', '0.0000', '7.000', '1.6640'], 'VI_aInit': ['0', '0', '0', '0', '0', '0'], 'VI_atEnd': ['0', '0', '0', '0', '0', '0'], 'AMP_CAL': 110, 'PlsLoop': 3, 'N_ANA_PRESENT': 'Analog response OK', 'N_DISC_FAIL_CH': 0, 'N_ANA_FAIL_CH': '0', 'P_ANA_PRESENT': 'Analog response OK', 'P_DISC_FAIL_CH': 0, 'P_ANA_FAIL_CH': '0'}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-ASIC
TEST_DATE : 2023_11_23-14_46_35
OPERATOR : Alois Alzheimer
SITE : KIT
SETUP : KIT_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 6019
FEB_TYPE : 8.514:49:30:ST3_Shared:INFO: /home/cbm/public_html/KIT_LogDir//FEB/FEB_6019/TestDate_2023_11_23-14_46_35/
FEB_UPLINKS : 5
FEB_A : 0
FEB_B : 1
---------------------------------------
MODULE_NAME
---------------------------------------
VI_before_Init : ['2.800', '1.9990', '2.200', '2.2520', '0.000', '0.0000', '7.000', '1.6640']
VI_after__Init : ['2.800', '1.9810', '2.200', '0.3206', '0.000', '0.0000', '7.000', '1.6360']
VI_at__the_End : ['2.800', '1.9810', '2.200', '0.3206', '0.000', '0.0000', '7.000', '1.6360']
14:48:18:ST3_Shared:INFO: Listo of operators:Irakli;
14:48:19:ST3_Shared:INFO: Listo of operators:Benjamin; Irakli;
14:48:19:ST3_Shared:INFO: Listo of operators:Henrik; Benjamin; Irakli;