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FEB_6019 29.11.23 10:37:32
Info
10:36:49:ST3_hmp4040:INFO: ROHDE&SCHWARZ,HMP4040,110099,HW50020003/SW2.72
10:36:50:febtest:INFO: FEB8.2 selected
10:37:03:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:37:03:ST3_emu:ERROR: device described in file: ../ST3_BASE/config/feb8_2_devices.xml not found!!!
10:37:08:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:37:13:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:37:13:ST3_Shared:INFO: --------------------------FEB-ASIC--------------------------
10:37:13:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:37:13:febtest:INFO: Tsting FEB with SN 6019
10:37:15:smx_tester:INFO: Scanning setup
10:37:15:elinks:INFO: Disabling clock on downlink 0
10:37:15:elinks:INFO: Disabling clock on downlink 1
10:37:15:elinks:INFO: Disabling clock on downlink 2
10:37:15:elinks:INFO: Disabling clock on downlink 3
10:37:15:elinks:INFO: Disabling clock on downlink 4
10:37:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:37:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:37:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:37:15:elinks:INFO: Disabling clock on downlink 0
10:37:15:elinks:INFO: Disabling clock on downlink 1
10:37:15:elinks:INFO: Disabling clock on downlink 2
10:37:15:elinks:INFO: Disabling clock on downlink 3
10:37:15:elinks:INFO: Disabling clock on downlink 4
10:37:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:37:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:37:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:37:15:elinks:INFO: Disabling clock on downlink 0
10:37:15:elinks:INFO: Disabling clock on downlink 1
10:37:15:elinks:INFO: Disabling clock on downlink 2
10:37:15:elinks:INFO: Disabling clock on downlink 3
10:37:15:elinks:INFO: Disabling clock on downlink 4
10:37:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:37:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:37:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:37:15:elinks:INFO: Disabling clock on downlink 0
10:37:15:elinks:INFO: Disabling clock on downlink 1
10:37:15:elinks:INFO: Disabling clock on downlink 2
10:37:15:elinks:INFO: Disabling clock on downlink 3
10:37:15:elinks:INFO: Disabling clock on downlink 4
10:37:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:37:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:37:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:37:15:elinks:INFO: Disabling clock on downlink 0
10:37:15:elinks:INFO: Disabling clock on downlink 1
10:37:15:elinks:INFO: Disabling clock on downlink 2
10:37:15:elinks:INFO: Disabling clock on downlink 3
10:37:15:elinks:INFO: Disabling clock on downlink 4
10:37:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:37:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:37:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:37:16:ST3_emu:ERROR: # of setup_elements is ZERO!
10:37:25:febtest:INFO: FEB8.5 selected
10:37:26:smx_tester:INFO: Setting Elink clock mode to 160 MHz
10:37:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:37:32:ST3_Shared:INFO: --------------------------FEB-ASIC--------------------------
10:37:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:37:32:febtest:INFO: Tsting FEB with SN 6019
10:37:34:smx_tester:INFO: Scanning setup
10:37:34:elinks:INFO: Disabling clock on downlink 0
10:37:34:elinks:INFO: Disabling clock on downlink 1
10:37:34:elinks:INFO: Disabling clock on downlink 2
10:37:34:elinks:INFO: Disabling clock on downlink 3
10:37:34:elinks:INFO: Disabling clock on downlink 4
10:37:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:37:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:37:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:37:34:elinks:INFO: Disabling clock on downlink 0
10:37:34:elinks:INFO: Disabling clock on downlink 1
10:37:34:elinks:INFO: Disabling clock on downlink 2
10:37:34:elinks:INFO: Disabling clock on downlink 3
10:37:34:elinks:INFO: Disabling clock on downlink 4
10:37:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:37:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:37:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:37:34:elinks:INFO: Disabling clock on downlink 0
10:37:34:elinks:INFO: Disabling clock on downlink 1
10:37:34:elinks:INFO: Disabling clock on downlink 2
10:37:34:elinks:INFO: Disabling clock on downlink 3
10:37:34:elinks:INFO: Disabling clock on downlink 4
10:37:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:37:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 0
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 1
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 2
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 3
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 4
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 5
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 6
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 8
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 9
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 10
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 11
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 12
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 13
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 14
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 15
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 33
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 34
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 35
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 36
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 37
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 38
10:37:34:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 39
10:37:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:37:34:elinks:INFO: Disabling clock on downlink 0
10:37:34:elinks:INFO: Disabling clock on downlink 1
10:37:34:elinks:INFO: Disabling clock on downlink 2
10:37:34:elinks:INFO: Disabling clock on downlink 3
10:37:34:elinks:INFO: Disabling clock on downlink 4
10:37:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:37:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:37:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:37:35:elinks:INFO: Disabling clock on downlink 0
10:37:35:elinks:INFO: Disabling clock on downlink 1
10:37:35:elinks:INFO: Disabling clock on downlink 2
10:37:35:elinks:INFO: Disabling clock on downlink 3
10:37:35:elinks:INFO: Disabling clock on downlink 4
10:37:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:37:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:37:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:37:35:setup_element:INFO: Scanning clock phase
10:37:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:37:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:37:35:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:37:35:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
10:37:35:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
10:37:35:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
10:37:35:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
10:37:35:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
10:37:35:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
10:37:35:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
10:37:35:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
10:37:35:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________XXXXXXXXXXXX______
Clock Delay: 27
10:37:35:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
10:37:35:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________XXXXXXXXXXXX______
Clock Delay: 27
10:37:35:setup_element:INFO: Eye window for uplink 12: _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
10:37:35:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________XXXXXXXXXXXX______
Clock Delay: 27
10:37:35:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
10:37:35:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
10:37:35:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________XXXXXXXXXXX_____
Clock Delay: 29
10:37:35:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________XXXXXXXXXX______
Clock Delay: 28
10:37:35:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________XXXXXXXXXXX_____
Clock Delay: 29
10:37:35:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________XXXXXXXXXX______
Clock Delay: 28
10:37:35:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
10:37:35:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________XXXXXXXXXXXX______
Clock Delay: 27
10:37:35:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
10:37:35:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________XXXXXXXXXXXX______
Clock Delay: 27
10:37:35:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
10:37:35:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________XXXXXXXXXXXX_______
Clock Delay: 26
10:37:35:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________XXXXXXXXXXX_____
Clock Delay: 29
10:37:35:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________XXXXXXXXXX______
Clock Delay: 28
10:37:35:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________XXXXXXXXXXX_____
Clock Delay: 29
10:37:35:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________XXXXXXXXXX______
Clock Delay: 28
10:37:35:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________XXXXXXXXXXX_____
Clock Delay: 29
10:37:35:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________XXXXXXXXXX______
Clock Delay: 28
10:37:35:setup_element:INFO: Eye window for uplink 33: _____________________________________________________________XXXXXXXXXXXX_______
Clock Delay: 26
10:37:35:setup_element:INFO: Eye window for uplink 34: _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
10:37:35:setup_element:INFO: Eye window for uplink 35: _____________________________________________________________XXXXXXXXXXXX_______
Clock Delay: 26
10:37:35:setup_element:INFO: Eye window for uplink 36: _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
10:37:35:setup_element:INFO: Eye window for uplink 37: _____________________________________________________________XXXXXXXXXXXX_______
Clock Delay: 26
10:37:35:setup_element:INFO: Eye window for uplink 38: _______________________________________________________________XXXXXXXXXXX______
Clock Delay: 28
10:37:35:setup_element:INFO: Eye window for uplink 39: _____________________________________________________________XXXXXXXXXXXX_______
Clock Delay: 26
10:37:35:setup_element:INFO: Setting the clock phase to 27 for group 0, downlink 2
10:37:35:setup_element:INFO: Scanning data phases
10:37:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:37:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:37:40:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:37:40:setup_element:INFO: Eye window for uplink 0 : ____XXXXXXX_________________________XXXX
Data delay found: 23
10:37:40:setup_element:INFO: Eye window for uplink 1 : ___________XXXX_________________________
Data delay found: 32
10:37:40:setup_element:INFO: Eye window for uplink 2 : _____XXXXXXX________________________XXXX
Data delay found: 23
10:37:40:setup_element:INFO: Eye window for uplink 3 : ___________XXXXX________________________
Data delay found: 33
10:37:40:setup_element:INFO: Eye window for uplink 4 : XXXXXXXXXXXXX_______________________XXXX
Data delay found: 24
10:37:40:setup_element:INFO: Eye window for uplink 5 : ____XXXXXXXXXXXX________________________
Data delay found: 29
10:37:40:setup_element:INFO: Eye window for uplink 6 : XXXXXXXX_________________________XXXXXXX
Data delay found: 20
10:37:40:setup_element:INFO: Eye window for uplink 8 : _______________________________XXXXX____
Data delay found: 13
10:37:40:setup_element:INFO: Eye window for uplink 9 : __________________________________XXXXX_
Data delay found: 16
10:37:40:setup_element:INFO: Eye window for uplink 10: _________________________________XXXXX__
Data delay found: 15
10:37:40:setup_element:INFO: Eye window for uplink 11: ___________________________________XXXX_
Data delay found: 16
10:37:40:setup_element:INFO: Eye window for uplink 12: _________________________________XXXXX__
Data delay found: 15
10:37:40:setup_element:INFO: Eye window for uplink 13: __________________________________XXXX__
Data delay found: 15
10:37:40:setup_element:INFO: Eye window for uplink 14: ____XXXXX___________________________XXXX
Data delay found: 22
10:37:40:setup_element:INFO: Eye window for uplink 15: ____________XXXX________________________
Data delay found: 33
10:37:40:setup_element:INFO: Eye window for uplink 16: XXXXX__________________________________X
Data delay found: 21
10:37:40:setup_element:INFO: Eye window for uplink 17: XXX__________________________________XXX
Data delay found: 19
10:37:40:setup_element:INFO: Eye window for uplink 18: XXXXX__________________________________X
Data delay found: 21
10:37:41:setup_element:INFO: Eye window for uplink 19: XXXX__________________________________XX
Data delay found: 20
10:37:41:setup_element:INFO: Eye window for uplink 20: XXX__________________________________XXX
Data delay found: 19
10:37:41:setup_element:INFO: Eye window for uplink 21: XXX___________________________________XX
Data delay found: 20
10:37:41:setup_element:INFO: Eye window for uplink 22: XXX__________________________________XXX
Data delay found: 19
10:37:41:setup_element:INFO: Eye window for uplink 23: X__________________________________XXXXX
Data delay found: 17
10:37:41:setup_element:INFO: Eye window for uplink 24: _________XXXXX__________________________
Data delay found: 31
10:37:41:setup_element:INFO: Eye window for uplink 25: _XXXXXX_________________________________
Data delay found: 23
10:37:41:setup_element:INFO: Eye window for uplink 26: XX_________________________________XXXXX
Data delay found: 18
10:37:41:setup_element:INFO: Eye window for uplink 27: XXXX_________________________________XXX
Data delay found: 20
10:37:41:setup_element:INFO: Eye window for uplink 28: _XXXXX_________________________________X
Data delay found: 22
10:37:41:setup_element:INFO: Eye window for uplink 29: XXXXX_________________________________XX
Data delay found: 21
10:37:41:setup_element:INFO: Eye window for uplink 30: XXXXXX________________________________XX
Data delay found: 21
10:37:41:setup_element:INFO: Eye window for uplink 31: XXXX_________________________________XXX
Data delay found: 20
10:37:41:setup_element:INFO: Eye window for uplink 33: XXXXXXXX_____________________X_X_XXXXXXX
Data delay found: 18
10:37:41:setup_element:INFO: Eye window for uplink 34: _XXXXXXXXXXXXXXX____________________X__X
Data delay found: 25
10:37:41:setup_element:INFO: Eye window for uplink 35: XXXXXXXX_________________________XXXXXXX
Data delay found: 20
10:37:41:setup_element:INFO: Eye window for uplink 36: __________XXXX__________________________
Data delay found: 31
10:37:41:setup_element:INFO: Eye window for uplink 37: ___XXXXX________________________________
Data delay found: 25
10:37:41:setup_element:INFO: Eye window for uplink 38: ________XXXXX___________________________
Data delay found: 30
10:37:41:setup_element:INFO: Eye window for uplink 39: _XXXXXX________________________________X
Data delay found: 22
10:37:41:setup_element:INFO: Setting the data phase to 23 for uplink 0
10:37:41:setup_element:INFO: Setting the data phase to 32 for uplink 1
10:37:41:setup_element:INFO: Setting the data phase to 23 for uplink 2
10:37:41:setup_element:INFO: Setting the data phase to 33 for uplink 3
10:37:41:setup_element:INFO: Setting the data phase to 24 for uplink 4
10:37:41:setup_element:INFO: Setting the data phase to 29 for uplink 5
10:37:41:setup_element:INFO: Setting the data phase to 20 for uplink 6
10:37:41:setup_element:INFO: Setting the data phase to 13 for uplink 8
10:37:41:setup_element:INFO: Setting the data phase to 16 for uplink 9
10:37:41:setup_element:INFO: Setting the data phase to 15 for uplink 10
10:37:41:setup_element:INFO: Setting the data phase to 16 for uplink 11
10:37:41:setup_element:INFO: Setting the data phase to 15 for uplink 12
10:37:41:setup_element:INFO: Setting the data phase to 15 for uplink 13
10:37:41:setup_element:INFO: Setting the data phase to 22 for uplink 14
10:37:41:setup_element:INFO: Setting the data phase to 33 for uplink 15
10:37:41:setup_element:INFO: Setting the data phase to 21 for uplink 16
10:37:41:setup_element:INFO: Setting the data phase to 19 for uplink 17
10:37:41:setup_element:INFO: Setting the data phase to 21 for uplink 18
10:37:41:setup_element:INFO: Setting the data phase to 20 for uplink 19
10:37:41:setup_element:INFO: Setting the data phase to 19 for uplink 20
10:37:41:setup_element:INFO: Setting the data phase to 20 for uplink 21
10:37:41:setup_element:INFO: Setting the data phase to 19 for uplink 22
10:37:41:setup_element:INFO: Setting the data phase to 17 for uplink 23
10:37:41:setup_element:INFO: Setting the data phase to 31 for uplink 24
10:37:41:setup_element:INFO: Setting the data phase to 23 for uplink 25
10:37:41:setup_element:INFO: Setting the data phase to 18 for uplink 26
10:37:41:setup_element:INFO: Setting the data phase to 20 for uplink 27
10:37:41:setup_element:INFO: Setting the data phase to 22 for uplink 28
10:37:41:setup_element:INFO: Setting the data phase to 21 for uplink 29
10:37:41:setup_element:INFO: Setting the data phase to 21 for uplink 30
10:37:41:setup_element:INFO: Setting the data phase to 20 for uplink 31
10:37:41:setup_element:INFO: Setting the data phase to 18 for uplink 33
10:37:41:setup_element:INFO: Setting the data phase to 25 for uplink 34
10:37:41:setup_element:INFO: Setting the data phase to 20 for uplink 35
10:37:41:setup_element:INFO: Setting the data phase to 31 for uplink 36
10:37:41:setup_element:INFO: Setting the data phase to 25 for uplink 37
10:37:41:setup_element:INFO: Setting the data phase to 30 for uplink 38
10:37:41:setup_element:INFO: Setting the data phase to 22 for uplink 39
10:37:41:ST3_emu:ERROR: [
Setup Element:
Group: 0
Downlink: 2
Uplinks: [0, 1, 2, 3, 4, 5, 6, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 33, 34, 35, 36, 37, 38, 39]
ASICs Map: None
Clock Phase Characteristic:
Optimal Phase: 27
Window Length: 66
Eye Windows:
Uplink 0: _______________________________________________________________XXXXXXXXXXX______
Uplink 1: _______________________________________________________________XXXXXXXXXXX______
Uplink 2: _______________________________________________________________XXXXXXXXXXX______
Uplink 3: _______________________________________________________________XXXXXXXXXXX______
Uplink 4: _______________________________________________________________XXXXXXXXXXX______
Uplink 5: _______________________________________________________________XXXXXXXXXXX______
Uplink 6: _______________________________________________________________XXXXXXXXXXX______
Uplink 8: _______________________________________________________________XXXXXXXXXXX______
Uplink 9: ______________________________________________________________XXXXXXXXXXXX______
Uplink 10: _______________________________________________________________XXXXXXXXXXX______
Uplink 11: ______________________________________________________________XXXXXXXXXXXX______
Uplink 12: _______________________________________________________________XXXXXXXXXXX______
Uplink 13: ______________________________________________________________XXXXXXXXXXXX______
Uplink 14: _______________________________________________________________XXXXXXXXXXX______
Uplink 15: _______________________________________________________________XXXXXXXXXXX______
Uplink 16: ________________________________________________________________XXXXXXXXXXX_____
Uplink 17: ________________________________________________________________XXXXXXXXXX______
Uplink 18: ________________________________________________________________XXXXXXXXXXX_____
Uplink 19: ________________________________________________________________XXXXXXXXXX______
Uplink 20: _______________________________________________________________XXXXXXXXXXX______
Uplink 21: ______________________________________________________________XXXXXXXXXXXX______
Uplink 22: _______________________________________________________________XXXXXXXXXXX______
Uplink 23: ______________________________________________________________XXXXXXXXXXXX______
Uplink 24: _______________________________________________________________XXXXXXXXXXX______
Uplink 25: _____________________________________________________________XXXXXXXXXXXX_______
Uplink 26: ________________________________________________________________XXXXXXXXXXX_____
Uplink 27: ________________________________________________________________XXXXXXXXXX______
Uplink 28: ________________________________________________________________XXXXXXXXXXX_____
Uplink 29: ________________________________________________________________XXXXXXXXXX______
Uplink 30: ________________________________________________________________XXXXXXXXXXX_____
Uplink 31: ________________________________________________________________XXXXXXXXXX______
Uplink 33: _____________________________________________________________XXXXXXXXXXXX_______
Uplink 34: _______________________________________________________________XXXXXXXXXXX______
Uplink 35: _____________________________________________________________XXXXXXXXXXXX_______
Uplink 36: _______________________________________________________________XXXXXXXXXXX______
Uplink 37: _____________________________________________________________XXXXXXXXXXXX_______
Uplink 38: _______________________________________________________________XXXXXXXXXXX______
Uplink 39: _____________________________________________________________XXXXXXXXXXXX_______
Data phase characteristics:
Uplink 0:
Optimal Phase: 23
Window Length: 25
Eye Window: ____XXXXXXX_________________________XXXX
Uplink 1:
Optimal Phase: 32
Window Length: 36
Eye Window: ___________XXXX_________________________
Uplink 2:
Optimal Phase: 23
Window Length: 24
Eye Window: _____XXXXXXX________________________XXXX
Uplink 3:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 4:
Optimal Phase: 24
Window Length: 23
Eye Window: XXXXXXXXXXXXX_______________________XXXX
Uplink 5:
Optimal Phase: 29
Window Length: 28
Eye Window: ____XXXXXXXXXXXX________________________
Uplink 6:
Optimal Phase: 20
Window Length: 25
Eye Window: XXXXXXXX_________________________XXXXXXX
Uplink 8:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 9:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 10:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 11:
Optimal Phase: 16
Window Length: 36
Eye Window: ___________________________________XXXX_
Uplink 12:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 13:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 14:
Optimal Phase: 22
Window Length: 27
Eye Window: ____XXXXX___________________________XXXX
Uplink 15:
Optimal Phase: 33
Window Length: 36
Eye Window: ____________XXXX________________________
Uplink 16:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 17:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 18:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 19:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 20:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 21:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 22:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 23:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 24:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 25:
Optimal Phase: 23
Window Length: 34
Eye Window: _XXXXXX_________________________________
Uplink 26:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 27:
Optimal Phase: 20
Window Length: 33
Eye Window: XXXX_________________________________XXX
Uplink 28:
Optimal Phase: 22
Window Length: 33
Eye Window: _XXXXX_________________________________X
Uplink 29:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 30:
Optimal Phase: 21
Window Length: 32
Eye Window: XXXXXX________________________________XX
Uplink 31:
Optimal Phase: 20
Window Length: 33
Eye Window: XXXX_________________________________XXX
Uplink 33:
Optimal Phase: 18
Window Length: 21
Eye Window: XXXXXXXX_____________________X_X_XXXXXXX
Uplink 34:
Optimal Phase: 25
Window Length: 20
Eye Window: _XXXXXXXXXXXXXXX____________________X__X
Uplink 35:
Optimal Phase: 20
Window Length: 25
Eye Window: XXXXXXXX_________________________XXXXXXX
Uplink 36:
Optimal Phase: 31
Window Length: 36
Eye Window: __________XXXX__________________________
Uplink 37:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 38:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 39:
Optimal Phase: 22
Window Length: 32
Eye Window: _XXXXXX________________________________X
]
10:37:41:setup_element:INFO: Beginning SMX ASICs map scan
10:37:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:37:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:37:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:37:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:37:41:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 33, 34, 35, 36, 37, 38, 39]
10:37:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 21
10:37:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 23
10:37:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 2, uplink 9
10:37:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 3, uplink 11
10:37:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 4, uplink 13
10:37:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 15
10:37:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 1
10:37:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 2, uplink 3
10:37:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 3, uplink 5
10:37:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 18
10:37:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 16
10:37:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 2, uplink 30
10:37:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 3, uplink 28
10:37:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 4, uplink 26
10:37:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 24
10:37:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 38
10:37:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 2, uplink 36
10:37:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 3, uplink 34
10:37:41:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 20
10:37:42:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 22
10:37:42:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 2, uplink 8
10:37:42:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 3, uplink 10
10:37:42:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 4, uplink 12
10:37:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 14
10:37:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 0
10:37:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 2, uplink 2
10:37:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 3, uplink 4
10:37:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 4, uplink 6
10:37:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 19
10:37:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 17
10:37:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 2, uplink 31
10:37:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 3, uplink 29
10:37:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 4, uplink 27
10:37:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 25
10:37:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 39
10:37:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 2, uplink 37
10:37:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 3, uplink 35
10:37:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 4, uplink 33
10:37:43:ST3_emu:ERROR:
Setup Element:
Group: 0
Downlink: 2
Uplinks: [0, 1, 2, 3, 4, 5, 6, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 33, 34, 35, 36, 37, 38, 39]
ASICs Map:
ASIC address 0x0: (ASIC uplink, uplink): (0, 21), (1, 23), (2, 9), (3, 11), (4, 13)
ASIC address 0x1: (ASIC uplink, uplink): (0, 15), (1, 1), (2, 3), (3, 5)
ASIC address 0x2: (ASIC uplink, uplink): (0, 18), (1, 16), (2, 30), (3, 28), (4, 26)
ASIC address 0x3: (ASIC uplink, uplink): (0, 24), (1, 38), (2, 36), (3, 34)
ASIC address 0x4: (ASIC uplink, uplink): (0, 20), (1, 22), (2, 8), (3, 10), (4, 12)
ASIC address 0x5: (ASIC uplink, uplink): (0, 14), (1, 0), (2, 2), (3, 4), (4, 6)
ASIC address 0x6: (ASIC uplink, uplink): (0, 19), (1, 17), (2, 31), (3, 29), (4, 27)
ASIC address 0x7: (ASIC uplink, uplink): (0, 25), (1, 39), (2, 37), (3, 35), (4, 33)
Clock Phase Characteristic:
Optimal Phase: 27
Window Length: 66
Eye Windows:
Uplink 0: _______________________________________________________________XXXXXXXXXXX______
Uplink 1: _______________________________________________________________XXXXXXXXXXX______
Uplink 2: _______________________________________________________________XXXXXXXXXXX______
Uplink 3: _______________________________________________________________XXXXXXXXXXX______
Uplink 4: _______________________________________________________________XXXXXXXXXXX______
Uplink 5: _______________________________________________________________XXXXXXXXXXX______
Uplink 6: _______________________________________________________________XXXXXXXXXXX______
Uplink 8: _______________________________________________________________XXXXXXXXXXX______
Uplink 9: ______________________________________________________________XXXXXXXXXXXX______
Uplink 10: _______________________________________________________________XXXXXXXXXXX______
Uplink 11: ______________________________________________________________XXXXXXXXXXXX______
Uplink 12: _______________________________________________________________XXXXXXXXXXX______
Uplink 13: ______________________________________________________________XXXXXXXXXXXX______
Uplink 14: _______________________________________________________________XXXXXXXXXXX______
Uplink 15: _______________________________________________________________XXXXXXXXXXX______
Uplink 16: ________________________________________________________________XXXXXXXXXXX_____
Uplink 17: ________________________________________________________________XXXXXXXXXX______
Uplink 18: ________________________________________________________________XXXXXXXXXXX_____
Uplink 19: ________________________________________________________________XXXXXXXXXX______
Uplink 20: _______________________________________________________________XXXXXXXXXXX______
Uplink 21: ______________________________________________________________XXXXXXXXXXXX______
Uplink 22: _______________________________________________________________XXXXXXXXXXX______
Uplink 23: ______________________________________________________________XXXXXXXXXXXX______
Uplink 24: _______________________________________________________________XXXXXXXXXXX______
Uplink 25: _____________________________________________________________XXXXXXXXXXXX_______
Uplink 26: ________________________________________________________________XXXXXXXXXXX_____
Uplink 27: ________________________________________________________________XXXXXXXXXX______
Uplink 28: ________________________________________________________________XXXXXXXXXXX_____
Uplink 29: ________________________________________________________________XXXXXXXXXX______
Uplink 30: ________________________________________________________________XXXXXXXXXXX_____
Uplink 31: ________________________________________________________________XXXXXXXXXX______
Uplink 33: _____________________________________________________________XXXXXXXXXXXX_______
Uplink 34: _______________________________________________________________XXXXXXXXXXX______
Uplink 35: _____________________________________________________________XXXXXXXXXXXX_______
Uplink 36: _______________________________________________________________XXXXXXXXXXX______
Uplink 37: _____________________________________________________________XXXXXXXXXXXX_______
Uplink 38: _______________________________________________________________XXXXXXXXXXX______
Uplink 39: _____________________________________________________________XXXXXXXXXXXX_______
Data phase characteristics:
Uplink 0:
Optimal Phase: 23
Window Length: 25
Eye Window: ____XXXXXXX_________________________XXXX
Uplink 1:
Optimal Phase: 32
Window Length: 36
Eye Window: ___________XXXX_________________________
Uplink 2:
Optimal Phase: 23
Window Length: 24
Eye Window: _____XXXXXXX________________________XXXX
Uplink 3:
Optimal Phase: 33
Window Length: 35
Eye Window: ___________XXXXX________________________
Uplink 4:
Optimal Phase: 24
Window Length: 23
Eye Window: XXXXXXXXXXXXX_______________________XXXX
Uplink 5:
Optimal Phase: 29
Window Length: 28
Eye Window: ____XXXXXXXXXXXX________________________
Uplink 6:
Optimal Phase: 20
Window Length: 25
Eye Window: XXXXXXXX_________________________XXXXXXX
Uplink 8:
Optimal Phase: 13
Window Length: 35
Eye Window: _______________________________XXXXX____
Uplink 9:
Optimal Phase: 16
Window Length: 35
Eye Window: __________________________________XXXXX_
Uplink 10:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 11:
Optimal Phase: 16
Window Length: 36
Eye Window: ___________________________________XXXX_
Uplink 12:
Optimal Phase: 15
Window Length: 35
Eye Window: _________________________________XXXXX__
Uplink 13:
Optimal Phase: 15
Window Length: 36
Eye Window: __________________________________XXXX__
Uplink 14:
Optimal Phase: 22
Window Length: 27
Eye Window: ____XXXXX___________________________XXXX
Uplink 15:
Optimal Phase: 33
Window Length: 36
Eye Window: ____________XXXX________________________
Uplink 16:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 17:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 18:
Optimal Phase: 21
Window Length: 34
Eye Window: XXXXX__________________________________X
Uplink 19:
Optimal Phase: 20
Window Length: 34
Eye Window: XXXX__________________________________XX
Uplink 20:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 21:
Optimal Phase: 20
Window Length: 35
Eye Window: XXX___________________________________XX
Uplink 22:
Optimal Phase: 19
Window Length: 34
Eye Window: XXX__________________________________XXX
Uplink 23:
Optimal Phase: 17
Window Length: 34
Eye Window: X__________________________________XXXXX
Uplink 24:
Optimal Phase: 31
Window Length: 35
Eye Window: _________XXXXX__________________________
Uplink 25:
Optimal Phase: 23
Window Length: 34
Eye Window: _XXXXXX_________________________________
Uplink 26:
Optimal Phase: 18
Window Length: 33
Eye Window: XX_________________________________XXXXX
Uplink 27:
Optimal Phase: 20
Window Length: 33
Eye Window: XXXX_________________________________XXX
Uplink 28:
Optimal Phase: 22
Window Length: 33
Eye Window: _XXXXX_________________________________X
Uplink 29:
Optimal Phase: 21
Window Length: 33
Eye Window: XXXXX_________________________________XX
Uplink 30:
Optimal Phase: 21
Window Length: 32
Eye Window: XXXXXX________________________________XX
Uplink 31:
Optimal Phase: 20
Window Length: 33
Eye Window: XXXX_________________________________XXX
Uplink 33:
Optimal Phase: 18
Window Length: 21
Eye Window: XXXXXXXX_____________________X_X_XXXXXXX
Uplink 34:
Optimal Phase: 25
Window Length: 20
Eye Window: _XXXXXXXXXXXXXXX____________________X__X
Uplink 35:
Optimal Phase: 20
Window Length: 25
Eye Window: XXXXXXXX_________________________XXXXXXX
Uplink 36:
Optimal Phase: 31
Window Length: 36
Eye Window: __________XXXX__________________________
Uplink 37:
Optimal Phase: 25
Window Length: 35
Eye Window: ___XXXXX________________________________
Uplink 38:
Optimal Phase: 30
Window Length: 35
Eye Window: ________XXXXX___________________________
Uplink 39:
Optimal Phase: 22
Window Length: 32
Eye Window: _XXXXXX________________________________X
10:37:43:setup_element:INFO: Performing Elink synchronization
10:37:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:37:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:37:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:37:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:37:43:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:37:43:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 33, 34, 35, 36, 37, 38, 39]
10:37:44:ST3_emu:INFO: Number of chips: 8
addr | upli | dwnli | grp | uplinks | uplinks_map
0 | [0] | 2 | 0 | [21] | [(0, 21), (1, 23), (2, 9), (3, 11), (4, 13)]
1 | [0] | 2 | 0 | [15] | [(0, 15), (1, 1), (2, 3), (3, 5)]
2 | [0] | 2 | 0 | [18] | [(0, 18), (1, 16), (2, 30), (3, 28), (4, 26)]
3 | [0] | 2 | 0 | [24] | [(0, 24), (1, 38), (2, 36), (3, 34)]
4 | [0] | 2 | 0 | [20] | [(0, 20), (1, 22), (2, 8), (3, 10), (4, 12)]
5 | [0] | 2 | 0 | [14] | [(0, 14), (1, 0), (2, 2), (3, 4), (4, 6)]
6 | [0] | 2 | 0 | [19] | [(0, 19), (1, 17), (2, 31), (3, 29), (4, 27)]
7 | [0] | 2 | 0 | [25] | [(0, 25), (1, 39), (2, 37), (3, 35), (4, 33)]
10:37:45:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:37:45:febtest:INFO: 0-0 | XA-000-08-002-000-007-067-03 | 40.9 | 1171.5
10:37:45:febtest:INFO: 0-1 | XA-000-08-002-000-007-013-06 | 40.9 | 1171.5
10:37:46:febtest:INFO: 0-2 | XA-000-08-002-000-007-044-08 | 18.7 | 1253.7
10:37:46:febtest:INFO: 0-3 | XA-000-08-002-000-007-034-08 | 28.2 | 1224.5
10:37:46:febtest:INFO: 0-4 | XA-000-08-002-000-007-038-08 | 31.4 | 1212.7
10:37:46:febtest:INFO: 0-5 | XA-000-08-002-000-007-043-08 | 28.2 | 1230.3
10:37:46:febtest:INFO: 0-6 | XA-000-08-002-000-007-028-01 | 40.9 | 1171.5
10:37:47:febtest:INFO: 0-7 | XA-000-08-002-000-007-056-15 | 40.9 | 1171.5
10:37:47:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:37:50:ST3_smx:INFO: chip: 0-0 34.556970 C 1189.190035 mV
10:37:50:ST3_smx:INFO: Electrons
10:37:50:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
10:37:52:ST3_smx:INFO: ----> Checking Analog response
10:37:52:ST3_smx:INFO: ----> Checking broken channels
10:37:52:ST3_smx:INFO: Total # broken ch: 0
10:37:52:ST3_smx:INFO: List FAST: []
10:37:52:ST3_smx:INFO: List SLOW: []
10:37:52:ST3_smx:INFO: Holes
10:37:52:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
10:37:54:ST3_smx:INFO: ----> Checking Analog response
10:37:54:ST3_smx:INFO: ----> Checking broken channels
10:37:54:ST3_smx:INFO: Total # broken ch: 0
10:37:54:ST3_smx:INFO: List FAST: []
10:37:54:ST3_smx:INFO: List SLOW: []
10:37:54:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:37:54:febtest:INFO: 0-0 | XA-000-08-002-000-007-067-03 | 34.6 | 1183.3
10:37:54:febtest:INFO: 0-1 | XA-000-08-002-000-007-013-06 | 40.9 | 1165.6
10:37:55:febtest:INFO: 0-2 | XA-000-08-002-000-007-044-08 | 18.7 | 1253.7
10:37:55:febtest:INFO: 0-3 | XA-000-08-002-000-007-034-08 | 28.2 | 1224.5
10:37:55:febtest:INFO: 0-4 | XA-000-08-002-000-007-038-08 | 31.4 | 1212.7
10:37:55:febtest:INFO: 0-5 | XA-000-08-002-000-007-043-08 | 25.1 | 1230.3
10:37:55:febtest:INFO: 0-6 | XA-000-08-002-000-007-028-01 | 40.9 | 1171.5
10:37:56:febtest:INFO: 0-7 | XA-000-08-002-000-007-056-15 | 40.9 | 1171.5
10:37:56:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:38:00:ST3_smx:INFO: chip: 0-1 47.250730 C 1147.806000 mV
10:38:00:ST3_smx:INFO: Electrons
10:38:00:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
10:38:02:ST3_smx:INFO: ----> Checking Analog response
10:38:02:ST3_smx:INFO: ----> Checking broken channels
10:38:02:ST3_smx:INFO: Total # broken ch: 0
10:38:02:ST3_smx:INFO: List FAST: []
10:38:02:ST3_smx:INFO: List SLOW: []
10:38:02:ST3_smx:INFO: Holes
10:38:02:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
10:38:03:ST3_smx:INFO: ----> Checking Analog response
10:38:03:ST3_smx:INFO: ----> Checking broken channels
10:38:04:ST3_smx:INFO: Total # broken ch: 0
10:38:04:ST3_smx:INFO: List FAST: []
10:38:04:ST3_smx:INFO: List SLOW: []
10:38:04:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:38:04:febtest:INFO: 0-0 | XA-000-08-002-000-007-067-03 | 34.6 | 1183.3
10:38:04:febtest:INFO: 0-1 | XA-000-08-002-000-007-013-06 | 50.4 | 1141.9
10:38:04:febtest:INFO: 0-2 | XA-000-08-002-000-007-044-08 | 18.7 | 1253.7
10:38:04:febtest:INFO: 0-3 | XA-000-08-002-000-007-034-08 | 28.2 | 1218.6
10:38:05:febtest:INFO: 0-4 | XA-000-08-002-000-007-038-08 | 31.4 | 1212.7
10:38:05:febtest:INFO: 0-5 | XA-000-08-002-000-007-043-08 | 28.2 | 1230.3
10:38:05:febtest:INFO: 0-6 | XA-000-08-002-000-007-028-01 | 44.1 | 1171.5
10:38:05:febtest:INFO: 0-7 | XA-000-08-002-000-007-056-15 | 40.9 | 1171.5
10:38:06:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:38:09:ST3_smx:INFO: chip: 0-2 18.745682 C 1253.730060 mV
10:38:09:ST3_smx:INFO: Electrons
10:38:09:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
10:38:11:ST3_smx:INFO: ----> Checking Analog response
10:38:11:ST3_smx:INFO: ----> Checking broken channels
10:38:11:ST3_smx:INFO: Total # broken ch: 0
10:38:11:ST3_smx:INFO: List FAST: []
10:38:11:ST3_smx:INFO: List SLOW: []
10:38:11:ST3_smx:INFO: Holes
10:38:11:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
10:38:12:ST3_smx:INFO: ----> Checking Analog response
10:38:12:ST3_smx:INFO: ----> Checking broken channels
10:38:13:ST3_smx:INFO: Total # broken ch: 0
10:38:13:ST3_smx:INFO: List FAST: []
10:38:13:ST3_smx:INFO: List SLOW: []
10:38:13:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:38:13:febtest:INFO: 0-0 | XA-000-08-002-000-007-067-03 | 34.6 | 1183.3
10:38:13:febtest:INFO: 0-1 | XA-000-08-002-000-007-013-06 | 50.4 | 1141.9
10:38:13:febtest:INFO: 0-2 | XA-000-08-002-000-007-044-08 | 18.7 | 1247.9
10:38:13:febtest:INFO: 0-3 | XA-000-08-002-000-007-034-08 | 28.2 | 1224.5
10:38:14:febtest:INFO: 0-4 | XA-000-08-002-000-007-038-08 | 31.4 | 1212.7
10:38:14:febtest:INFO: 0-5 | XA-000-08-002-000-007-043-08 | 28.2 | 1230.3
10:38:14:febtest:INFO: 0-6 | XA-000-08-002-000-007-028-01 | 44.1 | 1171.5
10:38:14:febtest:INFO: 0-7 | XA-000-08-002-000-007-056-15 | 40.9 | 1171.5
10:38:15:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:38:18:ST3_smx:INFO: chip: 0-3 34.556970 C 1206.851500 mV
10:38:18:ST3_smx:INFO: Electrons
10:38:18:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
10:38:20:ST3_smx:INFO: ----> Checking Analog response
10:38:20:ST3_smx:INFO: ----> Checking broken channels
10:38:20:ST3_smx:INFO: Total # broken ch: 0
10:38:20:ST3_smx:INFO: List FAST: []
10:38:20:ST3_smx:INFO: List SLOW: []
10:38:20:ST3_smx:INFO: Holes
10:38:20:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
10:38:22:ST3_smx:INFO: ----> Checking Analog response
10:38:22:ST3_smx:INFO: ----> Checking broken channels
10:38:22:ST3_smx:INFO: Total # broken ch: 0
10:38:22:ST3_smx:INFO: List FAST: []
10:38:22:ST3_smx:INFO: List SLOW: []
10:38:22:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:38:22:febtest:INFO: 0-0 | XA-000-08-002-000-007-067-03 | 34.6 | 1183.3
10:38:22:febtest:INFO: 0-1 | XA-000-08-002-000-007-013-06 | 50.4 | 1141.9
10:38:22:febtest:INFO: 0-2 | XA-000-08-002-000-007-044-08 | 18.7 | 1253.7
10:38:23:febtest:INFO: 0-3 | XA-000-08-002-000-007-034-08 | 34.6 | 1195.1
10:38:23:febtest:INFO: 0-4 | XA-000-08-002-000-007-038-08 | 31.4 | 1212.7
10:38:23:febtest:INFO: 0-5 | XA-000-08-002-000-007-043-08 | 28.2 | 1230.3
10:38:23:febtest:INFO: 0-6 | XA-000-08-002-000-007-028-01 | 40.9 | 1171.5
10:38:23:febtest:INFO: 0-7 | XA-000-08-002-000-007-056-15 | 40.9 | 1171.5
10:38:24:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:38:27:ST3_smx:INFO: chip: 0-4 31.389742 C 1218.600960 mV
10:38:27:ST3_smx:INFO: Electrons
10:38:27:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
10:38:29:ST3_smx:INFO: ----> Checking Analog response
10:38:29:ST3_smx:INFO: ----> Checking broken channels
10:38:29:ST3_smx:INFO: Total # broken ch: 0
10:38:29:ST3_smx:INFO: List FAST: []
10:38:29:ST3_smx:INFO: List SLOW: []
10:38:29:ST3_smx:INFO: Holes
10:38:29:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
10:38:31:ST3_smx:INFO: ----> Checking Analog response
10:38:31:ST3_smx:INFO: ----> Checking broken channels
10:38:31:ST3_smx:INFO: Total # broken ch: 0
10:38:31:ST3_smx:INFO: List FAST: []
10:38:31:ST3_smx:INFO: List SLOW: []
10:38:31:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:38:31:febtest:INFO: 0-0 | XA-000-08-002-000-007-067-03 | 34.6 | 1183.3
10:38:32:febtest:INFO: 0-1 | XA-000-08-002-000-007-013-06 | 47.3 | 1141.9
10:38:32:febtest:INFO: 0-2 | XA-000-08-002-000-007-044-08 | 18.7 | 1253.7
10:38:32:febtest:INFO: 0-3 | XA-000-08-002-000-007-034-08 | 34.6 | 1201.0
10:38:32:febtest:INFO: 0-4 | XA-000-08-002-000-007-038-08 | 31.4 | 1218.6
10:38:32:febtest:INFO: 0-5 | XA-000-08-002-000-007-043-08 | 28.2 | 1230.3
10:38:33:febtest:INFO: 0-6 | XA-000-08-002-000-007-028-01 | 44.1 | 1171.5
10:38:33:febtest:INFO: 0-7 | XA-000-08-002-000-007-056-15 | 40.9 | 1171.5
10:38:33:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:38:37:ST3_smx:INFO: chip: 0-5 21.902970 C 1247.887635 mV
10:38:37:ST3_smx:INFO: Electrons
10:38:37:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
10:38:39:ST3_smx:INFO: ----> Checking Analog response
10:38:39:ST3_smx:INFO: ----> Checking broken channels
10:38:39:ST3_smx:INFO: Total # broken ch: 0
10:38:39:ST3_smx:INFO: List FAST: []
10:38:39:ST3_smx:INFO: List SLOW: []
10:38:39:ST3_smx:INFO: Holes
10:38:39:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
10:38:41:ST3_smx:INFO: ----> Checking Analog response
10:38:41:ST3_smx:INFO: ----> Checking broken channels
10:38:41:ST3_smx:INFO: Total # broken ch: 0
10:38:41:ST3_smx:INFO: List FAST: []
10:38:41:ST3_smx:INFO: List SLOW: []
10:38:41:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:38:41:febtest:INFO: 0-0 | XA-000-08-002-000-007-067-03 | 34.6 | 1183.3
10:38:41:febtest:INFO: 0-1 | XA-000-08-002-000-007-013-06 | 47.3 | 1141.9
10:38:42:febtest:INFO: 0-2 | XA-000-08-002-000-007-044-08 | 18.7 | 1247.9
10:38:42:febtest:INFO: 0-3 | XA-000-08-002-000-007-034-08 | 34.6 | 1201.0
10:38:42:febtest:INFO: 0-4 | XA-000-08-002-000-007-038-08 | 31.4 | 1218.6
10:38:42:febtest:INFO: 0-5 | XA-000-08-002-000-007-043-08 | 25.1 | 1242.0
10:38:42:febtest:INFO: 0-6 | XA-000-08-002-000-007-028-01 | 40.9 | 1171.5
10:38:43:febtest:INFO: 0-7 | XA-000-08-002-000-007-056-15 | 40.9 | 1177.4
10:38:43:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:38:46:ST3_smx:INFO: chip: 0-6 40.898880 C 1171.483840 mV
10:38:46:ST3_smx:INFO: Electrons
10:38:46:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
10:38:48:ST3_smx:INFO: ----> Checking Analog response
10:38:48:ST3_smx:INFO: ----> Checking broken channels
10:38:48:ST3_smx:INFO: Total # broken ch: 0
10:38:48:ST3_smx:INFO: List FAST: []
10:38:48:ST3_smx:INFO: List SLOW: []
10:38:48:ST3_smx:INFO: Holes
10:38:48:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
10:38:50:ST3_smx:INFO: ----> Checking Analog response
10:38:50:ST3_smx:INFO: ----> Checking broken channels
10:38:50:ST3_smx:INFO: Total # broken ch: 0
10:38:50:ST3_smx:INFO: List FAST: []
10:38:50:ST3_smx:INFO: List SLOW: []
10:38:50:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:38:50:febtest:INFO: 0-0 | XA-000-08-002-000-007-067-03 | 34.6 | 1183.3
10:38:51:febtest:INFO: 0-1 | XA-000-08-002-000-007-013-06 | 47.3 | 1147.8
10:38:51:febtest:INFO: 0-2 | XA-000-08-002-000-007-044-08 | 18.7 | 1247.9
10:38:51:febtest:INFO: 0-3 | XA-000-08-002-000-007-034-08 | 34.6 | 1206.9
10:38:51:febtest:INFO: 0-4 | XA-000-08-002-000-007-038-08 | 31.4 | 1218.6
10:38:51:febtest:INFO: 0-5 | XA-000-08-002-000-007-043-08 | 25.1 | 1242.0
10:38:52:febtest:INFO: 0-6 | XA-000-08-002-000-007-028-01 | 44.1 | 1171.5
10:38:52:febtest:INFO: 0-7 | XA-000-08-002-000-007-056-15 | 40.9 | 1177.4
10:38:52:ST3_smx:INFO: PROCESS 1: Configuring AFE with typical values
10:38:56:ST3_smx:INFO: chip: 0-7 40.898880 C 1171.483840 mV
10:38:56:ST3_smx:INFO: Electrons
10:38:56:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
10:38:58:ST3_smx:INFO: ----> Checking Analog response
10:38:58:ST3_smx:INFO: ----> Checking broken channels
10:38:58:ST3_smx:INFO: Total # broken ch: 0
10:38:58:ST3_smx:INFO: List FAST: []
10:38:58:ST3_smx:INFO: List SLOW: []
10:38:58:ST3_smx:INFO: Holes
10:38:58:ST3_smx:INFO: Injected pulses: 110LSB, amp_cal 6.160000 fC
10:39:00:ST3_smx:INFO: ----> Checking Analog response
10:39:00:ST3_smx:INFO: ----> Checking broken channels
10:39:00:ST3_smx:INFO: Total # broken ch: 0
10:39:00:ST3_smx:INFO: List FAST: []
10:39:00:ST3_smx:INFO: List SLOW: []
10:39:00:febtest:INFO: Add. | ASIC-ID | T [C] | Vddm [mV]
10:39:00:febtest:INFO: 0-0 | XA-000-08-002-000-007-067-03 | 37.7 | 1183.3
10:39:01:febtest:INFO: 0-1 | XA-000-08-002-000-007-013-06 | 50.4 | 1141.9
10:39:01:febtest:INFO: 0-2 | XA-000-08-002-000-007-044-08 | 18.7 | 1253.7
10:39:01:febtest:INFO: 0-3 | XA-000-08-002-000-007-034-08 | 34.6 | 1201.0
10:39:01:febtest:INFO: 0-4 | XA-000-08-002-000-007-038-08 | 31.4 | 1218.6
10:39:01:febtest:INFO: 0-5 | XA-000-08-002-000-007-043-08 | 25.1 | 1247.9
10:39:02:febtest:INFO: 0-6 | XA-000-08-002-000-007-028-01 | 44.1 | 1171.5
10:39:02:febtest:INFO: 0-7 | XA-000-08-002-000-007-056-15 | 44.1 | 1165.6
############################################################
# S U M M A R Y #
############################################################
{'TEST_NAME': 'FEB-ASIC', 'TEST_DATE': '2023_11_29-10_37_32', 'OPERATOR': 'Alois Alzheimer', 'PROJECT': 'KIT', 'SITE': 'KIT', 'SETUP': 'KIT_TEST_SETUP_1', 'ASIC_ID': 'XA-000-08-002-000-007-056-15', 'FUSED_ID': 6359364699116565391, 'HW_ADDR': 7, 'UPLINK': 25, 'VERS_NO': '2.2', 'CABLE_SET_ID': '', 'IC_TEMP': '0', 'VDDM': '0', 'AUX': '0', 'CSABIAS': '0', 'VDDM_INT': '0', 'ADC_Chi2': 0.0, 'ADC_NDF': 0, 'ADC_P0': 0.0, 'ADC_P1': 0.006824, 'ADC_P2': -2.485e-06, 'ADC_P0err': 0.001, 'ADC_P1err': 0.001, 'ADC_P2err': 1e-05, 'ADC_VREF_P': 58, 'ADC_VREF_N': 30, 'ADC_VREF_T': 128, 'ADC_VREF_TR': 122, 'THR2_GLB': 30, 'LOOP__PLS': 100, 'CALIB_PLS': 250, 'SnsLoop': 5, 'IFED': 31, 'CSA_BIAS': 15, 'CSA_Chi2': 0.0, 'CSA_NDF': 0, 'CSA_P0': 0.0, 'CSA_P1': 0.0, 'CSA_P2': 0.0, 'CSA_P0err': 0.0, 'CSA_P1err': 0.0, 'CSA_P2err': 0.0, 'CONF_FAIL_REG': 0, 'N_BROKEN_DISC': 0, 'N_BROKEN_FAST': '[]', 'N_BROKEN_SLOW': '[]', 'P_BROKEN_DISC': 0, 'P_BROKEN_FAST': '[]', 'P_BROKEN_SLOW': '[]', 'ASIC_QA_category': '', 'N_BROKEN_CABLE': 0, 'LIST_OF_BROKEN_CABLES': 0, 'FEB_SN': '6019', 'FEB_TYPE': 8.5, 'FEB_UPLINKS': 5, 'FEB_A': 0, 'FEB_B': 1, 'ADDR_0': '', 'ADDR_1': '', 'ADDR_2': '', 'ADDR_3': '', 'ADDR_4': '', 'ADDR_5': '', 'ADDR_6': '', 'ADDR_7': '', 'SENSOR_ID': '', 'MODULE_NAME': '', 'MODULE_LADDER': '', 'MODULE_MODULE': '', 'MODULE_SIZE': '', 'MODULE_GRADE': '', 'MODULE_TYPE': '', 'VI_bInit': ['2.800', '1.6600', '2.204', '2.2480', '0.000', '0.0000', '7.000', '1.5960'], 'VI_aInit': ['0', '0', '0', '0', '0', '0'], 'VI_atEnd': ['0', '0', '0', '0', '0', '0'], 'AMP_CAL': 110, 'PlsLoop': 3, 'N_ANA_PRESENT': 'Analog response OK', 'N_DISC_FAIL_CH': 0, 'N_ANA_FAIL_CH': '0', 'P_ANA_PRESENT': 'Analog response OK', 'P_DISC_FAIL_CH': 0, 'P_ANA_FAIL_CH': '0'}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 15, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 15, 'AMP_CAL': 110, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 15, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-ASIC
TEST_DATE : 2023_11_29-10_37_32
OPERATOR : Alois Alzheimer
SITE : KIT
SETUP : KIT_TEST_SETUP_1
Set-ID :
---------------------------------------
MODULE_NAME :
FEB_SN : 6019
FEB_TYPE : 8.5
FEB_UPLINKS : 5
FEB_A : 0
FEB_B : 1
---------------------------------------
MODULE_NAME
---------------------------------------
VI_before_Init : ['2.800', '1.6600', '2.204', '2.2480', '0.000', '0.0000', '7.000', '1.5960']
VI_after__Init : ['2.800', '1.9800', '2.200', '0.3202', '0.000', '0.0000', '7.000', '1.6010']
VI_at__the_End : ['2.800', '1.9800', '2.200', '0.3202', '0.000', '0.0000', '7.000', '1.6010']
10:39:50:ST3_Shared:INFO: /home/cbm/public_html/KIT_LogDir//FEB/FEB_6019/TestDate_2023_11_29-10_37_32/