TEST_NAME : Wafer
TEST_DATE : 24_09_03-08_45_34
OPERATOR  : Carmen S.; Irakli K.; 
SITE : GSI | SETUP : WAFER_TEST_SETUP
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ASIC_CONFIG_PARAMETERS
  HW_ADDR : 0x7 | VERS_NO : 2.1
  ASIC_ID : XA-000-09-004-019-003-014-04 | FUSED_ID : 6359364768392818916
  IC_TEMP :  362.97 | VDDM :  -11.95 | AUX_INT :  -11.95 | CsaBias :  -11.95
  CONF_FAIL_REG : 4369
  CSA_BIAS : 5
  THR2_GLB : 30
  ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
  ADC_Chi2/NDF : 0.00000e+00 / 2
  ADC_P0  : -1.19458e-02 ± 4.69134e-02
  ADC_P1  : 8.83865e-03 ± 1.16050e-03
  ADC_P2  : -8.04493e-06 ± 5.64508e-06
  CSA_Chi2/NDF : 1.25935e-09 / 2
  CSA_P0  : 1.18291e-01 ± 2.36699e-05
  CSA_P1  : 2.38572e-06 ± 1.78335e-06
  CSA_P2  : -5.76965e-08 ± 2.71583e-08
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ASIC_TEST_PARAMETERS
AMP_CAL : 250
   N_BROKEN_DISC :  164
 | N_BROKEN_FAST :  [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 19, 20, 27, 28, 30, 31, 34, 35, 40, 50, 54, 55, 56, 57, 58, 59, 60, 63, 72, 76, 82, 86, 87, 90, 92, 93, 95, 100, 101, 103, 105, 107, 109, 110, 113, 114, 116, 117, 118, 119, 121, 123, 126]
 | N_BROKEN_SLOW :  [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 25, 26, 28, 30, 32, 33, 34, 35, 36, 37, 40, 41, 44, 45, 46, 47, 48, 50, 51, 52, 53, 54, 56, 58, 60, 61, 62, 63, 64, 66, 68, 69, 70, 71, 73, 74, 75, 76, 77, 78, 80, 82, 83, 84, 85, 86, 88, 89, 90, 92, 94, 95, 96, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 124, 126]
   P_BROKEN_DISC :  166
 | P_BROKEN_FAST :  [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 19, 20, 21, 22, 23, 24, 29, 30, 35, 41, 42, 47, 48, 50, 51, 54, 55, 57, 58, 61, 62, 63, 67, 77, 78, 81, 82, 83, 86, 88, 91, 92, 93, 94, 95, 98, 102, 103, 105, 106, 110, 111, 114, 117, 118, 119, 121, 122, 125]
 | P_BROKEN_SLOW :  [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 28, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 50, 51, 52, 53, 54, 56, 57, 58, 60, 62, 65, 66, 67, 69, 70, 71, 73, 74, 75, 78, 79, 81, 82, 85, 86, 87, 88, 90, 91, 92, 95, 98, 99, 101, 102, 103, 104, 105, 106, 108, 110, 111, 112, 113, 114, 115, 116, 117, 118, 120, 121, 122, 123, 124, 125]
ASIC_QA_category :  NOT READY for MODULE ASSEMBLY
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VI_before_Init : ['1.202', '0.1183', '1.800', '0.1481', '1.800', '0.0814', '7.000', '0.7072', 1, 1, 1, 1, 1725345934.3804379]
VI_after__Init : ['1.202', '0.1183', '1.800', '0.1478', '1.800', '0.0761', '7.000', '0.7072', 1, 1, 1, 1, 1725345942.4128473]
VI_at__the_End : ['1.202', '0.1183', '1.800', '0.1472', '1.808', '0.0808', '7.000', '0.7081', 1, 1, 1, 1, 1725346005.99893]