TEST_NAME : Wafer
TEST_DATE : 24_10_11-13_39_21
OPERATOR  : Oleksandr S.; Irakli K.; 
SITE : GSI | SETUP : WAFER_TEST_SETUP
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ASIC_CONFIG_PARAMETERS
  HW_ADDR : 0x7 | VERS_NO : 2.2
  ASIC_ID : XA-000-09-004-043-003-010-03 | FUSED_ID : 6359364768417984675
  IC_TEMP :  -82.48 | VDDM : 1117.59 | AUX_INT :   -8.73 | CsaBias :   76.87
  CONF_FAIL_REG : 0
  CSA_BIAS : 5
  THR2_GLB : 30
  ADC_VREF_P : 58 | ADC_VREF_N : 30 | ADC_VREF_T : 128 | ADC_VREF_TR : 122
  ADC_Chi2/NDF : 1.42728e-03 / 2
  ADC_P0  : -8.73175e-03 ± 2.55847e-02
  ADC_P1  : 8.62192e-03 ± 6.39692e-04
  ADC_P2  : -6.21506e-06 ± 3.18962e-06
  CSA_Chi2/NDF : 2.21606e-04 / 2
  CSA_P0  : 5.58785e-02 ± 9.92918e-03
  CSA_P1  : 1.02552e-02 ± 7.48092e-04
  CSA_P2  : -6.01842e-05 ± 1.13926e-05
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ASIC_TEST_PARAMETERS
AMP_CAL : 250
   N_BROKEN_DISC :  255
 | N_BROKEN_FAST :  [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
 | N_BROKEN_SLOW :  [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
   P_BROKEN_DISC :  255
 | P_BROKEN_FAST :  [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
 | P_BROKEN_SLOW :  [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127]
ASIC_QA_category :  NOT READY for MODULE ASSEMBLY
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VI_before_Init : ['1.202', '0.4145', '1.800', '0.1443', '1.800', '0.0992', '7.000', '0.7072', 1, 1, 1, 1, 1728646761.5398302]
VI_after__Init : ['1.202', '0.4162', '1.799', '0.1451', '1.800', '0.0946', '7.000', '0.7071', 1, 1, 1, 1, 1728646769.5663376]
VI_at__the_End : ['1.202', '0.4581', '1.800', '0.1333', '1.800', '0.1247', '7.000', '0.7086', 1, 1, 1, 1, 1728646830.0683215]