exploder_bl Project Status (07/03/2023 - 21:47:24)
Project File: exploder_bl.xise Parser Errors: No Errors
Module Name: exploder_bl Implementation State: Programming File Generated
Target Device: xc6slx150t-3csg484
  • Errors:
No Errors
Product Version:ISE 14.7
  • Warnings:
891 Warnings (1 new)
Design Goal: Balanced
  • Routing Results:
All Signals Completely Routed
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
All Constraints Met
Environment: System Settings
  • Final Timing Score:
0  (Timing Report)
 
Device Utilization Summary [-]
Slice Logic UtilizationUsedAvailableUtilizationNote(s)
Number of Slice Registers 2,021 184,304 1%  
    Number used as Flip Flops 2,021      
    Number used as Latches 0      
    Number used as Latch-thrus 0      
    Number used as AND/OR logics 0      
Number of Slice LUTs 1,877 92,152 2%  
    Number used as logic 1,524 92,152 1%  
        Number using O6 output only 790      
        Number using O5 output only 268      
        Number using O5 and O6 466      
        Number used as ROM 0      
    Number used as Memory 194 21,680 1%  
        Number used as Dual Port RAM 0      
        Number used as Single Port RAM 0      
        Number used as Shift Register 194      
            Number using O6 output only 22      
            Number using O5 output only 0      
            Number using O5 and O6 172      
    Number used exclusively as route-thrus 159      
        Number with same-slice register load 110      
        Number with same-slice carry load 49      
        Number with other load 0      
Number of occupied Slices 692 23,038 3%  
Number of MUXCYs used 880 46,076 1%  
Number of LUT Flip Flop pairs used 2,089      
    Number with an unused Flip Flop 569 2,089 27%  
    Number with an unused LUT 212 2,089 10%  
    Number of fully used LUT-FF pairs 1,308 2,089 62%  
    Number of unique control sets 67      
    Number of slice register sites lost
        to control set restrictions
261 184,304 1%  
Number of bonded IOBs 49 296 16%  
    Number of LOCed IOBs 49 49 100%  
    IOB Flip Flops 7      
Number of RAMB16BWERs 0 268 0%  
Number of RAMB8BWERs 0 536 0%  
Number of BUFIO2/BUFIO2_2CLKs 1 32 3%  
    Number used as BUFIO2s 1      
    Number used as BUFIO2_2CLKs 0      
Number of BUFIO2FB/BUFIO2FB_2CLKs 0 32 0%  
Number of BUFG/BUFGMUXs 12 16 75%  
    Number used as BUFGs 9      
    Number used as BUFGMUX 3      
Number of DCM/DCM_CLKGENs 0 12 0%  
Number of ILOGIC2/ISERDES2s 0 586 0%  
Number of IODELAY2/IODRP2/IODRP2_MCBs 0 586 0%  
Number of OLOGIC2/OSERDES2s 7 586 1%  
    Number used as OLOGIC2s 7      
    Number used as OSERDES2s 0      
Number of BSCANs 0 4 0%  
Number of BUFHs 0 384 0%  
Number of BUFPLLs 0 8 0%  
Number of BUFPLL_MCBs 0 4 0%  
Number of DSP48A1s 0 180 0%  
Number of GTPA1_DUALs 0 2 0%  
Number of ICAPs 0 1 0%  
Number of MCBs 0 4 0%  
Number of PCIE_A1s 0 1 0%  
Number of PCILOGICSEs 0 2 0%  
Number of PLL_ADVs 4 6 66%  
Number of PMVs 0 1 0%  
Number of STARTUPs 0 1 0%  
Number of SUSPEND_SYNCs 0 1 0%  
Average Fanout of Non-Clock Nets 2.67      
 
Performance Summary [-]
Final Timing Score: 0 (Setup: 0, Hold: 0, Component Switching Limit: 0) Pinout Data: Pinout Report
Routing Results: All Signals Completely Routed Clock Data: Clock Report
Timing Constraints: All Constraints Met    
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis ReportCurrentMo. Jul 3 21:45:50 20230838 Warnings (0 new)91 Infos (1 new)
Translation ReportCurrentMo. Jul 3 21:45:53 202301 Warning (0 new)16 Infos (0 new)
Map ReportCurrentMo. Jul 3 21:46:33 2023052 Warnings (1 new)32 Infos (0 new)
Place and Route ReportCurrentMo. Jul 3 21:46:52 2023001 Info (0 new)
Power Report     
Post-PAR Static Timing ReportCurrentMo. Jul 3 21:46:57 2023004 Infos (0 new)
Bitgen ReportCurrentMo. Jul 3 21:47:23 2023000
 
Secondary Reports [-]
Report NameStatusGenerated
Post-Map Static Timing ReportOut of DateDo. Mai 4 00:57:38 2023
Physical Synthesis ReportCurrentMo. Jul 3 21:46:33 2023
WebTalk ReportOut of DateFr. Mrz 10 22:04:25 2023
WebTalk Log FileCurrentMo. Jul 3 21:47:24 2023

Date Generated: 07/03/2023 - 21:47:24