FEB_1542    29.05.26 10:27:12

Info
            10:27:12:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:27:12:ST3_Shared:INFO:	                       FEB-Microcable                       
10:27:12:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:27:12:febtest:INFO:	Testing FEB with SN 1542
==============================================OOO==============================================
10:27:13:smx_tester:INFO:	Scanning setup
10:27:13:elinks:INFO:	Disabling clock on downlink 0
10:27:13:elinks:INFO:	Disabling clock on downlink 1
10:27:13:elinks:INFO:	Disabling clock on downlink 2
10:27:13:elinks:INFO:	Disabling clock on downlink 3
10:27:13:elinks:INFO:	Disabling clock on downlink 4
10:27:13:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:27:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
10:27:13:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:27:13:elinks:INFO:	Disabling clock on downlink 0
10:27:13:elinks:INFO:	Disabling clock on downlink 1
10:27:13:elinks:INFO:	Disabling clock on downlink 2
10:27:13:elinks:INFO:	Disabling clock on downlink 3
10:27:13:elinks:INFO:	Disabling clock on downlink 4
10:27:13:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:27:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:27:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
10:27:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
10:27:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
10:27:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
10:27:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
10:27:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
10:27:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
10:27:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
10:27:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
10:27:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
10:27:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
10:27:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
10:27:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
10:27:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
10:27:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
10:27:14:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
10:27:14:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:27:14:elinks:INFO:	Disabling clock on downlink 0
10:27:14:elinks:INFO:	Disabling clock on downlink 1
10:27:14:elinks:INFO:	Disabling clock on downlink 2
10:27:14:elinks:INFO:	Disabling clock on downlink 3
10:27:14:elinks:INFO:	Disabling clock on downlink 4
10:27:14:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:27:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
10:27:14:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:27:14:elinks:INFO:	Disabling clock on downlink 0
10:27:14:elinks:INFO:	Disabling clock on downlink 1
10:27:14:elinks:INFO:	Disabling clock on downlink 2
10:27:14:elinks:INFO:	Disabling clock on downlink 3
10:27:14:elinks:INFO:	Disabling clock on downlink 4
10:27:14:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:27:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
10:27:14:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
10:27:14:elinks:INFO:	Disabling clock on downlink 0
10:27:14:elinks:INFO:	Disabling clock on downlink 1
10:27:14:elinks:INFO:	Disabling clock on downlink 2
10:27:14:elinks:INFO:	Disabling clock on downlink 3
10:27:14:elinks:INFO:	Disabling clock on downlink 4
10:27:14:setup_element:INFO:	Checking SOS, encoding_mode: SOS
10:27:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
10:27:14:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
==============================================OOO==============================================
10:27:14:setup_element:INFO:	Scanning clock phase
10:27:14:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:27:14:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:27:14:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
10:27:14:setup_element:INFO:	Eye window for uplink 0 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:27:14:setup_element:INFO:	Eye window for uplink 1 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:27:14:setup_element:INFO:	Eye window for uplink 2 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:27:14:setup_element:INFO:	Eye window for uplink 3 : ______________________________________________________________________XXXXXXXXX_
Clock Delay: 34
10:27:14:setup_element:INFO:	Eye window for uplink 4 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:27:14:setup_element:INFO:	Eye window for uplink 5 : ______________________________________________________________________XXXXXXXX__
Clock Delay: 33
10:27:14:setup_element:INFO:	Eye window for uplink 6 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:27:14:setup_element:INFO:	Eye window for uplink 7 : _______________________________________________________________________XXXXXXXX_
Clock Delay: 34
10:27:14:setup_element:INFO:	Eye window for uplink 8 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:27:14:setup_element:INFO:	Eye window for uplink 9 : _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
10:27:14:setup_element:INFO:	Eye window for uplink 10: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:27:14:setup_element:INFO:	Eye window for uplink 11: _____________________________________________________________________XXXXXXXXX__
Clock Delay: 33
10:27:14:setup_element:INFO:	Eye window for uplink 12: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:27:14:setup_element:INFO:	Eye window for uplink 13: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:27:14:setup_element:INFO:	Eye window for uplink 14: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:27:15:setup_element:INFO:	Eye window for uplink 15: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
10:27:15:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 1
==============================================OOO==============================================
10:27:15:setup_element:INFO:	Scanning data phases
10:27:15:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:27:15:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:27:20:setup_element:INFO:	Data phase scan results for group 0, downlink 1
10:27:20:setup_element:INFO:	Eye window for uplink 0 : _______________XXXXXX___________________
Data delay found: 37
10:27:20:setup_element:INFO:	Eye window for uplink 1 : _____________XXXXXX_____________________
Data delay found: 35
10:27:20:setup_element:INFO:	Eye window for uplink 2 : ____________XXXXX_______________________
Data delay found: 34
10:27:20:setup_element:INFO:	Eye window for uplink 3 : ____________XXXXXX______________________
Data delay found: 34
10:27:20:setup_element:INFO:	Eye window for uplink 4 : ___________XXXXXX_______________________
Data delay found: 33
10:27:20:setup_element:INFO:	Eye window for uplink 5 : _________XXXXX__________________________
Data delay found: 31
10:27:20:setup_element:INFO:	Eye window for uplink 6 : ____XXXXXX______________________________
Data delay found: 26
10:27:20:setup_element:INFO:	Eye window for uplink 7 : __XXXXXX________________________________
Data delay found: 24
10:27:20:setup_element:INFO:	Eye window for uplink 8 : _____________XXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 6
10:27:20:setup_element:INFO:	Eye window for uplink 9 : X____________XXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 6
10:27:20:setup_element:INFO:	Eye window for uplink 10: X_________________________________XXXXXX
Data delay found: 17
10:27:20:setup_element:INFO:	Eye window for uplink 11: XX_________________________________XXXXX
Data delay found: 18
10:27:20:setup_element:INFO:	Eye window for uplink 12: ________________________________XXXXX___
Data delay found: 14
10:27:20:setup_element:INFO:	Eye window for uplink 13: ________________________________XXXXXX__
Data delay found: 14
10:27:20:setup_element:INFO:	Eye window for uplink 14: _________________________________XXXX___
Data delay found: 14
10:27:20:setup_element:INFO:	Eye window for uplink 15: __________________________________XXXX__
Data delay found: 15
10:27:20:setup_element:INFO:	Setting the data phase to 37 for uplink 0
10:27:20:setup_element:INFO:	Setting the data phase to 35 for uplink 1
10:27:20:setup_element:INFO:	Setting the data phase to 34 for uplink 2
10:27:20:setup_element:INFO:	Setting the data phase to 34 for uplink 3
10:27:20:setup_element:INFO:	Setting the data phase to 33 for uplink 4
10:27:20:setup_element:INFO:	Setting the data phase to 31 for uplink 5
10:27:20:setup_element:INFO:	Setting the data phase to 26 for uplink 6
10:27:20:setup_element:INFO:	Setting the data phase to 24 for uplink 7
10:27:20:setup_element:INFO:	Setting the data phase to 6 for uplink 8
10:27:20:setup_element:INFO:	Setting the data phase to 6 for uplink 9
10:27:20:setup_element:INFO:	Setting the data phase to 17 for uplink 10
10:27:20:setup_element:INFO:	Setting the data phase to 18 for uplink 11
10:27:20:setup_element:INFO:	Setting the data phase to 14 for uplink 12
10:27:20:setup_element:INFO:	Setting the data phase to 14 for uplink 13
10:27:20:setup_element:INFO:	Setting the data phase to 14 for uplink 14
10:27:20:setup_element:INFO:	Setting the data phase to 15 for uplink 15
==============================================OOO==============================================
10:27:20:setup_element:INFO:	Beginning SMX ASICs map scan
10:27:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:27:20:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:27:20:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
10:27:20:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
10:27:20:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:27:20:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:27:20:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
10:27:20:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:27:20:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:27:20:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:27:20:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:27:21:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:27:21:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:27:21:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:27:21:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:27:21:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:27:21:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:27:21:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:27:21:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:27:21:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:27:21:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:27:23:ST3_emu:INFO:	
Setup Element:
  Group: 0
  Downlink: 1
  Uplinks: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
  ASICs Map:
    ASIC address 0x0: (ASIC uplink, uplink): (0, 1), (1, 0)
    ASIC address 0x1: (ASIC uplink, uplink): (0, 8), (1, 9)
    ASIC address 0x2: (ASIC uplink, uplink): (0, 3), (1, 2)
    ASIC address 0x3: (ASIC uplink, uplink): (0, 10), (1, 11)
    ASIC address 0x4: (ASIC uplink, uplink): (0, 5), (1, 4)
    ASIC address 0x5: (ASIC uplink, uplink): (0, 12), (1, 13)
    ASIC address 0x6: (ASIC uplink, uplink): (0, 7), (1, 6)
    ASIC address 0x7: (ASIC uplink, uplink): (0, 14), (1, 15)
  Clock Phase Characteristic:
    Optimal Phase: 33
    Window Length: 70
    Eye Windows:
      Uplink  0: ______________________________________________________________________XXXXXXXXX_
      Uplink  1: ______________________________________________________________________XXXXXXXXX_
      Uplink  2: ______________________________________________________________________XXXXXXXXX_
      Uplink  3: ______________________________________________________________________XXXXXXXXX_
      Uplink  4: ______________________________________________________________________XXXXXXXX__
      Uplink  5: ______________________________________________________________________XXXXXXXX__
      Uplink  6: _______________________________________________________________________XXXXXXXX_
      Uplink  7: _______________________________________________________________________XXXXXXXX_
      Uplink  8: _____________________________________________________________________XXXXXXXX___
      Uplink  9: _____________________________________________________________________XXXXXXXX___
      Uplink 10: _____________________________________________________________________XXXXXXXXX__
      Uplink 11: _____________________________________________________________________XXXXXXXXX__
      Uplink 12: _____________________________________________________________________XXXXXXX____
      Uplink 13: _____________________________________________________________________XXXXXXX____
      Uplink 14: _____________________________________________________________________XXXXXXX____
      Uplink 15: _____________________________________________________________________XXXXXXX____
  Data phase characteristics:
    Uplink 0:
      Optimal Phase: 37
      Window Length: 34
      Eye Window: _______________XXXXXX___________________
    Uplink 1:
      Optimal Phase: 35
      Window Length: 34
      Eye Window: _____________XXXXXX_____________________
    Uplink 2:
      Optimal Phase: 34
      Window Length: 35
      Eye Window: ____________XXXXX_______________________
    Uplink 3:
      Optimal Phase: 34
      Window Length: 34
      Eye Window: ____________XXXXXX______________________
    Uplink 4:
      Optimal Phase: 33
      Window Length: 34
      Eye Window: ___________XXXXXX_______________________
    Uplink 5:
      Optimal Phase: 31
      Window Length: 35
      Eye Window: _________XXXXX__________________________
    Uplink 6:
      Optimal Phase: 26
      Window Length: 34
      Eye Window: ____XXXXXX______________________________
    Uplink 7:
      Optimal Phase: 24
      Window Length: 34
      Eye Window: __XXXXXX________________________________
    Uplink 8:
      Optimal Phase: 6
      Window Length: 13
      Eye Window: _____________XXXXXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 9:
      Optimal Phase: 6
      Window Length: 12
      Eye Window: X____________XXXXXXXXXXXXXXXXXXXXXXXXXXX
    Uplink 10:
      Optimal Phase: 17
      Window Length: 33
      Eye Window: X_________________________________XXXXXX
    Uplink 11:
      Optimal Phase: 18
      Window Length: 33
      Eye Window: XX_________________________________XXXXX
    Uplink 12:
      Optimal Phase: 14
      Window Length: 35
      Eye Window: ________________________________XXXXX___
    Uplink 13:
      Optimal Phase: 14
      Window Length: 34
      Eye Window: ________________________________XXXXXX__
    Uplink 14:
      Optimal Phase: 14
      Window Length: 36
      Eye Window: _________________________________XXXX___
    Uplink 15:
      Optimal Phase: 15
      Window Length: 36
      Eye Window: __________________________________XXXX__

==============================================OOO==============================================
10:27:23:setup_element:INFO:	Performing Elink synchronization
10:27:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
10:27:23:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:27:23:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
10:27:23:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
==============================================OOO==============================================
10:27:23:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
10:27:23:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
==============================================OOO==============================================
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
10:27:24:febtest:INFO:	Init all SMX (CSA): 30
10:27:37:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:27:37:febtest:INFO:	01-00 | XA-000-09-004-031-012-008-04 |  18.7 | 1218.6
10:27:38:febtest:INFO:	08-01 | XA-000-09-004-031-015-008-10 |  28.2 | 1177.4
10:27:38:febtest:INFO:	03-02 | XA-000-09-004-031-009-008-15 |  31.4 | 1171.5
10:27:38:febtest:INFO:	10-03 | XA-000-09-004-031-018-009-01 |  34.6 | 1153.7
10:27:38:febtest:INFO:	05-04 | XA-000-09-004-031-006-008-11 |  37.7 | 1159.7
10:27:38:febtest:INFO:	12-05 | XA-000-09-004-031-015-009-10 |   6.1 | 1265.4
10:27:39:febtest:INFO:	07-06 | XA-000-09-004-031-003-008-00 |  37.7 | 1159.7
10:27:39:febtest:INFO:	14-07 | XA-000-09-004-031-003-009-00 |  34.6 | 1159.7
10:27:40:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:27:42:ST3_smx:INFO:	chip: 1-0 	 18.745682 C 	 1230.330540 mV
10:27:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:27:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:27:42:ST3_smx:INFO:		Electrons
10:27:47:ST3_smx:INFO:	Total # of broken channels: 10
10:27:47:ST3_smx:INFO:	List of broken channels: [8, 16, 25, 44, 57, 75, 90, 120, 121, 123]
10:27:47:ST3_smx:INFO:	Total # of broken channels: 0
10:27:47:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:27:49:ST3_smx:INFO:	chip: 8-1 	 28.225000 C 	 1189.190035 mV
10:27:49:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:27:49:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:27:49:ST3_smx:INFO:		Electrons
10:27:53:ST3_smx:INFO:	Total # of broken channels: 8
10:27:53:ST3_smx:INFO:	List of broken channels: [2, 32, 40, 41, 45, 47, 74, 119]
10:27:53:ST3_smx:INFO:	Total # of broken channels: 0
10:27:53:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:27:55:ST3_smx:INFO:	chip: 3-2 	 31.389742 C 	 1183.292940 mV
10:27:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:27:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:27:55:ST3_smx:INFO:		Electrons
10:28:00:ST3_smx:INFO:	Total # of broken channels: 7
10:28:00:ST3_smx:INFO:	List of broken channels: [4, 19, 38, 42, 80, 97, 121]
10:28:00:ST3_smx:INFO:	Total # of broken channels: 9
10:28:00:ST3_smx:INFO:	List of broken channels: [3, 5, 7, 9, 11, 13, 15, 17, 25]
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:28:02:ST3_smx:INFO:	chip: 10-3 	 37.726682 C 	 1165.571835 mV
10:28:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:28:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:28:02:ST3_smx:INFO:		Electrons
10:28:06:ST3_smx:INFO:	Total # of broken channels: 6
10:28:06:ST3_smx:INFO:	List of broken channels: [16, 42, 46, 64, 98, 122]
10:28:06:ST3_smx:INFO:	Total # of broken channels: 0
10:28:06:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:28:08:ST3_smx:INFO:	chip: 5-4 	 37.726682 C 	 1171.483840 mV
10:28:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:28:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:28:08:ST3_smx:INFO:		Electrons
10:28:13:ST3_smx:INFO:	Total # of broken channels: 5
10:28:13:ST3_smx:INFO:	List of broken channels: [6, 29, 35, 85, 106]
10:28:13:ST3_smx:INFO:	Total # of broken channels: 0
10:28:13:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:28:15:ST3_smx:INFO:	chip: 12-5 	 6.141382 C 	 1277.050060 mV
10:28:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:28:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:28:15:ST3_smx:INFO:		Electrons
10:28:19:ST3_smx:INFO:	Total # of broken channels: 6
10:28:19:ST3_smx:INFO:	List of broken channels: [6, 21, 23, 58, 91, 96]
10:28:19:ST3_smx:INFO:	Total # of broken channels: 0
10:28:19:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:28:21:ST3_smx:INFO:	chip: 7-6 	 37.726682 C 	 1171.483840 mV
10:28:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:28:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:28:21:ST3_smx:INFO:		Electrons
10:28:26:ST3_smx:INFO:	Total # of broken channels: 5
10:28:26:ST3_smx:INFO:	List of broken channels: [8, 40, 61, 96, 99]
10:28:26:ST3_smx:INFO:	Total # of broken channels: 0
10:28:26:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:28:28:ST3_smx:INFO:	chip: 14-7 	 37.726682 C 	 1165.571835 mV
10:28:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:28:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
10:28:28:ST3_smx:INFO:		Electrons
10:28:32:ST3_smx:INFO:	Total # of broken channels: 7
10:28:32:ST3_smx:INFO:	List of broken channels: [24, 71, 74, 82, 92, 101, 110]
10:28:32:ST3_smx:INFO:	Total # of broken channels: 0
10:28:32:ST3_smx:INFO:	List of broken channels: []
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
THistPainter::MakeChopt:0: RuntimeWarning: option SCAT is deprecated.
10:28:33:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:28:33:febtest:INFO:	01-00 | XA-000-09-004-031-012-008-04 |  18.7 | 1253.7
10:28:33:febtest:INFO:	08-01 | XA-000-09-004-031-015-008-10 |  31.4 | 1212.7
10:28:33:febtest:INFO:	03-02 | XA-000-09-004-031-009-008-15 |  34.6 | 1206.9
10:28:33:febtest:INFO:	10-03 | XA-000-09-004-031-018-009-01 |  37.7 | 1189.2
10:28:34:febtest:INFO:	05-04 | XA-000-09-004-031-006-008-11 |  40.9 | 1189.2
10:28:34:febtest:INFO:	12-05 | XA-000-09-004-031-015-009-10 |   9.3 | 1300.3
10:28:34:febtest:INFO:	07-06 | XA-000-09-004-031-003-008-00 |  40.9 | 1189.2
10:28:34:febtest:INFO:	14-07 | XA-000-09-004-031-003-009-00 |  37.7 | 1189.2
{'CSA_FRONT': 55, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 55, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 55, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 55, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 55, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 55, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 55, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 55, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 55, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 55, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 55, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 55, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 55, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 55, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 55, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 55, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 55, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 55, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 55, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 55, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 55, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 55, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 55, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 55, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_05_29-10_27_12
OPERATOR  : Robert V.; 
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 1542| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
AMP_MODE : STS
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.4550', '1.849', '2.7380', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9590', '1.850', '2.3890', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9800', '1.850', '0.5202', '0.000', '0.0000', '0.000', '0.0000']