FEB_3311 15.01.26 14:34:26
Info
14:34:26:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:34:26:ST3_Shared:INFO: FEB-Microcable
14:34:26:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:34:27:febtest:INFO: Testing FEB with SN 3311
14:34:28:smx_tester:INFO: Scanning setup
14:34:28:elinks:INFO: Disabling clock on downlink 0
14:34:28:elinks:INFO: Disabling clock on downlink 1
14:34:28:elinks:INFO: Disabling clock on downlink 2
14:34:28:elinks:INFO: Disabling clock on downlink 3
14:34:28:elinks:INFO: Disabling clock on downlink 4
14:34:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:34:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:34:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:34:28:elinks:INFO: Disabling clock on downlink 0
14:34:28:elinks:INFO: Disabling clock on downlink 1
14:34:28:elinks:INFO: Disabling clock on downlink 2
14:34:28:elinks:INFO: Disabling clock on downlink 3
14:34:28:elinks:INFO: Disabling clock on downlink 4
14:34:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:34:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:34:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
14:34:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
14:34:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
14:34:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
14:34:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
14:34:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
14:34:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
14:34:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
14:34:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:34:28:elinks:INFO: Disabling clock on downlink 0
14:34:28:elinks:INFO: Disabling clock on downlink 1
14:34:28:elinks:INFO: Disabling clock on downlink 2
14:34:28:elinks:INFO: Disabling clock on downlink 3
14:34:28:elinks:INFO: Disabling clock on downlink 4
14:34:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:34:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:34:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:34:29:elinks:INFO: Disabling clock on downlink 0
14:34:29:elinks:INFO: Disabling clock on downlink 1
14:34:29:elinks:INFO: Disabling clock on downlink 2
14:34:29:elinks:INFO: Disabling clock on downlink 3
14:34:29:elinks:INFO: Disabling clock on downlink 4
14:34:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:34:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:34:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:34:29:elinks:INFO: Disabling clock on downlink 0
14:34:29:elinks:INFO: Disabling clock on downlink 1
14:34:29:elinks:INFO: Disabling clock on downlink 2
14:34:29:elinks:INFO: Disabling clock on downlink 3
14:34:29:elinks:INFO: Disabling clock on downlink 4
14:34:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:34:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:34:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:34:29:setup_element:INFO: Scanning clock phase
14:34:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:34:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:34:29:setup_element:INFO: Clock phase scan results for group 0, downlink 1
14:34:29:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:34:29:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:34:29:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:34:29:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:34:29:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:34:29:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXXX__
Clock Delay: 34
14:34:29:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:34:29:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:34:29:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
14:34:29:setup_element:INFO: Scanning data phases
14:34:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:34:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:34:34:setup_element:INFO: Data phase scan results for group 0, downlink 1
14:34:34:setup_element:INFO: Eye window for uplink 8 : ______________________________XXXXXX____
Data delay found: 12
14:34:34:setup_element:INFO: Eye window for uplink 9 : _________________________________XXXXX__
Data delay found: 15
14:34:34:setup_element:INFO: Eye window for uplink 10: X__________________________________XXXXX
Data delay found: 17
14:34:34:setup_element:INFO: Eye window for uplink 11: XX__________________________________XXXX
Data delay found: 18
14:34:34:setup_element:INFO: Eye window for uplink 12: __________________________________XXXX__
Data delay found: 15
14:34:34:setup_element:INFO: Eye window for uplink 13: __________________________________XXXX__
Data delay found: 15
14:34:34:setup_element:INFO: Eye window for uplink 14: ________________________________XXXX____
Data delay found: 13
14:34:34:setup_element:INFO: Eye window for uplink 15: ________________________________XXXXX___
Data delay found: 14
14:34:34:setup_element:INFO: Setting the data phase to 12 for uplink 8
14:34:34:setup_element:INFO: Setting the data phase to 15 for uplink 9
14:34:34:setup_element:INFO: Setting the data phase to 17 for uplink 10
14:34:34:setup_element:INFO: Setting the data phase to 18 for uplink 11
14:34:34:setup_element:INFO: Setting the data phase to 15 for uplink 12
14:34:34:setup_element:INFO: Setting the data phase to 15 for uplink 13
14:34:34:setup_element:INFO: Setting the data phase to 13 for uplink 14
14:34:34:setup_element:INFO: Setting the data phase to 14 for uplink 15
14:34:34:setup_element:INFO: Beginning SMX ASICs map scan
14:34:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:34:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:34:34:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:34:34:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:34:34:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
14:34:34:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:34:34:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:34:35:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:34:35:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:34:35:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:34:35:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:34:35:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:34:35:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:34:37:setup_element:INFO: Performing Elink synchronization
14:34:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:34:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:34:37:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:34:37:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:34:37:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
14:34:37:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:34:37:febtest:INFO: Init all SMX (CSA): 30
14:34:44:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:34:45:febtest:INFO: 08-01 | XA-000-09-004-023-004-013-07 | 34.6 | 1165.6
14:34:45:febtest:INFO: 10-03 | XA-000-09-004-026-003-017-04 | 40.9 | 1153.7
14:34:45:febtest:INFO: 12-05 | XA-000-09-004-026-003-018-04 | 37.7 | 1147.8
14:34:45:febtest:INFO: 14-07 | XA-000-09-004-026-006-018-15 | 37.7 | 1147.8
14:34:46:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:34:48:ST3_smx:INFO: chip: 8-1 34.556970 C 1177.390875 mV
14:34:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:48:ST3_smx:INFO: Electrons
14:34:48:ST3_smx:INFO: # loops 0
14:34:50:ST3_smx:INFO: # loops 1
14:34:52:ST3_smx:INFO: # loops 2
14:34:53:ST3_smx:INFO: Total # of broken channels: 0
14:34:53:ST3_smx:INFO: List of broken channels: []
14:34:53:ST3_smx:INFO: Total # of broken channels: 0
14:34:53:ST3_smx:INFO: List of broken channels: []
14:34:55:ST3_smx:INFO: chip: 10-3 40.898880 C 1165.571835 mV
14:34:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:55:ST3_smx:INFO: Electrons
14:34:55:ST3_smx:INFO: # loops 0
14:34:56:ST3_smx:INFO: # loops 1
14:34:58:ST3_smx:INFO: # loops 2
14:34:59:ST3_smx:INFO: Total # of broken channels: 0
14:34:59:ST3_smx:INFO: List of broken channels: []
14:34:59:ST3_smx:INFO: Total # of broken channels: 0
14:34:59:ST3_smx:INFO: List of broken channels: []
14:35:01:ST3_smx:INFO: chip: 12-5 37.726682 C 1159.654860 mV
14:35:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:01:ST3_smx:INFO: Electrons
14:35:01:ST3_smx:INFO: # loops 0
14:35:03:ST3_smx:INFO: # loops 1
14:35:04:ST3_smx:INFO: # loops 2
14:35:06:ST3_smx:INFO: Total # of broken channels: 0
14:35:06:ST3_smx:INFO: List of broken channels: []
14:35:06:ST3_smx:INFO: Total # of broken channels: 0
14:35:06:ST3_smx:INFO: List of broken channels: []
14:35:08:ST3_smx:INFO: chip: 14-7 40.898880 C 1159.654860 mV
14:35:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:08:ST3_smx:INFO: Electrons
14:35:08:ST3_smx:INFO: # loops 0
14:35:09:ST3_smx:INFO: # loops 1
14:35:11:ST3_smx:INFO: # loops 2
14:35:13:ST3_smx:INFO: Total # of broken channels: 0
14:35:13:ST3_smx:INFO: List of broken channels: []
14:35:13:ST3_smx:INFO: Total # of broken channels: 0
14:35:13:ST3_smx:INFO: List of broken channels: []
14:35:13:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:35:13:febtest:INFO: 08-01 | XA-000-09-004-023-004-013-07 | 34.6 | 1201.0
14:35:14:febtest:INFO: 10-03 | XA-000-09-004-026-003-017-04 | 40.9 | 1189.2
14:35:14:febtest:INFO: 12-05 | XA-000-09-004-026-003-018-04 | 40.9 | 1177.4
14:35:14:febtest:INFO: 14-07 | XA-000-09-004-026-006-018-15 | 40.9 | 1177.4
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_01_15-14_34_26
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3311| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '0.7698', '1.850', '1.3630', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '0.9804', '1.850', '1.1470', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.0020', '1.850', '0.2642', '0.000', '0.0000', '0.000', '0.0000']