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FEB_3320 17.12.25 07:47:27
Info
07:47:27:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:47:27:ST3_Shared:INFO: FEB-Microcable
07:47:27:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:47:27:febtest:INFO: Testing FEB with SN 3320
07:47:28:smx_tester:INFO: Scanning setup
07:47:28:elinks:INFO: Disabling clock on downlink 0
07:47:28:elinks:INFO: Disabling clock on downlink 1
07:47:28:elinks:INFO: Disabling clock on downlink 2
07:47:28:elinks:INFO: Disabling clock on downlink 3
07:47:28:elinks:INFO: Disabling clock on downlink 4
07:47:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:47:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:47:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:47:28:elinks:INFO: Disabling clock on downlink 0
07:47:28:elinks:INFO: Disabling clock on downlink 1
07:47:28:elinks:INFO: Disabling clock on downlink 2
07:47:28:elinks:INFO: Disabling clock on downlink 3
07:47:28:elinks:INFO: Disabling clock on downlink 4
07:47:28:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:47:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:47:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
07:47:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
07:47:28:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
07:47:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
07:47:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
07:47:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
07:47:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
07:47:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
07:47:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
07:47:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
07:47:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
07:47:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
07:47:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
07:47:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
07:47:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
07:47:29:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
07:47:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:47:29:elinks:INFO: Disabling clock on downlink 0
07:47:29:elinks:INFO: Disabling clock on downlink 1
07:47:29:elinks:INFO: Disabling clock on downlink 2
07:47:29:elinks:INFO: Disabling clock on downlink 3
07:47:29:elinks:INFO: Disabling clock on downlink 4
07:47:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:47:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:47:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:47:29:elinks:INFO: Disabling clock on downlink 0
07:47:29:elinks:INFO: Disabling clock on downlink 1
07:47:29:elinks:INFO: Disabling clock on downlink 2
07:47:29:elinks:INFO: Disabling clock on downlink 3
07:47:29:elinks:INFO: Disabling clock on downlink 4
07:47:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:47:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:47:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:47:29:elinks:INFO: Disabling clock on downlink 0
07:47:29:elinks:INFO: Disabling clock on downlink 1
07:47:29:elinks:INFO: Disabling clock on downlink 2
07:47:29:elinks:INFO: Disabling clock on downlink 3
07:47:29:elinks:INFO: Disabling clock on downlink 4
07:47:29:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:47:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:47:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:47:29:setup_element:INFO: Scanning clock phase
07:47:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:47:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:47:29:setup_element:INFO: Clock phase scan results for group 0, downlink 1
07:47:29:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________________
Clock Delay: 40
07:47:29:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________________
Clock Delay: 40
07:47:29:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________________
Clock Delay: 40
07:47:29:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________________
Clock Delay: 40
07:47:29:setup_element:INFO: Eye window for uplink 4 : ______________________________________________________________XXXXXXX___________
Clock Delay: 25
07:47:29:setup_element:INFO: Eye window for uplink 5 : ______________________________________________________________XXXXXXX___________
Clock Delay: 25
07:47:29:setup_element:INFO: Eye window for uplink 6 : _____________________________________________________________XXXXXXXX___________
Clock Delay: 24
07:47:29:setup_element:INFO: Eye window for uplink 7 : _____________________________________________________________XXXXXXXX___________
Clock Delay: 24
07:47:29:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________XXXXXXX___________
Clock Delay: 25
07:47:29:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________XXXXXXX___________
Clock Delay: 25
07:47:29:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________XXXXXXX___________
Clock Delay: 25
07:47:29:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________XXXXXXX___________
Clock Delay: 25
07:47:29:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________XXXXXXX____________
Clock Delay: 24
07:47:29:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________XXXXXXX____________
Clock Delay: 24
07:47:29:setup_element:INFO: Eye window for uplink 14: ____________________________________________________________XXXXXXXXX___________
Clock Delay: 24
07:47:29:setup_element:INFO: Eye window for uplink 15: ____________________________________________________________XXXXXXXXX___________
Clock Delay: 24
07:47:29:setup_element:INFO: Setting the clock phase to 24 for group 0, downlink 1
07:47:29:setup_element:INFO: Scanning data phases
07:47:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:47:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:47:34:setup_element:INFO: Data phase scan results for group 0, downlink 1
07:47:34:setup_element:INFO: Eye window for uplink 0 : _______________________XXXXXXXXXXX______
Data delay found: 8
07:47:34:setup_element:INFO: Eye window for uplink 1 : ___________________XXXXXXXXXXXX_________
Data delay found: 4
07:47:34:setup_element:INFO: Eye window for uplink 2 : ____________X_XXXXXXXX__________________
Data delay found: 36
07:47:34:setup_element:INFO: Eye window for uplink 3 : ___________XXXXXXXXXXX__________________
Data delay found: 36
07:47:34:setup_element:INFO: Eye window for uplink 4 : __________XXXXXXXX______________________
Data delay found: 33
07:47:34:setup_element:INFO: Eye window for uplink 5 : _________XXXXXXXX_______________________
Data delay found: 32
07:47:34:setup_element:INFO: Eye window for uplink 6 : ______XXXXXXX___________________________
Data delay found: 29
07:47:34:setup_element:INFO: Eye window for uplink 7 : XXXXXXXXXXXXX___________________________
Data delay found: 26
07:47:34:setup_element:INFO: Eye window for uplink 8 : X_______________________________XXXXXXXX
Data delay found: 16
07:47:34:setup_element:INFO: Eye window for uplink 9 : XXXX_______________________________XXXXX
Data delay found: 19
07:47:34:setup_element:INFO: Eye window for uplink 10: XXX_______________________________XXXXXX
Data delay found: 18
07:47:34:setup_element:INFO: Eye window for uplink 11: XXXX______________________________XXXXXX
Data delay found: 18
07:47:34:setup_element:INFO: Eye window for uplink 12: XXX_______________________________X_XXXX
Data delay found: 18
07:47:34:setup_element:INFO: Eye window for uplink 13: XXX________________________________XXXXX
Data delay found: 18
07:47:34:setup_element:INFO: Eye window for uplink 14: XXXX_______________________________XXXXX
Data delay found: 19
07:47:34:setup_element:INFO: Eye window for uplink 15: XXXX______________________________XXXXXX
Data delay found: 18
07:47:34:setup_element:INFO: Setting the data phase to 8 for uplink 0
07:47:34:setup_element:INFO: Setting the data phase to 4 for uplink 1
07:47:34:setup_element:INFO: Setting the data phase to 36 for uplink 2
07:47:34:setup_element:INFO: Setting the data phase to 36 for uplink 3
07:47:34:setup_element:INFO: Setting the data phase to 33 for uplink 4
07:47:34:setup_element:INFO: Setting the data phase to 32 for uplink 5
07:47:34:setup_element:INFO: Setting the data phase to 29 for uplink 6
07:47:34:setup_element:INFO: Setting the data phase to 26 for uplink 7
07:47:34:setup_element:INFO: Setting the data phase to 16 for uplink 8
07:47:34:setup_element:INFO: Setting the data phase to 19 for uplink 9
07:47:34:setup_element:INFO: Setting the data phase to 18 for uplink 10
07:47:34:setup_element:INFO: Setting the data phase to 18 for uplink 11
07:47:34:setup_element:INFO: Setting the data phase to 18 for uplink 12
07:47:34:setup_element:INFO: Setting the data phase to 18 for uplink 13
07:47:34:setup_element:INFO: Setting the data phase to 19 for uplink 14
07:47:34:setup_element:INFO: Setting the data phase to 18 for uplink 15
07:47:34:setup_element:INFO: Beginning SMX ASICs map scan
07:47:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:47:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:47:35:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:47:35:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:47:35:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
07:47:35:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
07:47:35:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
07:47:35:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
07:47:35:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
07:47:35:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
07:47:35:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
07:47:35:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
07:47:35:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
07:47:35:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
07:47:35:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
07:47:35:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
07:47:35:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
07:47:36:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
07:47:36:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
07:47:36:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
07:47:36:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
07:47:37:setup_element:INFO: Performing Elink synchronization
07:47:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:47:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:47:37:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:47:37:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:47:37:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
07:47:37:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
07:47:38:febtest:INFO: Init all SMX (CSA): 30
07:47:54:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:47:54:febtest:INFO: 01-00 | XA-000-09-004-026-017-010-12 | 18.7 | 1212.7
07:47:54:febtest:INFO: 08-01 | XA-000-09-004-026-014-010-04 | 12.4 | 1236.2
07:47:54:febtest:INFO: 03-02 | XA-000-09-004-026-005-010-06 | 34.6 | 1159.7
07:47:55:febtest:INFO: 10-03 | XA-000-09-004-026-007-024-02 | 34.6 | 1159.7
07:47:55:febtest:INFO: 05-04 | XA-000-09-004-026-011-010-15 | 31.4 | 1183.3
07:47:55:febtest:INFO: 12-05 | XA-000-09-004-026-010-024-05 | 34.6 | 1165.6
07:47:55:febtest:INFO: 07-06 | XA-000-09-004-026-008-010-01 | 31.4 | 1171.5
07:47:55:febtest:INFO: 14-07 | XA-000-09-004-026-013-024-13 | 31.4 | 1177.4
07:47:56:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
07:47:58:ST3_smx:INFO: chip: 1-0 18.745682 C 1230.330540 mV
07:47:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:47:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:47:58:ST3_smx:INFO: Electrons
07:47:58:ST3_smx:INFO: # loops 0
07:48:00:ST3_smx:INFO: # loops 1
07:48:02:ST3_smx:INFO: # loops 2
07:48:04:ST3_smx:INFO: Total # of broken channels: 0
07:48:04:ST3_smx:INFO: List of broken channels: []
07:48:04:ST3_smx:INFO: Total # of broken channels: 0
07:48:04:ST3_smx:INFO: List of broken channels: []
07:48:06:ST3_smx:INFO: chip: 8-1 12.438562 C 1253.730060 mV
07:48:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:48:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:48:06:ST3_smx:INFO: Electrons
07:48:06:ST3_smx:INFO: # loops 0
07:48:08:ST3_smx:INFO: # loops 1
07:48:09:ST3_smx:INFO: # loops 2
07:48:11:ST3_smx:INFO: Total # of broken channels: 0
07:48:11:ST3_smx:INFO: List of broken channels: []
07:48:11:ST3_smx:INFO: Total # of broken channels: 0
07:48:11:ST3_smx:INFO: List of broken channels: []
07:48:13:ST3_smx:INFO: chip: 3-2 34.556970 C 1177.390875 mV
07:48:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:48:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:48:13:ST3_smx:INFO: Electrons
07:48:13:ST3_smx:INFO: # loops 0
07:48:14:ST3_smx:INFO: # loops 1
07:48:16:ST3_smx:INFO: # loops 2
07:48:18:ST3_smx:INFO: Total # of broken channels: 0
07:48:18:ST3_smx:INFO: List of broken channels: []
07:48:18:ST3_smx:INFO: Total # of broken channels: 0
07:48:18:ST3_smx:INFO: List of broken channels: []
07:48:20:ST3_smx:INFO: chip: 10-3 34.556970 C 1171.483840 mV
07:48:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:48:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:48:20:ST3_smx:INFO: Electrons
07:48:20:ST3_smx:INFO: # loops 0
07:48:22:ST3_smx:INFO: # loops 1
07:48:23:ST3_smx:INFO: # loops 2
07:48:25:ST3_smx:INFO: Total # of broken channels: 0
07:48:25:ST3_smx:INFO: List of broken channels: []
07:48:25:ST3_smx:INFO: Total # of broken channels: 2
07:48:25:ST3_smx:INFO: List of broken channels: [3, 5]
07:48:27:ST3_smx:INFO: chip: 5-4 31.389742 C 1195.082160 mV
07:48:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:48:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:48:27:ST3_smx:INFO: Electrons
07:48:27:ST3_smx:INFO: # loops 0
07:48:29:ST3_smx:INFO: # loops 1
07:48:30:ST3_smx:INFO: # loops 2
07:48:32:ST3_smx:INFO: Total # of broken channels: 0
07:48:32:ST3_smx:INFO: List of broken channels: []
07:48:32:ST3_smx:INFO: Total # of broken channels: 0
07:48:32:ST3_smx:INFO: List of broken channels: []
07:48:34:ST3_smx:INFO: chip: 12-5 37.726682 C 1183.292940 mV
07:48:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:48:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:48:34:ST3_smx:INFO: Electrons
07:48:34:ST3_smx:INFO: # loops 0
07:48:36:ST3_smx:INFO: # loops 1
07:48:37:ST3_smx:INFO: # loops 2
07:48:39:ST3_smx:INFO: Total # of broken channels: 0
07:48:39:ST3_smx:INFO: List of broken channels: []
07:48:39:ST3_smx:INFO: Total # of broken channels: 0
07:48:39:ST3_smx:INFO: List of broken channels: []
07:48:41:ST3_smx:INFO: chip: 7-6 34.556970 C 1183.292940 mV
07:48:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:48:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:48:41:ST3_smx:INFO: Electrons
07:48:41:ST3_smx:INFO: # loops 0
07:48:43:ST3_smx:INFO: # loops 1
07:48:44:ST3_smx:INFO: # loops 2
07:48:46:ST3_smx:INFO: Total # of broken channels: 0
07:48:46:ST3_smx:INFO: List of broken channels: []
07:48:46:ST3_smx:INFO: Total # of broken channels: 0
07:48:46:ST3_smx:INFO: List of broken channels: []
07:48:48:ST3_smx:INFO: chip: 14-7 31.389742 C 1189.190035 mV
07:48:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:48:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:48:48:ST3_smx:INFO: Electrons
07:48:48:ST3_smx:INFO: # loops 0
07:48:50:ST3_smx:INFO: # loops 1
07:48:51:ST3_smx:INFO: # loops 2
07:48:53:ST3_smx:INFO: Total # of broken channels: 0
07:48:53:ST3_smx:INFO: List of broken channels: []
07:48:53:ST3_smx:INFO: Total # of broken channels: 0
07:48:53:ST3_smx:INFO: List of broken channels: []
07:48:54:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:48:54:febtest:INFO: 01-00 | XA-000-09-004-026-017-010-12 | 21.9 | 1253.7
07:48:54:febtest:INFO: 08-01 | XA-000-09-004-026-014-010-04 | 15.6 | 1271.2
07:48:54:febtest:INFO: 03-02 | XA-000-09-004-026-005-010-06 | 37.7 | 1195.1
07:48:54:febtest:INFO: 10-03 | XA-000-09-004-026-007-024-02 | 37.7 | 1195.1
07:48:55:febtest:INFO: 05-04 | XA-000-09-004-026-011-010-15 | 34.6 | 1206.9
07:48:55:febtest:INFO: 12-05 | XA-000-09-004-026-010-024-05 | 37.7 | 1218.6
07:48:55:febtest:INFO: 07-06 | XA-000-09-004-026-008-010-01 | 37.7 | 1201.0
07:48:55:febtest:INFO: 14-07 | XA-000-09-004-026-013-024-13 | 34.6 | 1206.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_12_17-07_47_27
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3320| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.6360', '1.850', '2.5450', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9670', '1.850', '2.4160', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9640', '1.851', '0.5235', '0.000', '0.0000', '0.000', '0.0000']