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FEB_3322 17.12.25 14:14:28
Info
14:14:28:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:14:28:ST3_Shared:INFO: FEB-Microcable
14:14:28:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:14:28:febtest:INFO: Testing FEB with SN 3322
14:14:30:smx_tester:INFO: Scanning setup
14:14:30:elinks:INFO: Disabling clock on downlink 0
14:14:30:elinks:INFO: Disabling clock on downlink 1
14:14:30:elinks:INFO: Disabling clock on downlink 2
14:14:30:elinks:INFO: Disabling clock on downlink 3
14:14:30:elinks:INFO: Disabling clock on downlink 4
14:14:30:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:14:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:14:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:14:30:elinks:INFO: Disabling clock on downlink 0
14:14:30:elinks:INFO: Disabling clock on downlink 1
14:14:30:elinks:INFO: Disabling clock on downlink 2
14:14:30:elinks:INFO: Disabling clock on downlink 3
14:14:30:elinks:INFO: Disabling clock on downlink 4
14:14:30:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:14:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:14:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
14:14:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
14:14:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
14:14:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
14:14:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
14:14:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
14:14:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
14:14:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
14:14:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
14:14:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
14:14:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
14:14:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
14:14:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
14:14:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
14:14:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
14:14:30:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
14:14:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:14:30:elinks:INFO: Disabling clock on downlink 0
14:14:30:elinks:INFO: Disabling clock on downlink 1
14:14:30:elinks:INFO: Disabling clock on downlink 2
14:14:30:elinks:INFO: Disabling clock on downlink 3
14:14:30:elinks:INFO: Disabling clock on downlink 4
14:14:30:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:14:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:14:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:14:30:elinks:INFO: Disabling clock on downlink 0
14:14:30:elinks:INFO: Disabling clock on downlink 1
14:14:30:elinks:INFO: Disabling clock on downlink 2
14:14:30:elinks:INFO: Disabling clock on downlink 3
14:14:30:elinks:INFO: Disabling clock on downlink 4
14:14:30:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:14:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:14:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:14:30:elinks:INFO: Disabling clock on downlink 0
14:14:30:elinks:INFO: Disabling clock on downlink 1
14:14:30:elinks:INFO: Disabling clock on downlink 2
14:14:30:elinks:INFO: Disabling clock on downlink 3
14:14:30:elinks:INFO: Disabling clock on downlink 4
14:14:30:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:14:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:14:30:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:14:30:setup_element:INFO: Scanning clock phase
14:14:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:14:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:14:30:setup_element:INFO: Clock phase scan results for group 0, downlink 1
14:14:31:setup_element:INFO: Eye window for uplink 0 : _______________________________________________________________XXXXXXXXXX_______
Clock Delay: 27
14:14:31:setup_element:INFO: Eye window for uplink 1 : _______________________________________________________________XXXXXXXXXX_______
Clock Delay: 27
14:14:31:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________XXXXXX__________
Clock Delay: 26
14:14:31:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________XXXXXX__________
Clock Delay: 26
14:14:31:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________XXXXXX_X________
Clock Delay: 27
14:14:31:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________XXXXXX_X________
Clock Delay: 27
14:14:31:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________________
Clock Delay: 40
14:14:31:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________________
Clock Delay: 40
14:14:31:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
14:14:31:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________XXXXXXX__________
Clock Delay: 26
14:14:31:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________XXXXXXX__________
Clock Delay: 26
14:14:31:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________XXXXXXX__________
Clock Delay: 26
14:14:31:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________XXXXXXXX__________
Clock Delay: 25
14:14:31:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________XXXXXXXX__________
Clock Delay: 25
14:14:31:setup_element:INFO: Eye window for uplink 14: _______________________________________________________________XXXXXX___________
Clock Delay: 25
14:14:31:setup_element:INFO: Eye window for uplink 15: _______________________________________________________________XXXXXX___________
Clock Delay: 25
14:14:31:setup_element:INFO: Setting the clock phase to 27 for group 0, downlink 1
14:14:31:setup_element:INFO: Scanning data phases
14:14:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:14:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:14:36:setup_element:INFO: Data phase scan results for group 0, downlink 1
14:14:36:setup_element:INFO: Eye window for uplink 0 : _____________________XXXXXXXXXXX________
Data delay found: 6
14:14:36:setup_element:INFO: Eye window for uplink 1 : ________________XXXXXXXXXXXX____________
Data delay found: 1
14:14:36:setup_element:INFO: Eye window for uplink 2 : ____________XXXXXXX_____________________
Data delay found: 35
14:14:36:setup_element:INFO: Eye window for uplink 3 : __________XXXXXXX_______________________
Data delay found: 33
14:14:36:setup_element:INFO: Eye window for uplink 4 : ______XXXXXXXXX_________________________
Data delay found: 30
14:14:36:setup_element:INFO: Eye window for uplink 5 : _____XXXXXXXXXX_________________________
Data delay found: 29
14:14:36:setup_element:INFO: Eye window for uplink 6 : _XXXXXXXX_____________________________X_
Data delay found: 23
14:14:36:setup_element:INFO: Eye window for uplink 7 : XXXXXXXXXX_________________________XXXXX
Data delay found: 22
14:14:36:setup_element:INFO: Eye window for uplink 8 : ______________________________XXXXXXXX__
Data delay found: 13
14:14:36:setup_element:INFO: Eye window for uplink 9 : X________________________________XXXXXX_
Data delay found: 16
14:14:36:setup_element:INFO: Eye window for uplink 10: XX_______________________________XXXXXXX
Data delay found: 17
14:14:36:setup_element:INFO: Eye window for uplink 11: XXX________________________________XXXXX
Data delay found: 18
14:14:36:setup_element:INFO: Eye window for uplink 12: X________________________________XXXXXXX
Data delay found: 16
14:14:36:setup_element:INFO: Eye window for uplink 13: X_________________________________XXXXXX
Data delay found: 17
14:14:36:setup_element:INFO: Eye window for uplink 14: _______________________________XXXXXXXXX
Data delay found: 15
14:14:36:setup_element:INFO: Eye window for uplink 15: _______________________________XXXXXXXXX
Data delay found: 15
14:14:36:setup_element:INFO: Setting the data phase to 6 for uplink 0
14:14:36:setup_element:INFO: Setting the data phase to 1 for uplink 1
14:14:36:setup_element:INFO: Setting the data phase to 35 for uplink 2
14:14:36:setup_element:INFO: Setting the data phase to 33 for uplink 3
14:14:36:setup_element:INFO: Setting the data phase to 30 for uplink 4
14:14:36:setup_element:INFO: Setting the data phase to 29 for uplink 5
14:14:36:setup_element:INFO: Setting the data phase to 23 for uplink 6
14:14:36:setup_element:INFO: Setting the data phase to 22 for uplink 7
14:14:36:setup_element:INFO: Setting the data phase to 13 for uplink 8
14:14:36:setup_element:INFO: Setting the data phase to 16 for uplink 9
14:14:36:setup_element:INFO: Setting the data phase to 17 for uplink 10
14:14:36:setup_element:INFO: Setting the data phase to 18 for uplink 11
14:14:36:setup_element:INFO: Setting the data phase to 16 for uplink 12
14:14:36:setup_element:INFO: Setting the data phase to 17 for uplink 13
14:14:36:setup_element:INFO: Setting the data phase to 15 for uplink 14
14:14:36:setup_element:INFO: Setting the data phase to 15 for uplink 15
14:14:36:setup_element:INFO: Beginning SMX ASICs map scan
14:14:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:14:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:14:36:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:14:36:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:14:36:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:14:36:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:14:36:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:14:36:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:14:36:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:14:36:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:14:36:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:14:36:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:14:36:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:14:37:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:14:37:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:14:37:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:14:37:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:14:37:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:14:37:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:14:37:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:14:37:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:14:38:setup_element:INFO: Performing Elink synchronization
14:14:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:14:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:14:38:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:14:38:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:14:38:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
14:14:39:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:14:39:febtest:INFO: Init all SMX (CSA): 30
14:14:53:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:14:54:febtest:INFO: 01-00 | XA-000-09-004-026-018-017-05 | 9.3 | 1242.0
14:14:54:febtest:INFO: 08-01 | XA-000-09-004-026-015-020-14 | 31.4 | 1183.3
14:14:54:febtest:INFO: 03-02 | XA-000-09-004-026-003-020-04 | 44.1 | 1135.9
14:14:54:febtest:INFO: 10-03 | XA-000-09-004-026-003-019-04 | 37.7 | 1153.7
14:14:55:febtest:INFO: 05-04 | XA-000-09-004-026-009-020-11 | 47.3 | 1118.1
14:14:55:febtest:INFO: 12-05 | XA-000-09-004-026-006-019-15 | 44.1 | 1147.8
14:14:55:febtest:INFO: 07-06 | XA-000-09-004-026-012-020-00 | 40.9 | 1135.9
14:14:55:febtest:INFO: 14-07 | XA-000-09-004-026-009-019-11 | 44.1 | 1141.9
14:14:56:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:14:58:ST3_smx:INFO: chip: 1-0 12.438562 C 1265.400000 mV
14:14:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:14:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:14:58:ST3_smx:INFO: Electrons
14:14:58:ST3_smx:INFO: # loops 0
14:15:00:ST3_smx:INFO: # loops 1
14:15:02:ST3_smx:INFO: # loops 2
14:15:03:ST3_smx:INFO: Total # of broken channels: 0
14:15:03:ST3_smx:INFO: List of broken channels: []
14:15:03:ST3_smx:INFO: Total # of broken channels: 0
14:15:03:ST3_smx:INFO: List of broken channels: []
14:15:05:ST3_smx:INFO: chip: 8-1 31.389742 C 1195.082160 mV
14:15:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:05:ST3_smx:INFO: Electrons
14:15:05:ST3_smx:INFO: # loops 0
14:15:07:ST3_smx:INFO: # loops 1
14:15:08:ST3_smx:INFO: # loops 2
14:15:10:ST3_smx:INFO: Total # of broken channels: 0
14:15:10:ST3_smx:INFO: List of broken channels: []
14:15:10:ST3_smx:INFO: Total # of broken channels: 0
14:15:10:ST3_smx:INFO: List of broken channels: []
14:15:12:ST3_smx:INFO: chip: 3-2 44.073563 C 1153.732915 mV
14:15:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:12:ST3_smx:INFO: Electrons
14:15:12:ST3_smx:INFO: # loops 0
14:15:13:ST3_smx:INFO: # loops 1
14:15:15:ST3_smx:INFO: # loops 2
14:15:16:ST3_smx:INFO: Total # of broken channels: 0
14:15:16:ST3_smx:INFO: List of broken channels: []
14:15:16:ST3_smx:INFO: Total # of broken channels: 0
14:15:16:ST3_smx:INFO: List of broken channels: []
14:15:18:ST3_smx:INFO: chip: 10-3 37.726682 C 1171.483840 mV
14:15:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:18:ST3_smx:INFO: Electrons
14:15:18:ST3_smx:INFO: # loops 0
14:15:20:ST3_smx:INFO: # loops 1
14:15:21:ST3_smx:INFO: # loops 2
14:15:23:ST3_smx:INFO: Total # of broken channels: 0
14:15:23:ST3_smx:INFO: List of broken channels: []
14:15:23:ST3_smx:INFO: Total # of broken channels: 1
14:15:23:ST3_smx:INFO: List of broken channels: [85]
14:15:25:ST3_smx:INFO: chip: 5-4 50.430383 C 1135.937260 mV
14:15:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:25:ST3_smx:INFO: Electrons
14:15:25:ST3_smx:INFO: # loops 0
14:15:26:ST3_smx:INFO: # loops 1
14:15:28:ST3_smx:INFO: # loops 2
14:15:29:ST3_smx:INFO: Total # of broken channels: 0
14:15:29:ST3_smx:INFO: List of broken channels: []
14:15:29:ST3_smx:INFO: Total # of broken channels: 0
14:15:29:ST3_smx:INFO: List of broken channels: []
14:15:31:ST3_smx:INFO: chip: 12-5 44.073563 C 1159.654860 mV
14:15:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:31:ST3_smx:INFO: Electrons
14:15:31:ST3_smx:INFO: # loops 0
14:15:32:ST3_smx:INFO: # loops 1
14:15:34:ST3_smx:INFO: # loops 2
14:15:36:ST3_smx:INFO: Total # of broken channels: 0
14:15:36:ST3_smx:INFO: List of broken channels: []
14:15:36:ST3_smx:INFO: Total # of broken channels: 0
14:15:36:ST3_smx:INFO: List of broken channels: []
14:15:37:ST3_smx:INFO: chip: 7-6 44.073563 C 1153.732915 mV
14:15:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:37:ST3_smx:INFO: Electrons
14:15:37:ST3_smx:INFO: # loops 0
14:15:39:ST3_smx:INFO: # loops 1
14:15:40:ST3_smx:INFO: # loops 2
14:15:42:ST3_smx:INFO: Total # of broken channels: 0
14:15:42:ST3_smx:INFO: List of broken channels: []
14:15:42:ST3_smx:INFO: Total # of broken channels: 0
14:15:42:ST3_smx:INFO: List of broken channels: []
14:15:44:ST3_smx:INFO: chip: 14-7 47.250730 C 1159.654860 mV
14:15:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:15:44:ST3_smx:INFO: Electrons
14:15:44:ST3_smx:INFO: # loops 0
14:15:45:ST3_smx:INFO: # loops 1
14:15:47:ST3_smx:INFO: # loops 2
14:15:48:ST3_smx:INFO: Total # of broken channels: 0
14:15:48:ST3_smx:INFO: List of broken channels: []
14:15:48:ST3_smx:INFO: Total # of broken channels: 0
14:15:48:ST3_smx:INFO: List of broken channels: []
14:15:49:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:15:49:febtest:INFO: 01-00 | XA-000-09-004-026-018-017-05 | 12.4 | 1288.7
14:15:49:febtest:INFO: 08-01 | XA-000-09-004-026-015-020-14 | 34.6 | 1218.6
14:15:49:febtest:INFO: 03-02 | XA-000-09-004-026-003-020-04 | 44.1 | 1177.4
14:15:49:febtest:INFO: 10-03 | XA-000-09-004-026-003-019-04 | 40.9 | 1195.1
14:15:50:febtest:INFO: 05-04 | XA-000-09-004-026-009-020-11 | 50.4 | 1159.7
14:15:50:febtest:INFO: 12-05 | XA-000-09-004-026-006-019-15 | 47.3 | 1177.4
14:15:50:febtest:INFO: 07-06 | XA-000-09-004-026-012-020-00 | 47.3 | 1177.4
14:15:50:febtest:INFO: 14-07 | XA-000-09-004-026-009-019-11 | 47.3 | 1183.3
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_12_17-14_14_28
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3322| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.4910', '1.850', '2.0030', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9850', '1.850', '2.3710', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9930', '1.850', '0.5284', '0.000', '0.0000', '0.000', '0.0000']