13:32:03:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:32:03:ST3_Shared:INFO:	                         FEB-Sensor                         
13:32:03:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:32:19:ST3_ModuleSelector:INFO:	L3UR001154 M3UR0T0011540A2 42 A

13:32:19:ST3_ModuleSelector:INFO:	22342

13:32:19:febtest:INFO:	Testing FEB with SN 3327
13:32:21:smx_tester:INFO:	Scanning setup
13:32:21:elinks:INFO:	Disabling clock on downlink 0
13:32:21:elinks:INFO:	Disabling clock on downlink 1
13:32:21:elinks:INFO:	Disabling clock on downlink 2
13:32:21:elinks:INFO:	Disabling clock on downlink 3
13:32:21:elinks:INFO:	Disabling clock on downlink 4
13:32:21:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:32:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:32:21:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:32:21:elinks:INFO:	Disabling clock on downlink 0
13:32:21:elinks:INFO:	Disabling clock on downlink 1
13:32:21:elinks:INFO:	Disabling clock on downlink 2
13:32:21:elinks:INFO:	Disabling clock on downlink 3
13:32:21:elinks:INFO:	Disabling clock on downlink 4
13:32:21:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:32:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:32:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
13:32:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
13:32:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
13:32:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
13:32:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
13:32:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
13:32:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
13:32:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
13:32:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
13:32:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
13:32:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
13:32:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
13:32:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
13:32:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
13:32:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
13:32:21:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
13:32:21:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:32:21:elinks:INFO:	Disabling clock on downlink 0
13:32:21:elinks:INFO:	Disabling clock on downlink 1
13:32:21:elinks:INFO:	Disabling clock on downlink 2
13:32:21:elinks:INFO:	Disabling clock on downlink 3
13:32:21:elinks:INFO:	Disabling clock on downlink 4
13:32:21:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:32:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:32:22:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:32:22:elinks:INFO:	Disabling clock on downlink 0
13:32:22:elinks:INFO:	Disabling clock on downlink 1
13:32:22:elinks:INFO:	Disabling clock on downlink 2
13:32:22:elinks:INFO:	Disabling clock on downlink 3
13:32:22:elinks:INFO:	Disabling clock on downlink 4
13:32:22:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:32:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:32:22:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:32:22:elinks:INFO:	Disabling clock on downlink 0
13:32:22:elinks:INFO:	Disabling clock on downlink 1
13:32:22:elinks:INFO:	Disabling clock on downlink 2
13:32:22:elinks:INFO:	Disabling clock on downlink 3
13:32:22:elinks:INFO:	Disabling clock on downlink 4
13:32:22:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:32:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:32:22:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:32:22:setup_element:INFO:	Scanning clock phase
13:32:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:32:22:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:32:22:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
13:32:22:setup_element:INFO:	Eye window for uplink 0 : __________________________________________________________________________XXXXX_
Clock Delay: 36
13:32:22:setup_element:INFO:	Eye window for uplink 1 : __________________________________________________________________________XXXXX_
Clock Delay: 36
13:32:22:setup_element:INFO:	Eye window for uplink 2 : ________________________________________________________________________XXXXX___
Clock Delay: 34
13:32:22:setup_element:INFO:	Eye window for uplink 3 : ________________________________________________________________________XXXXX___
Clock Delay: 34
13:32:22:setup_element:INFO:	Eye window for uplink 4 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:32:22:setup_element:INFO:	Eye window for uplink 5 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:32:22:setup_element:INFO:	Eye window for uplink 6 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:32:22:setup_element:INFO:	Eye window for uplink 7 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:32:22:setup_element:INFO:	Eye window for uplink 8 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:32:22:setup_element:INFO:	Eye window for uplink 9 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:32:22:setup_element:INFO:	Eye window for uplink 10: ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:32:22:setup_element:INFO:	Eye window for uplink 11: ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:32:22:setup_element:INFO:	Eye window for uplink 12: ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:32:22:setup_element:INFO:	Eye window for uplink 13: ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:32:22:setup_element:INFO:	Eye window for uplink 14: _________________________________________________________________________XXXX___
Clock Delay: 34
13:32:22:setup_element:INFO:	Eye window for uplink 15: _________________________________________________________________________XXXX___
Clock Delay: 34
13:32:22:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 1
13:32:22:setup_element:INFO:	Scanning data phases
13:32:22:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:32:22:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:32:27:setup_element:INFO:	Data phase scan results for group 0, downlink 1
13:32:27:setup_element:INFO:	Eye window for uplink 0 : _______________XXXXX____________________
Data delay found: 37
13:32:27:setup_element:INFO:	Eye window for uplink 1 : _____________XXXX_______________________
Data delay found: 34
13:32:27:setup_element:INFO:	Eye window for uplink 2 : _______XXXXX____________________________
Data delay found: 29
13:32:27:setup_element:INFO:	Eye window for uplink 3 : _______XXXX_____________________________
Data delay found: 28
13:32:27:setup_element:INFO:	Eye window for uplink 4 : ______XXXX______________________________
Data delay found: 27
13:32:27:setup_element:INFO:	Eye window for uplink 5 : _____XXXX_______________________________
Data delay found: 26
13:32:27:setup_element:INFO:	Eye window for uplink 6 : ___XXXX_________________________________
Data delay found: 24
13:32:27:setup_element:INFO:	Eye window for uplink 7 : _XXXXX__________________________________
Data delay found: 23
13:32:27:setup_element:INFO:	Eye window for uplink 8 : _______________________________XXXXXX___
Data delay found: 13
13:32:27:setup_element:INFO:	Eye window for uplink 9 : __________________________________XXXXX_
Data delay found: 16
13:32:27:setup_element:INFO:	Eye window for uplink 10: ________________________________XXXXX___
Data delay found: 14
13:32:27:setup_element:INFO:	Eye window for uplink 11: _________________________________XXXXX__
Data delay found: 15
13:32:27:setup_element:INFO:	Eye window for uplink 12: _________________________________XXXXX__
Data delay found: 15
13:32:27:setup_element:INFO:	Eye window for uplink 13: __________________________________XXXX__
Data delay found: 15
13:32:27:setup_element:INFO:	Eye window for uplink 14: _________________________________XXXXX__
Data delay found: 15
13:32:27:setup_element:INFO:	Eye window for uplink 15: __________________________________XXXX__
Data delay found: 15
13:32:27:setup_element:INFO:	Setting the data phase to 37 for uplink 0
13:32:27:setup_element:INFO:	Setting the data phase to 34 for uplink 1
13:32:27:setup_element:INFO:	Setting the data phase to 29 for uplink 2
13:32:27:setup_element:INFO:	Setting the data phase to 28 for uplink 3
13:32:27:setup_element:INFO:	Setting the data phase to 27 for uplink 4
13:32:27:setup_element:INFO:	Setting the data phase to 26 for uplink 5
13:32:27:setup_element:INFO:	Setting the data phase to 24 for uplink 6
13:32:27:setup_element:INFO:	Setting the data phase to 23 for uplink 7
13:32:27:setup_element:INFO:	Setting the data phase to 13 for uplink 8
13:32:27:setup_element:INFO:	Setting the data phase to 16 for uplink 9
13:32:27:setup_element:INFO:	Setting the data phase to 14 for uplink 10
13:32:27:setup_element:INFO:	Setting the data phase to 15 for uplink 11
13:32:27:setup_element:INFO:	Setting the data phase to 15 for uplink 12
13:32:27:setup_element:INFO:	Setting the data phase to 15 for uplink 13
13:32:27:setup_element:INFO:	Setting the data phase to 15 for uplink 14
13:32:27:setup_element:INFO:	Setting the data phase to 15 for uplink 15
13:32:27:setup_element:INFO:	Beginning SMX ASICs map scan
13:32:27:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:32:27:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:32:27:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:32:27:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
13:32:27:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:32:27:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:32:27:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:32:28:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:32:28:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:32:28:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:32:28:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:32:28:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:32:28:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:32:28:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:32:28:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:32:28:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:32:28:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:32:28:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:32:29:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:32:29:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:32:29:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:32:30:setup_element:INFO:	Performing Elink synchronization
13:32:30:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:32:30:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:32:30:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:32:30:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
13:32:30:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
13:32:30:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:32:31:febtest:INFO:	Init all SMX (CSA): 30
13:32:46:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:32:46:febtest:INFO:	01-00 | XA-000-09-004-023-003-013-15 |  37.7 | 1141.9
13:32:46:febtest:INFO:	08-01 | XA-000-09-004-023-018-011-14 |  21.9 | 1218.6
13:32:46:febtest:INFO:	03-02 | XA-000-09-004-023-012-012-11 |  34.6 | 1159.7
13:32:46:febtest:INFO:	10-03 | XA-000-09-004-023-006-011-04 |  31.4 | 1159.7
13:32:47:febtest:INFO:	05-04 | XA-000-09-004-023-015-012-05 |  28.2 | 1177.4
13:32:47:febtest:INFO:	12-05 | XA-000-09-004-023-009-011-00 |  28.2 | 1171.5
13:32:47:febtest:INFO:	07-06 | XA-000-09-004-023-018-012-14 |  25.1 | 1183.3
13:32:47:febtest:INFO:	14-07 | XA-000-09-004-023-012-011-11 |  25.1 | 1183.3
13:32:48:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:32:50:ST3_smx:INFO:	chip: 1-0 	 40.898880 C 	 1153.732915 mV
13:32:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:32:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:32:50:ST3_smx:INFO:		Electrons
13:32:50:ST3_smx:INFO:	# loops 0
13:32:52:ST3_smx:INFO:	# loops 1
13:32:54:ST3_smx:INFO:	# loops 2
13:32:55:ST3_smx:INFO:	Total # of broken channels: 0
13:32:55:ST3_smx:INFO:	List of broken channels: []
13:32:55:ST3_smx:INFO:	Total # of broken channels: 0
13:32:55:ST3_smx:INFO:	List of broken channels: []
13:32:57:ST3_smx:INFO:	chip: 8-1 	 21.902970 C 	 1253.730060 mV
13:32:57:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:32:57:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:32:57:ST3_smx:INFO:		Electrons
13:32:57:ST3_smx:INFO:	# loops 0
13:32:59:ST3_smx:INFO:	# loops 1
13:33:00:ST3_smx:INFO:	# loops 2
13:33:02:ST3_smx:INFO:	Total # of broken channels: 0
13:33:02:ST3_smx:INFO:	List of broken channels: []
13:33:02:ST3_smx:INFO:	Total # of broken channels: 0
13:33:02:ST3_smx:INFO:	List of broken channels: []
13:33:04:ST3_smx:INFO:	chip: 3-2 	 34.556970 C 	 1171.483840 mV
13:33:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:04:ST3_smx:INFO:		Electrons
13:33:04:ST3_smx:INFO:	# loops 0
13:33:05:ST3_smx:INFO:	# loops 1
13:33:07:ST3_smx:INFO:	# loops 2
13:33:08:ST3_smx:INFO:	Total # of broken channels: 0
13:33:08:ST3_smx:INFO:	List of broken channels: []
13:33:08:ST3_smx:INFO:	Total # of broken channels: 0
13:33:08:ST3_smx:INFO:	List of broken channels: []
13:33:10:ST3_smx:INFO:	chip: 10-3 	 31.389742 C 	 1171.483840 mV
13:33:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:10:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:10:ST3_smx:INFO:		Electrons
13:33:10:ST3_smx:INFO:	# loops 0
13:33:11:ST3_smx:INFO:	# loops 1
13:33:13:ST3_smx:INFO:	# loops 2
13:33:14:ST3_smx:INFO:	Total # of broken channels: 0
13:33:14:ST3_smx:INFO:	List of broken channels: []
13:33:14:ST3_smx:INFO:	Total # of broken channels: 0
13:33:14:ST3_smx:INFO:	List of broken channels: []
13:33:16:ST3_smx:INFO:	chip: 5-4 	 28.225000 C 	 1195.082160 mV
13:33:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:16:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:16:ST3_smx:INFO:		Electrons
13:33:16:ST3_smx:INFO:	# loops 0
13:33:18:ST3_smx:INFO:	# loops 1
13:33:20:ST3_smx:INFO:	# loops 2
13:33:21:ST3_smx:INFO:	Total # of broken channels: 0
13:33:21:ST3_smx:INFO:	List of broken channels: []
13:33:21:ST3_smx:INFO:	Total # of broken channels: 0
13:33:21:ST3_smx:INFO:	List of broken channels: []
13:33:23:ST3_smx:INFO:	chip: 12-5 	 31.389742 C 	 1189.190035 mV
13:33:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:23:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:23:ST3_smx:INFO:		Electrons
13:33:23:ST3_smx:INFO:	# loops 0
13:33:24:ST3_smx:INFO:	# loops 1
13:33:26:ST3_smx:INFO:	# loops 2
13:33:28:ST3_smx:INFO:	Total # of broken channels: 0
13:33:28:ST3_smx:INFO:	List of broken channels: []
13:33:28:ST3_smx:INFO:	Total # of broken channels: 0
13:33:28:ST3_smx:INFO:	List of broken channels: []
13:33:29:ST3_smx:INFO:	chip: 7-6 	 28.225000 C 	 1195.082160 mV
13:33:29:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:29:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:29:ST3_smx:INFO:		Electrons
13:33:29:ST3_smx:INFO:	# loops 0
13:33:31:ST3_smx:INFO:	# loops 1
13:33:33:ST3_smx:INFO:	# loops 2
13:33:34:ST3_smx:INFO:	Total # of broken channels: 0
13:33:34:ST3_smx:INFO:	List of broken channels: []
13:33:34:ST3_smx:INFO:	Total # of broken channels: 0
13:33:34:ST3_smx:INFO:	List of broken channels: []
13:33:36:ST3_smx:INFO:	chip: 14-7 	 28.225000 C 	 1195.082160 mV
13:33:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:36:ST3_smx:INFO:		Electrons
13:33:36:ST3_smx:INFO:	# loops 0
13:33:38:ST3_smx:INFO:	# loops 1
13:33:40:ST3_smx:INFO:	# loops 2
13:33:41:ST3_smx:INFO:	Total # of broken channels: 0
13:33:41:ST3_smx:INFO:	List of broken channels: []
13:33:41:ST3_smx:INFO:	Total # of broken channels: 0
13:33:41:ST3_smx:INFO:	List of broken channels: []
13:33:42:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:33:42:febtest:INFO:	01-00 | XA-000-09-004-023-003-013-15 |  40.9 | 1177.4
13:33:42:febtest:INFO:	08-01 | XA-000-09-004-023-018-011-14 |  18.7 | 1578.5
13:33:42:febtest:INFO:	03-02 | XA-000-09-004-023-012-012-11 |  37.7 | 1195.1
13:33:43:febtest:INFO:	10-03 | XA-000-09-004-023-006-011-04 |  34.6 | 1195.1
13:33:43:febtest:INFO:	05-04 | XA-000-09-004-023-015-012-05 |  31.4 | 1218.6
13:33:43:febtest:INFO:	12-05 | XA-000-09-004-023-009-011-00 |  34.6 | 1212.7
13:33:43:febtest:INFO:	07-06 | XA-000-09-004-023-018-012-14 |  28.2 | 1212.7
13:33:43:febtest:INFO:	14-07 | XA-000-09-004-023-012-011-11 |  28.2 | 1218.6
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 26_01_26-13_32_03
OPERATOR  : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3327| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_ID:	22342

MODULE_NAME:	L3UR001154 M3UR0T0011540A2 42 A

MODULE_TYPE:	
MODULE_LADDER:	L3UR001154
MODULE_MODULE:	M3UR0T0011540A2
MODULE_SIZE:	42
MODULE_GRADE:	A
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5400', '1.850', '2.1840', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0080', '1.850', '2.4240', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9830', '1.850', '0.5282', '0.000', '0.0000', '0.000', '0.0000']