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FEB_3327 22.01.26 12:57:05
Info
12:57:05:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:57:05:ST3_Shared:INFO: FEB-Microcable
12:57:05:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:57:05:febtest:INFO: Testing FEB with SN 3327
12:57:06:smx_tester:INFO: Scanning setup
12:57:06:elinks:INFO: Disabling clock on downlink 0
12:57:06:elinks:INFO: Disabling clock on downlink 1
12:57:06:elinks:INFO: Disabling clock on downlink 2
12:57:06:elinks:INFO: Disabling clock on downlink 3
12:57:06:elinks:INFO: Disabling clock on downlink 4
12:57:06:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:57:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:57:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:57:07:elinks:INFO: Disabling clock on downlink 0
12:57:07:elinks:INFO: Disabling clock on downlink 1
12:57:07:elinks:INFO: Disabling clock on downlink 2
12:57:07:elinks:INFO: Disabling clock on downlink 3
12:57:07:elinks:INFO: Disabling clock on downlink 4
12:57:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:57:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:57:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
12:57:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
12:57:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
12:57:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
12:57:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
12:57:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
12:57:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
12:57:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
12:57:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
12:57:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
12:57:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
12:57:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
12:57:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
12:57:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
12:57:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
12:57:07:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
12:57:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:57:07:elinks:INFO: Disabling clock on downlink 0
12:57:07:elinks:INFO: Disabling clock on downlink 1
12:57:07:elinks:INFO: Disabling clock on downlink 2
12:57:07:elinks:INFO: Disabling clock on downlink 3
12:57:07:elinks:INFO: Disabling clock on downlink 4
12:57:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:57:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:57:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:57:07:elinks:INFO: Disabling clock on downlink 0
12:57:07:elinks:INFO: Disabling clock on downlink 1
12:57:07:elinks:INFO: Disabling clock on downlink 2
12:57:07:elinks:INFO: Disabling clock on downlink 3
12:57:07:elinks:INFO: Disabling clock on downlink 4
12:57:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:57:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
12:57:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:57:07:elinks:INFO: Disabling clock on downlink 0
12:57:07:elinks:INFO: Disabling clock on downlink 1
12:57:07:elinks:INFO: Disabling clock on downlink 2
12:57:07:elinks:INFO: Disabling clock on downlink 3
12:57:07:elinks:INFO: Disabling clock on downlink 4
12:57:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:57:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
12:57:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:57:07:setup_element:INFO: Scanning clock phase
12:57:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:57:07:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:57:07:setup_element:INFO: Clock phase scan results for group 0, downlink 1
12:57:07:setup_element:INFO: Eye window for uplink 0 : __________________________________________________________________________XXXXX_
Clock Delay: 36
12:57:07:setup_element:INFO: Eye window for uplink 1 : __________________________________________________________________________XXXXX_
Clock Delay: 36
12:57:07:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
12:57:07:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
12:57:07:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXX___
Clock Delay: 34
12:57:07:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXX___
Clock Delay: 34
12:57:07:setup_element:INFO: Eye window for uplink 6 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
12:57:07:setup_element:INFO: Eye window for uplink 7 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
12:57:07:setup_element:INFO: Eye window for uplink 8 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
12:57:07:setup_element:INFO: Eye window for uplink 9 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
12:57:07:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________XXXXXX__
Clock Delay: 34
12:57:07:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________XXXXXX__
Clock Delay: 34
12:57:07:setup_element:INFO: Eye window for uplink 12: _________________________________________________________________________XXXXX__
Clock Delay: 35
12:57:07:setup_element:INFO: Eye window for uplink 13: _________________________________________________________________________XXXXX__
Clock Delay: 35
12:57:07:setup_element:INFO: Eye window for uplink 14: _________________________________________________________________________XXXXX__
Clock Delay: 35
12:57:07:setup_element:INFO: Eye window for uplink 15: _________________________________________________________________________XXXXX__
Clock Delay: 35
12:57:07:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
12:57:07:setup_element:INFO: Scanning data phases
12:57:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:57:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:57:13:setup_element:INFO: Data phase scan results for group 0, downlink 1
12:57:13:setup_element:INFO: Eye window for uplink 0 : _______________XXXX_____________________
Data delay found: 36
12:57:13:setup_element:INFO: Eye window for uplink 1 : ____________XXXX________________________
Data delay found: 33
12:57:13:setup_element:INFO: Eye window for uplink 2 : ______XXXXX_____________________________
Data delay found: 28
12:57:13:setup_element:INFO: Eye window for uplink 3 : ______XXXX______________________________
Data delay found: 27
12:57:13:setup_element:INFO: Eye window for uplink 4 : _____XXXX_______________________________
Data delay found: 26
12:57:13:setup_element:INFO: Eye window for uplink 5 : ____XXXX________________________________
Data delay found: 25
12:57:13:setup_element:INFO: Eye window for uplink 6 : __XXXX__________________________________
Data delay found: 23
12:57:13:setup_element:INFO: Eye window for uplink 7 : _XXXX__________________________________X
Data delay found: 21
12:57:13:setup_element:INFO: Eye window for uplink 8 : ______________________________XXXXXX____
Data delay found: 12
12:57:13:setup_element:INFO: Eye window for uplink 9 : _________________________________XXXXX__
Data delay found: 15
12:57:13:setup_element:INFO: Eye window for uplink 10: _______________________________XXXXXX___
Data delay found: 13
12:57:13:setup_element:INFO: Eye window for uplink 11: ________________________________XXXXX___
Data delay found: 14
12:57:13:setup_element:INFO: Eye window for uplink 12: ________________________________XXXX____
Data delay found: 13
12:57:13:setup_element:INFO: Eye window for uplink 13: ________________________________XXXXX___
Data delay found: 14
12:57:13:setup_element:INFO: Eye window for uplink 14: ________________________________XXXX____
Data delay found: 13
12:57:13:setup_element:INFO: Eye window for uplink 15: _________________________________XXXX___
Data delay found: 14
12:57:13:setup_element:INFO: Setting the data phase to 36 for uplink 0
12:57:13:setup_element:INFO: Setting the data phase to 33 for uplink 1
12:57:13:setup_element:INFO: Setting the data phase to 28 for uplink 2
12:57:13:setup_element:INFO: Setting the data phase to 27 for uplink 3
12:57:13:setup_element:INFO: Setting the data phase to 26 for uplink 4
12:57:13:setup_element:INFO: Setting the data phase to 25 for uplink 5
12:57:13:setup_element:INFO: Setting the data phase to 23 for uplink 6
12:57:13:setup_element:INFO: Setting the data phase to 21 for uplink 7
12:57:13:setup_element:INFO: Setting the data phase to 12 for uplink 8
12:57:13:setup_element:INFO: Setting the data phase to 15 for uplink 9
12:57:13:setup_element:INFO: Setting the data phase to 13 for uplink 10
12:57:13:setup_element:INFO: Setting the data phase to 14 for uplink 11
12:57:13:setup_element:INFO: Setting the data phase to 13 for uplink 12
12:57:13:setup_element:INFO: Setting the data phase to 14 for uplink 13
12:57:13:setup_element:INFO: Setting the data phase to 13 for uplink 14
12:57:13:setup_element:INFO: Setting the data phase to 14 for uplink 15
12:57:13:setup_element:INFO: Beginning SMX ASICs map scan
12:57:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:57:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:57:13:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
12:57:13:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
12:57:13:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
12:57:13:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
12:57:13:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
12:57:13:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
12:57:13:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
12:57:13:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
12:57:13:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
12:57:13:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
12:57:13:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
12:57:13:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
12:57:14:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
12:57:14:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
12:57:14:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
12:57:14:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
12:57:14:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
12:57:14:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
12:57:14:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
12:57:15:setup_element:INFO: Performing Elink synchronization
12:57:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:57:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
12:57:15:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
12:57:15:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
12:57:15:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
12:57:15:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
12:57:16:febtest:INFO: Init all SMX (CSA): 30
12:57:32:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:57:32:febtest:INFO: 01-00 | XA-000-09-004-023-003-013-15 | 40.9 | 1135.9
12:57:32:febtest:INFO: 08-01 | XA-000-09-004-023-018-011-14 | 21.9 | 1230.3
12:57:33:febtest:INFO: 03-02 | XA-000-09-004-023-012-012-11 | 37.7 | 1159.7
12:57:33:febtest:INFO: 10-03 | XA-000-09-004-023-006-011-04 | 34.6 | 1159.7
12:57:33:febtest:INFO: 05-04 | XA-000-09-004-023-015-012-05 | 28.2 | 1183.3
12:57:33:febtest:INFO: 12-05 | XA-000-09-004-023-009-011-00 | 31.4 | 1171.5
12:57:33:febtest:INFO: 07-06 | XA-000-09-004-023-018-012-14 | 28.2 | 1183.3
12:57:34:febtest:INFO: 14-07 | XA-000-09-004-023-012-011-11 | 25.1 | 1183.3
12:57:35:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
12:57:37:ST3_smx:INFO: chip: 1-0 40.898880 C 1153.732915 mV
12:57:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:57:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:57:37:ST3_smx:INFO: Electrons
12:57:37:ST3_smx:INFO: # loops 0
12:57:38:ST3_smx:INFO: # loops 1
12:57:40:ST3_smx:INFO: # loops 2
12:57:42:ST3_smx:INFO: Total # of broken channels: 0
12:57:42:ST3_smx:INFO: List of broken channels: []
12:57:42:ST3_smx:INFO: Total # of broken channels: 0
12:57:42:ST3_smx:INFO: List of broken channels: []
12:57:43:ST3_smx:INFO: chip: 8-1 21.902970 C 1277.050060 mV
12:57:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:57:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:57:43:ST3_smx:INFO: Electrons
12:57:43:ST3_smx:INFO: # loops 0
12:57:45:ST3_smx:INFO: # loops 1
12:57:47:ST3_smx:INFO: # loops 2
12:57:49:ST3_smx:INFO: Total # of broken channels: 0
12:57:49:ST3_smx:INFO: List of broken channels: []
12:57:49:ST3_smx:INFO: Total # of broken channels: 0
12:57:49:ST3_smx:INFO: List of broken channels: []
12:57:50:ST3_smx:INFO: chip: 3-2 37.726682 C 1171.483840 mV
12:57:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:57:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:57:50:ST3_smx:INFO: Electrons
12:57:50:ST3_smx:INFO: # loops 0
12:57:52:ST3_smx:INFO: # loops 1
12:57:54:ST3_smx:INFO: # loops 2
12:57:55:ST3_smx:INFO: Total # of broken channels: 0
12:57:55:ST3_smx:INFO: List of broken channels: []
12:57:55:ST3_smx:INFO: Total # of broken channels: 0
12:57:55:ST3_smx:INFO: List of broken channels: []
12:57:57:ST3_smx:INFO: chip: 10-3 34.556970 C 1171.483840 mV
12:57:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:57:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:57:57:ST3_smx:INFO: Electrons
12:57:57:ST3_smx:INFO: # loops 0
12:57:59:ST3_smx:INFO: # loops 1
12:58:00:ST3_smx:INFO: # loops 2
12:58:02:ST3_smx:INFO: Total # of broken channels: 0
12:58:02:ST3_smx:INFO: List of broken channels: []
12:58:02:ST3_smx:INFO: Total # of broken channels: 0
12:58:02:ST3_smx:INFO: List of broken channels: []
12:58:03:ST3_smx:INFO: chip: 5-4 31.389742 C 1195.082160 mV
12:58:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:58:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:58:03:ST3_smx:INFO: Electrons
12:58:03:ST3_smx:INFO: # loops 0
12:58:05:ST3_smx:INFO: # loops 1
12:58:07:ST3_smx:INFO: # loops 2
12:58:08:ST3_smx:INFO: Total # of broken channels: 0
12:58:08:ST3_smx:INFO: List of broken channels: []
12:58:08:ST3_smx:INFO: Total # of broken channels: 0
12:58:08:ST3_smx:INFO: List of broken channels: []
12:58:10:ST3_smx:INFO: chip: 12-5 34.556970 C 1183.292940 mV
12:58:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:58:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:58:10:ST3_smx:INFO: Electrons
12:58:10:ST3_smx:INFO: # loops 0
12:58:12:ST3_smx:INFO: # loops 1
12:58:14:ST3_smx:INFO: # loops 2
12:58:15:ST3_smx:INFO: Total # of broken channels: 0
12:58:15:ST3_smx:INFO: List of broken channels: []
12:58:15:ST3_smx:INFO: Total # of broken channels: 0
12:58:15:ST3_smx:INFO: List of broken channels: []
12:58:17:ST3_smx:INFO: chip: 7-6 31.389742 C 1189.190035 mV
12:58:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:58:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:58:17:ST3_smx:INFO: Electrons
12:58:17:ST3_smx:INFO: # loops 0
12:58:19:ST3_smx:INFO: # loops 1
12:58:20:ST3_smx:INFO: # loops 2
12:58:22:ST3_smx:INFO: Total # of broken channels: 0
12:58:22:ST3_smx:INFO: List of broken channels: []
12:58:22:ST3_smx:INFO: Total # of broken channels: 0
12:58:22:ST3_smx:INFO: List of broken channels: []
12:58:24:ST3_smx:INFO: chip: 14-7 28.225000 C 1189.190035 mV
12:58:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:58:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
12:58:24:ST3_smx:INFO: Electrons
12:58:24:ST3_smx:INFO: # loops 0
12:58:26:ST3_smx:INFO: # loops 1
12:58:27:ST3_smx:INFO: # loops 2
12:58:29:ST3_smx:INFO: Total # of broken channels: 0
12:58:29:ST3_smx:INFO: List of broken channels: []
12:58:29:ST3_smx:INFO: Total # of broken channels: 0
12:58:29:ST3_smx:INFO: List of broken channels: []
12:58:30:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:58:30:febtest:INFO: 01-00 | XA-000-09-004-023-003-013-15 | 44.1 | 1171.5
12:58:30:febtest:INFO: 08-01 | XA-000-09-004-023-018-011-14 | 15.6 | 1578.5
12:58:30:febtest:INFO: 03-02 | XA-000-09-004-023-012-012-11 | 40.9 | 1195.1
12:58:30:febtest:INFO: 10-03 | XA-000-09-004-023-006-011-04 | 37.7 | 1189.2
12:58:31:febtest:INFO: 05-04 | XA-000-09-004-023-015-012-05 | 31.4 | 1212.7
12:58:31:febtest:INFO: 12-05 | XA-000-09-004-023-009-011-00 | 34.6 | 1206.9
12:58:31:febtest:INFO: 07-06 | XA-000-09-004-023-018-012-14 | 31.4 | 1212.7
12:58:31:febtest:INFO: 14-07 | XA-000-09-004-023-012-011-11 | 31.4 | 1212.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_01_22-12_57_05
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3327| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5140', '1.850', '2.1720', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0080', '1.850', '2.3800', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9830', '1.850', '0.5280', '0.000', '0.0000', '0.000', '0.0000']