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FEB_3329 23.01.26 09:05:06
Info
09:05:06:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:05:06:ST3_Shared:INFO: FEB-Microcable
09:05:06:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:05:06:febtest:INFO: Testing FEB with SN 3329
09:05:07:smx_tester:INFO: Scanning setup
09:05:07:elinks:INFO: Disabling clock on downlink 0
09:05:07:elinks:INFO: Disabling clock on downlink 1
09:05:07:elinks:INFO: Disabling clock on downlink 2
09:05:07:elinks:INFO: Disabling clock on downlink 3
09:05:07:elinks:INFO: Disabling clock on downlink 4
09:05:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:05:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:05:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:05:08:elinks:INFO: Disabling clock on downlink 0
09:05:08:elinks:INFO: Disabling clock on downlink 1
09:05:08:elinks:INFO: Disabling clock on downlink 2
09:05:08:elinks:INFO: Disabling clock on downlink 3
09:05:08:elinks:INFO: Disabling clock on downlink 4
09:05:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:05:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:05:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
09:05:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
09:05:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
09:05:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
09:05:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
09:05:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
09:05:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
09:05:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
09:05:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
09:05:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
09:05:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
09:05:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
09:05:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
09:05:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
09:05:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
09:05:08:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
09:05:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:05:08:elinks:INFO: Disabling clock on downlink 0
09:05:08:elinks:INFO: Disabling clock on downlink 1
09:05:08:elinks:INFO: Disabling clock on downlink 2
09:05:08:elinks:INFO: Disabling clock on downlink 3
09:05:08:elinks:INFO: Disabling clock on downlink 4
09:05:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:05:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:05:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:05:08:elinks:INFO: Disabling clock on downlink 0
09:05:08:elinks:INFO: Disabling clock on downlink 1
09:05:08:elinks:INFO: Disabling clock on downlink 2
09:05:08:elinks:INFO: Disabling clock on downlink 3
09:05:08:elinks:INFO: Disabling clock on downlink 4
09:05:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:05:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:05:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:05:08:elinks:INFO: Disabling clock on downlink 0
09:05:08:elinks:INFO: Disabling clock on downlink 1
09:05:08:elinks:INFO: Disabling clock on downlink 2
09:05:08:elinks:INFO: Disabling clock on downlink 3
09:05:08:elinks:INFO: Disabling clock on downlink 4
09:05:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:05:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:05:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:05:08:setup_element:INFO: Scanning clock phase
09:05:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:05:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:05:08:setup_element:INFO: Clock phase scan results for group 0, downlink 1
09:05:08:setup_element:INFO: Eye window for uplink 0 : X_________________________________________________________________________XXXXXX
Clock Delay: 37
09:05:08:setup_element:INFO: Eye window for uplink 1 : X_________________________________________________________________________XXXXXX
Clock Delay: 37
09:05:08:setup_element:INFO: Eye window for uplink 2 : __________________________________________________________________________XXXXX_
Clock Delay: 36
09:05:08:setup_element:INFO: Eye window for uplink 3 : __________________________________________________________________________XXXXX_
Clock Delay: 36
09:05:08:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:05:08:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:05:08:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:05:08:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:05:08:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:05:08:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:05:08:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:05:08:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
09:05:08:setup_element:INFO: Eye window for uplink 12: _________________________________________________________________________XXXXX__
Clock Delay: 35
09:05:08:setup_element:INFO: Eye window for uplink 13: _________________________________________________________________________XXXXX__
Clock Delay: 35
09:05:08:setup_element:INFO: Eye window for uplink 14: _________________________________________________________________________XXXXXX_
Clock Delay: 35
09:05:08:setup_element:INFO: Eye window for uplink 15: _________________________________________________________________________XXXXXX_
Clock Delay: 35
09:05:08:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 1
09:05:08:setup_element:INFO: Scanning data phases
09:05:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:05:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:05:14:setup_element:INFO: Data phase scan results for group 0, downlink 1
09:05:14:setup_element:INFO: Eye window for uplink 0 : ______________XXXXX_____________________
Data delay found: 36
09:05:14:setup_element:INFO: Eye window for uplink 1 : ____________XXXX________________________
Data delay found: 33
09:05:14:setup_element:INFO: Eye window for uplink 2 : __________XXXXX_________________________
Data delay found: 32
09:05:14:setup_element:INFO: Eye window for uplink 3 : _________XXXX___________________________
Data delay found: 30
09:05:14:setup_element:INFO: Eye window for uplink 4 : _____XXXXX______________________________
Data delay found: 27
09:05:14:setup_element:INFO: Eye window for uplink 5 : ____XXXXX_______________________________
Data delay found: 26
09:05:14:setup_element:INFO: Eye window for uplink 6 : XXX___________________________________XX
Data delay found: 20
09:05:14:setup_element:INFO: Eye window for uplink 7 : XX__________________________________XXXX
Data delay found: 18
09:05:14:setup_element:INFO: Eye window for uplink 8 : ____________________________XXXXX_______
Data delay found: 10
09:05:14:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXX_____
Data delay found: 12
09:05:14:setup_element:INFO: Eye window for uplink 10: _______________________________XXXXXX___
Data delay found: 13
09:05:14:setup_element:INFO: Eye window for uplink 11: _________________________________XXXXX__
Data delay found: 15
09:05:14:setup_element:INFO: Eye window for uplink 12: _______________________________XXXXX____
Data delay found: 13
09:05:14:setup_element:INFO: Eye window for uplink 13: ________________________________XXXX____
Data delay found: 13
09:05:14:setup_element:INFO: Eye window for uplink 14: _______________________________XXXXX____
Data delay found: 13
09:05:14:setup_element:INFO: Eye window for uplink 15: _______________________________XXXXXX___
Data delay found: 13
09:05:14:setup_element:INFO: Setting the data phase to 36 for uplink 0
09:05:14:setup_element:INFO: Setting the data phase to 33 for uplink 1
09:05:14:setup_element:INFO: Setting the data phase to 32 for uplink 2
09:05:14:setup_element:INFO: Setting the data phase to 30 for uplink 3
09:05:14:setup_element:INFO: Setting the data phase to 27 for uplink 4
09:05:14:setup_element:INFO: Setting the data phase to 26 for uplink 5
09:05:14:setup_element:INFO: Setting the data phase to 20 for uplink 6
09:05:14:setup_element:INFO: Setting the data phase to 18 for uplink 7
09:05:14:setup_element:INFO: Setting the data phase to 10 for uplink 8
09:05:14:setup_element:INFO: Setting the data phase to 12 for uplink 9
09:05:14:setup_element:INFO: Setting the data phase to 13 for uplink 10
09:05:14:setup_element:INFO: Setting the data phase to 15 for uplink 11
09:05:14:setup_element:INFO: Setting the data phase to 13 for uplink 12
09:05:14:setup_element:INFO: Setting the data phase to 13 for uplink 13
09:05:14:setup_element:INFO: Setting the data phase to 13 for uplink 14
09:05:14:setup_element:INFO: Setting the data phase to 13 for uplink 15
09:05:14:setup_element:INFO: Beginning SMX ASICs map scan
09:05:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:05:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:05:14:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:05:14:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:05:14:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
09:05:14:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
09:05:14:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
09:05:14:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
09:05:14:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
09:05:14:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
09:05:14:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
09:05:14:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
09:05:14:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
09:05:15:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
09:05:15:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
09:05:15:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
09:05:15:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
09:05:15:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
09:05:15:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
09:05:15:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
09:05:15:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
09:05:16:setup_element:INFO: Performing Elink synchronization
09:05:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:05:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
09:05:16:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
09:05:16:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
09:05:16:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
09:05:17:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
09:05:17:febtest:INFO: Init all SMX (CSA): 30
09:05:37:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:05:38:febtest:INFO: 01-00 | XA-000-09-004-023-016-011-13 | 37.7 | 1147.8
09:05:38:febtest:INFO: 08-01 | XA-000-09-004-023-013-022-01 | 37.7 | 1147.8
09:05:38:febtest:INFO: 03-02 | XA-000-09-004-023-004-010-07 | 31.4 | 1183.3
09:05:38:febtest:INFO: 10-03 | XA-000-09-004-023-016-020-10 | 34.6 | 1165.6
09:05:39:febtest:INFO: 05-04 | XA-000-09-004-023-004-009-07 | 34.6 | 1177.4
09:05:39:febtest:INFO: 12-05 | XA-000-09-004-023-007-022-14 | 40.9 | 1147.8
09:05:39:febtest:INFO: 07-06 | XA-000-09-004-023-007-009-09 | 40.9 | 1153.7
09:05:39:febtest:INFO: 14-07 | XA-000-09-004-023-010-022-09 | 40.9 | 1147.8
09:05:40:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
09:05:42:ST3_smx:INFO: chip: 1-0 37.726682 C 1159.654860 mV
09:05:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:05:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:05:42:ST3_smx:INFO: Electrons
09:05:42:ST3_smx:INFO: # loops 0
09:05:44:ST3_smx:INFO: # loops 1
09:05:47:ST3_smx:INFO: # loops 2
09:05:49:ST3_smx:INFO: Total # of broken channels: 0
09:05:49:ST3_smx:INFO: List of broken channels: []
09:05:49:ST3_smx:INFO: Total # of broken channels: 0
09:05:49:ST3_smx:INFO: List of broken channels: []
09:05:50:ST3_smx:INFO: chip: 8-1 37.726682 C 1165.571835 mV
09:05:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:05:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:05:50:ST3_smx:INFO: Electrons
09:05:50:ST3_smx:INFO: # loops 0
09:05:52:ST3_smx:INFO: # loops 1
09:05:54:ST3_smx:INFO: # loops 2
09:05:57:ST3_smx:INFO: Total # of broken channels: 0
09:05:57:ST3_smx:INFO: List of broken channels: []
09:05:57:ST3_smx:INFO: Total # of broken channels: 0
09:05:57:ST3_smx:INFO: List of broken channels: []
09:05:58:ST3_smx:INFO: chip: 3-2 31.389742 C 1200.969315 mV
09:05:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:05:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:05:58:ST3_smx:INFO: Electrons
09:05:58:ST3_smx:INFO: # loops 0
09:06:00:ST3_smx:INFO: # loops 1
09:06:03:ST3_smx:INFO: # loops 2
09:06:05:ST3_smx:INFO: Total # of broken channels: 0
09:06:05:ST3_smx:INFO: List of broken channels: []
09:06:05:ST3_smx:INFO: Total # of broken channels: 0
09:06:05:ST3_smx:INFO: List of broken channels: []
09:06:06:ST3_smx:INFO: chip: 10-3 34.556970 C 1183.292940 mV
09:06:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:06:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:06:06:ST3_smx:INFO: Electrons
09:06:06:ST3_smx:INFO: # loops 0
09:06:08:ST3_smx:INFO: # loops 1
09:06:11:ST3_smx:INFO: # loops 2
09:06:13:ST3_smx:INFO: Total # of broken channels: 0
09:06:13:ST3_smx:INFO: List of broken channels: []
09:06:13:ST3_smx:INFO: Total # of broken channels: 0
09:06:13:ST3_smx:INFO: List of broken channels: []
09:06:15:ST3_smx:INFO: chip: 5-4 34.556970 C 1189.190035 mV
09:06:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:06:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:06:15:ST3_smx:INFO: Electrons
09:06:15:ST3_smx:INFO: # loops 0
09:06:17:ST3_smx:INFO: # loops 1
09:06:19:ST3_smx:INFO: # loops 2
09:06:21:ST3_smx:INFO: Total # of broken channels: 0
09:06:21:ST3_smx:INFO: List of broken channels: []
09:06:21:ST3_smx:INFO: Total # of broken channels: 0
09:06:21:ST3_smx:INFO: List of broken channels: []
09:06:22:ST3_smx:INFO: chip: 12-5 40.898880 C 1165.571835 mV
09:06:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:06:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:06:22:ST3_smx:INFO: Electrons
09:06:22:ST3_smx:INFO: # loops 0
09:06:25:ST3_smx:INFO: # loops 1
09:06:26:ST3_smx:INFO: # loops 2
09:06:29:ST3_smx:INFO: Total # of broken channels: 0
09:06:29:ST3_smx:INFO: List of broken channels: []
09:06:29:ST3_smx:INFO: Total # of broken channels: 0
09:06:29:ST3_smx:INFO: List of broken channels: []
09:06:30:ST3_smx:INFO: chip: 7-6 40.898880 C 1165.571835 mV
09:06:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:06:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:06:30:ST3_smx:INFO: Electrons
09:06:30:ST3_smx:INFO: # loops 0
09:06:33:ST3_smx:INFO: # loops 1
09:06:35:ST3_smx:INFO: # loops 2
09:06:37:ST3_smx:INFO: Total # of broken channels: 0
09:06:37:ST3_smx:INFO: List of broken channels: []
09:06:37:ST3_smx:INFO: Total # of broken channels: 0
09:06:37:ST3_smx:INFO: List of broken channels: []
09:06:38:ST3_smx:INFO: chip: 14-7 44.073563 C 1159.654860 mV
09:06:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:06:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:06:39:ST3_smx:INFO: Electrons
09:06:39:ST3_smx:INFO: # loops 0
09:06:41:ST3_smx:INFO: # loops 1
09:06:43:ST3_smx:INFO: # loops 2
09:06:45:ST3_smx:INFO: Total # of broken channels: 0
09:06:45:ST3_smx:INFO: List of broken channels: []
09:06:45:ST3_smx:INFO: Total # of broken channels: 0
09:06:45:ST3_smx:INFO: List of broken channels: []
09:06:45:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:06:45:febtest:INFO: 01-00 | XA-000-09-004-023-016-011-13 | 40.9 | 1177.4
09:06:45:febtest:INFO: 08-01 | XA-000-09-004-023-013-022-01 | 40.9 | 1183.3
09:06:46:febtest:INFO: 03-02 | XA-000-09-004-023-004-010-07 | 34.6 | 1224.5
09:06:46:febtest:INFO: 10-03 | XA-000-09-004-023-016-020-10 | 34.6 | 1230.3
09:06:46:febtest:INFO: 05-04 | XA-000-09-004-023-004-009-07 | 37.7 | 1212.7
09:06:46:febtest:INFO: 12-05 | XA-000-09-004-023-007-022-14 | 44.1 | 1183.3
09:06:47:febtest:INFO: 07-06 | XA-000-09-004-023-007-009-09 | 44.1 | 1189.2
09:06:47:febtest:INFO: 14-07 | XA-000-09-004-023-010-022-09 | 47.3 | 1183.3
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_01_23-09_05_06
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3329| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.2910', '1.850', '2.4660', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9720', '1.850', '2.3150', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9880', '1.850', '0.5229', '0.000', '0.0000', '0.000', '0.0000']