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FEB_3332 27.01.26 11:03:18
Info
11:03:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:03:19:ST3_Shared:INFO: FEB-Microcable
11:03:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:03:19:febtest:INFO: Testing FEB with SN 3332
11:03:20:smx_tester:INFO: Scanning setup
11:03:20:elinks:INFO: Disabling clock on downlink 0
11:03:20:elinks:INFO: Disabling clock on downlink 1
11:03:20:elinks:INFO: Disabling clock on downlink 2
11:03:20:elinks:INFO: Disabling clock on downlink 3
11:03:20:elinks:INFO: Disabling clock on downlink 4
11:03:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:03:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:03:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:03:20:elinks:INFO: Disabling clock on downlink 0
11:03:20:elinks:INFO: Disabling clock on downlink 1
11:03:20:elinks:INFO: Disabling clock on downlink 2
11:03:20:elinks:INFO: Disabling clock on downlink 3
11:03:20:elinks:INFO: Disabling clock on downlink 4
11:03:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:03:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
11:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
11:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
11:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
11:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
11:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
11:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
11:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
11:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:03:20:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:03:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:03:20:elinks:INFO: Disabling clock on downlink 0
11:03:20:elinks:INFO: Disabling clock on downlink 1
11:03:20:elinks:INFO: Disabling clock on downlink 2
11:03:20:elinks:INFO: Disabling clock on downlink 3
11:03:20:elinks:INFO: Disabling clock on downlink 4
11:03:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:03:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:03:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:03:21:elinks:INFO: Disabling clock on downlink 0
11:03:21:elinks:INFO: Disabling clock on downlink 1
11:03:21:elinks:INFO: Disabling clock on downlink 2
11:03:21:elinks:INFO: Disabling clock on downlink 3
11:03:21:elinks:INFO: Disabling clock on downlink 4
11:03:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:03:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:03:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:03:21:elinks:INFO: Disabling clock on downlink 0
11:03:21:elinks:INFO: Disabling clock on downlink 1
11:03:21:elinks:INFO: Disabling clock on downlink 2
11:03:21:elinks:INFO: Disabling clock on downlink 3
11:03:21:elinks:INFO: Disabling clock on downlink 4
11:03:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:03:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:03:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:03:21:setup_element:INFO: Scanning clock phase
11:03:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:03:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:03:21:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:03:21:setup_element:INFO: Eye window for uplink 0 : ___________________________________________________________________________XXXXX
Clock Delay: 37
11:03:21:setup_element:INFO: Eye window for uplink 1 : ___________________________________________________________________________XXXXX
Clock Delay: 37
11:03:21:setup_element:INFO: Eye window for uplink 2 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
11:03:21:setup_element:INFO: Eye window for uplink 3 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
11:03:21:setup_element:INFO: Eye window for uplink 4 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:03:21:setup_element:INFO: Eye window for uplink 5 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:03:21:setup_element:INFO: Eye window for uplink 6 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:03:21:setup_element:INFO: Eye window for uplink 7 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:03:21:setup_element:INFO: Eye window for uplink 8 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:03:21:setup_element:INFO: Eye window for uplink 9 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:03:21:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:03:21:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:03:21:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:03:21:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:03:21:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:03:21:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:03:21:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
11:03:21:setup_element:INFO: Scanning data phases
11:03:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:03:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:03:26:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:03:27:setup_element:INFO: Eye window for uplink 0 : _______________XXXXXX___________________
Data delay found: 37
11:03:27:setup_element:INFO: Eye window for uplink 1 : _____________XXXX_______________________
Data delay found: 34
11:03:27:setup_element:INFO: Eye window for uplink 2 : __________XXXXX_________________________
Data delay found: 32
11:03:27:setup_element:INFO: Eye window for uplink 3 : _________XXXXX__________________________
Data delay found: 31
11:03:27:setup_element:INFO: Eye window for uplink 4 : ________XXXX____________________________
Data delay found: 29
11:03:27:setup_element:INFO: Eye window for uplink 5 : ______XXXXX_____________________________
Data delay found: 28
11:03:27:setup_element:INFO: Eye window for uplink 6 : XXXX__________________________________XX
Data delay found: 20
11:03:27:setup_element:INFO: Eye window for uplink 7 : XX___________________________________XXX
Data delay found: 19
11:03:27:setup_element:INFO: Eye window for uplink 8 : ____________________________XXXXXX______
Data delay found: 10
11:03:27:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXXX____
Data delay found: 13
11:03:27:setup_element:INFO: Eye window for uplink 10: ______________________________XXXXX_____
Data delay found: 12
11:03:27:setup_element:INFO: Eye window for uplink 11: _______________________________XXXXX____
Data delay found: 13
11:03:27:setup_element:INFO: Eye window for uplink 12: _____________________________XXXXX______
Data delay found: 11
11:03:27:setup_element:INFO: Eye window for uplink 13: _____________________________XXXXX______
Data delay found: 11
11:03:27:setup_element:INFO: Eye window for uplink 14: _____________________________XXXXX______
Data delay found: 11
11:03:27:setup_element:INFO: Eye window for uplink 15: _____________________________XXXXXX_____
Data delay found: 11
11:03:27:setup_element:INFO: Setting the data phase to 37 for uplink 0
11:03:27:setup_element:INFO: Setting the data phase to 34 for uplink 1
11:03:27:setup_element:INFO: Setting the data phase to 32 for uplink 2
11:03:27:setup_element:INFO: Setting the data phase to 31 for uplink 3
11:03:27:setup_element:INFO: Setting the data phase to 29 for uplink 4
11:03:27:setup_element:INFO: Setting the data phase to 28 for uplink 5
11:03:27:setup_element:INFO: Setting the data phase to 20 for uplink 6
11:03:27:setup_element:INFO: Setting the data phase to 19 for uplink 7
11:03:27:setup_element:INFO: Setting the data phase to 10 for uplink 8
11:03:27:setup_element:INFO: Setting the data phase to 13 for uplink 9
11:03:27:setup_element:INFO: Setting the data phase to 12 for uplink 10
11:03:27:setup_element:INFO: Setting the data phase to 13 for uplink 11
11:03:27:setup_element:INFO: Setting the data phase to 11 for uplink 12
11:03:27:setup_element:INFO: Setting the data phase to 11 for uplink 13
11:03:27:setup_element:INFO: Setting the data phase to 11 for uplink 14
11:03:27:setup_element:INFO: Setting the data phase to 11 for uplink 15
11:03:27:setup_element:INFO: Beginning SMX ASICs map scan
11:03:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:03:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:03:27:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:03:27:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:03:27:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:03:27:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:03:27:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:03:27:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:03:27:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:03:27:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:03:27:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:03:27:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:03:27:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:03:27:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:03:27:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:03:28:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:03:28:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:03:28:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:03:28:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:03:28:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:03:28:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:03:29:setup_element:INFO: Performing Elink synchronization
11:03:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:03:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:03:29:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:03:29:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:03:29:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:03:29:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
11:03:30:febtest:INFO: Init all SMX (CSA): 30
11:03:46:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:03:47:febtest:INFO: 01-00 | XA-000-09-004-023-015-025-02 | 21.9 | 1218.6
11:03:47:febtest:INFO: 08-01 | XA-000-09-004-023-015-023-02 | 31.4 | 1183.3
11:03:47:febtest:INFO: 03-02 | XA-000-09-004-023-012-025-12 | 28.2 | 1195.1
11:03:47:febtest:INFO: 10-03 | XA-000-09-004-023-015-024-02 | 28.2 | 1195.1
11:03:47:febtest:INFO: 05-04 | XA-000-09-004-023-009-025-07 | 37.7 | 1159.7
11:03:48:febtest:INFO: 12-05 | XA-000-09-004-023-012-024-12 | 31.4 | 1195.1
11:03:48:febtest:INFO: 07-06 | XA-000-09-004-023-006-024-03 | 44.1 | 1141.9
11:03:48:febtest:INFO: 14-07 | XA-000-09-004-023-009-024-07 | 18.7 | 1218.6
11:03:49:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:03:51:ST3_smx:INFO: chip: 1-0 21.902970 C 1224.468235 mV
11:03:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:03:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:03:51:ST3_smx:INFO: Electrons
11:03:51:ST3_smx:INFO: # loops 0
11:03:53:ST3_smx:INFO: # loops 1
11:03:55:ST3_smx:INFO: # loops 2
11:03:57:ST3_smx:INFO: Total # of broken channels: 0
11:03:57:ST3_smx:INFO: List of broken channels: []
11:03:57:ST3_smx:INFO: Total # of broken channels: 0
11:03:57:ST3_smx:INFO: List of broken channels: []
11:03:59:ST3_smx:INFO: chip: 8-1 34.556970 C 1195.082160 mV
11:03:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:03:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:03:59:ST3_smx:INFO: Electrons
11:03:59:ST3_smx:INFO: # loops 0
11:04:01:ST3_smx:INFO: # loops 1
11:04:03:ST3_smx:INFO: # loops 2
11:04:05:ST3_smx:INFO: Total # of broken channels: 0
11:04:05:ST3_smx:INFO: List of broken channels: []
11:04:05:ST3_smx:INFO: Total # of broken channels: 0
11:04:05:ST3_smx:INFO: List of broken channels: []
11:04:06:ST3_smx:INFO: chip: 3-2 28.225000 C 1206.851500 mV
11:04:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:06:ST3_smx:INFO: Electrons
11:04:06:ST3_smx:INFO: # loops 0
11:04:09:ST3_smx:INFO: # loops 1
11:04:11:ST3_smx:INFO: # loops 2
11:04:13:ST3_smx:INFO: Total # of broken channels: 0
11:04:13:ST3_smx:INFO: List of broken channels: []
11:04:13:ST3_smx:INFO: Total # of broken channels: 0
11:04:13:ST3_smx:INFO: List of broken channels: []
11:04:15:ST3_smx:INFO: chip: 10-3 28.225000 C 1212.728715 mV
11:04:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:15:ST3_smx:INFO: Electrons
11:04:15:ST3_smx:INFO: # loops 0
11:04:17:ST3_smx:INFO: # loops 1
11:04:18:ST3_smx:INFO: # loops 2
11:04:20:ST3_smx:INFO: Total # of broken channels: 0
11:04:20:ST3_smx:INFO: List of broken channels: []
11:04:20:ST3_smx:INFO: Total # of broken channels: 0
11:04:20:ST3_smx:INFO: List of broken channels: []
11:04:22:ST3_smx:INFO: chip: 5-4 40.898880 C 1177.390875 mV
11:04:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:22:ST3_smx:INFO: Electrons
11:04:22:ST3_smx:INFO: # loops 0
11:04:24:ST3_smx:INFO: # loops 1
11:04:26:ST3_smx:INFO: # loops 2
11:04:28:ST3_smx:INFO: Total # of broken channels: 0
11:04:28:ST3_smx:INFO: List of broken channels: []
11:04:28:ST3_smx:INFO: Total # of broken channels: 0
11:04:28:ST3_smx:INFO: List of broken channels: []
11:04:29:ST3_smx:INFO: chip: 12-5 31.389742 C 1206.851500 mV
11:04:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:29:ST3_smx:INFO: Electrons
11:04:29:ST3_smx:INFO: # loops 0
11:04:31:ST3_smx:INFO: # loops 1
11:04:33:ST3_smx:INFO: # loops 2
11:04:35:ST3_smx:INFO: Total # of broken channels: 0
11:04:35:ST3_smx:INFO: List of broken channels: []
11:04:35:ST3_smx:INFO: Total # of broken channels: 0
11:04:35:ST3_smx:INFO: List of broken channels: []
11:04:37:ST3_smx:INFO: chip: 7-6 44.073563 C 1153.732915 mV
11:04:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:37:ST3_smx:INFO: Electrons
11:04:37:ST3_smx:INFO: # loops 0
11:04:38:ST3_smx:INFO: # loops 1
11:04:41:ST3_smx:INFO: # loops 2
11:04:43:ST3_smx:INFO: Total # of broken channels: 0
11:04:43:ST3_smx:INFO: List of broken channels: []
11:04:43:ST3_smx:INFO: Total # of broken channels: 0
11:04:43:ST3_smx:INFO: List of broken channels: []
11:04:44:ST3_smx:INFO: chip: 14-7 25.062742 C 1230.330540 mV
11:04:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:44:ST3_smx:INFO: Electrons
11:04:44:ST3_smx:INFO: # loops 0
11:04:46:ST3_smx:INFO: # loops 1
11:04:48:ST3_smx:INFO: # loops 2
11:04:50:ST3_smx:INFO: Total # of broken channels: 0
11:04:50:ST3_smx:INFO: List of broken channels: []
11:04:50:ST3_smx:INFO: Total # of broken channels: 0
11:04:50:ST3_smx:INFO: List of broken channels: []
11:04:50:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:04:50:febtest:INFO: 01-00 | XA-000-09-004-023-015-025-02 | 25.1 | 1247.9
11:04:51:febtest:INFO: 08-01 | XA-000-09-004-023-015-023-02 | 37.7 | 1218.6
11:04:51:febtest:INFO: 03-02 | XA-000-09-004-023-012-025-12 | 31.4 | 1230.3
11:04:51:febtest:INFO: 10-03 | XA-000-09-004-023-015-024-02 | 31.4 | 1230.3
11:04:51:febtest:INFO: 05-04 | XA-000-09-004-023-009-025-07 | 40.9 | 1195.1
11:04:51:febtest:INFO: 12-05 | XA-000-09-004-023-012-024-12 | 34.6 | 1230.3
11:04:52:febtest:INFO: 07-06 | XA-000-09-004-023-006-024-03 | 47.3 | 1171.5
11:04:52:febtest:INFO: 14-07 | XA-000-09-004-023-009-024-07 | 25.1 | 1253.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_01_27-11_03_18
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3332| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.8930', '1.850', '2.2470', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9940', '1.850', '2.3870', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9510', '1.850', '0.5162', '0.000', '0.0000', '0.000', '0.0000']