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FEB_3340 03.02.26 08:51:43
Info
08:51:43:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:51:43:ST3_Shared:INFO: FEB-Microcable
08:51:43:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:51:43:febtest:INFO: Testing FEB with SN 3340
08:51:45:smx_tester:INFO: Scanning setup
08:51:45:elinks:INFO: Disabling clock on downlink 0
08:51:45:elinks:INFO: Disabling clock on downlink 1
08:51:45:elinks:INFO: Disabling clock on downlink 2
08:51:45:elinks:INFO: Disabling clock on downlink 3
08:51:45:elinks:INFO: Disabling clock on downlink 4
08:51:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:51:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:51:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:51:45:elinks:INFO: Disabling clock on downlink 0
08:51:45:elinks:INFO: Disabling clock on downlink 1
08:51:45:elinks:INFO: Disabling clock on downlink 2
08:51:45:elinks:INFO: Disabling clock on downlink 3
08:51:45:elinks:INFO: Disabling clock on downlink 4
08:51:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:51:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:51:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
08:51:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
08:51:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
08:51:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
08:51:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
08:51:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
08:51:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
08:51:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
08:51:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:51:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:51:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:51:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:51:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:51:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:51:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:51:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:51:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:51:45:elinks:INFO: Disabling clock on downlink 0
08:51:45:elinks:INFO: Disabling clock on downlink 1
08:51:45:elinks:INFO: Disabling clock on downlink 2
08:51:45:elinks:INFO: Disabling clock on downlink 3
08:51:45:elinks:INFO: Disabling clock on downlink 4
08:51:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:51:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:51:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:51:45:elinks:INFO: Disabling clock on downlink 0
08:51:45:elinks:INFO: Disabling clock on downlink 1
08:51:45:elinks:INFO: Disabling clock on downlink 2
08:51:45:elinks:INFO: Disabling clock on downlink 3
08:51:45:elinks:INFO: Disabling clock on downlink 4
08:51:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:51:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:51:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:51:45:elinks:INFO: Disabling clock on downlink 0
08:51:45:elinks:INFO: Disabling clock on downlink 1
08:51:45:elinks:INFO: Disabling clock on downlink 2
08:51:45:elinks:INFO: Disabling clock on downlink 3
08:51:45:elinks:INFO: Disabling clock on downlink 4
08:51:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:51:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:51:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:51:45:setup_element:INFO: Scanning clock phase
08:51:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:51:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:51:46:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:51:46:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________________XXXXX__
Clock Delay: 35
08:51:46:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________________XXXXX__
Clock Delay: 35
08:51:46:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:51:46:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:51:46:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:51:46:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:51:46:setup_element:INFO: Eye window for uplink 6 : _________________________________________________________________________XXXXX__
Clock Delay: 35
08:51:46:setup_element:INFO: Eye window for uplink 7 : _________________________________________________________________________XXXXX__
Clock Delay: 35
08:51:46:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
08:51:46:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
08:51:46:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:51:46:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:51:46:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:51:46:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:51:46:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:51:46:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:51:46:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
08:51:46:setup_element:INFO: Scanning data phases
08:51:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:51:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:51:51:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:51:51:setup_element:INFO: Eye window for uplink 0 : _____________XXXX_______________________
Data delay found: 34
08:51:51:setup_element:INFO: Eye window for uplink 1 : __________XXXXX_________________________
Data delay found: 32
08:51:51:setup_element:INFO: Eye window for uplink 2 : _________XXXXX__________________________
Data delay found: 31
08:51:51:setup_element:INFO: Eye window for uplink 3 : _________XXXX___________________________
Data delay found: 30
08:51:51:setup_element:INFO: Eye window for uplink 4 : _______XXXX_____________________________
Data delay found: 28
08:51:51:setup_element:INFO: Eye window for uplink 5 : ______XXXXX_____________________________
Data delay found: 28
08:51:51:setup_element:INFO: Eye window for uplink 6 : ___XXXX_________________________________
Data delay found: 24
08:51:51:setup_element:INFO: Eye window for uplink 7 : _XXXX___________________________________
Data delay found: 22
08:51:51:setup_element:INFO: Eye window for uplink 8 : ___________________________XXXXXX_______
Data delay found: 9
08:51:51:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXX_____
Data delay found: 12
08:51:51:setup_element:INFO: Eye window for uplink 10: ________________________________XXXXXX__
Data delay found: 14
08:51:51:setup_element:INFO: Eye window for uplink 11: _________________________________XXXXXX_
Data delay found: 15
08:51:51:setup_element:INFO: Eye window for uplink 12: __________________________________XXXX__
Data delay found: 15
08:51:51:setup_element:INFO: Eye window for uplink 13: __________________________________XXXX__
Data delay found: 15
08:51:51:setup_element:INFO: Eye window for uplink 14: _______________________________XXXXXX___
Data delay found: 13
08:51:51:setup_element:INFO: Eye window for uplink 15: _______________________________XXXXXX___
Data delay found: 13
08:51:51:setup_element:INFO: Setting the data phase to 34 for uplink 0
08:51:51:setup_element:INFO: Setting the data phase to 32 for uplink 1
08:51:51:setup_element:INFO: Setting the data phase to 31 for uplink 2
08:51:51:setup_element:INFO: Setting the data phase to 30 for uplink 3
08:51:51:setup_element:INFO: Setting the data phase to 28 for uplink 4
08:51:51:setup_element:INFO: Setting the data phase to 28 for uplink 5
08:51:51:setup_element:INFO: Setting the data phase to 24 for uplink 6
08:51:51:setup_element:INFO: Setting the data phase to 22 for uplink 7
08:51:51:setup_element:INFO: Setting the data phase to 9 for uplink 8
08:51:51:setup_element:INFO: Setting the data phase to 12 for uplink 9
08:51:51:setup_element:INFO: Setting the data phase to 14 for uplink 10
08:51:51:setup_element:INFO: Setting the data phase to 15 for uplink 11
08:51:51:setup_element:INFO: Setting the data phase to 15 for uplink 12
08:51:51:setup_element:INFO: Setting the data phase to 15 for uplink 13
08:51:51:setup_element:INFO: Setting the data phase to 13 for uplink 14
08:51:51:setup_element:INFO: Setting the data phase to 13 for uplink 15
08:51:51:setup_element:INFO: Beginning SMX ASICs map scan
08:51:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:51:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:51:51:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:51:51:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:51:51:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:51:51:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:51:51:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:51:51:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:51:51:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:51:51:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:51:51:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:51:51:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:51:51:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:51:52:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:51:52:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:51:52:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:51:52:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:51:52:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:51:52:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:51:52:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:51:52:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:51:53:setup_element:INFO: Performing Elink synchronization
08:51:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:51:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:51:53:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:51:54:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:51:54:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:51:54:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
08:51:54:febtest:INFO: Init all SMX (CSA): 30
08:52:08:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:52:08:febtest:INFO: 01-00 | XA-000-09-004-023-011-014-03 | 37.7 | 1159.7
08:52:08:febtest:INFO: 08-01 | XA-000-09-004-023-014-014-08 | 37.7 | 1165.6
08:52:08:febtest:INFO: 03-02 | XA-000-09-004-023-008-014-13 | 47.3 | 1124.0
08:52:09:febtest:INFO: 10-03 | XA-000-09-004-023-017-014-00 | 31.4 | 1171.5
08:52:09:febtest:INFO: 05-04 | XA-000-09-004-023-005-014-10 | 37.7 | 1159.7
08:52:09:febtest:INFO: 12-05 | XA-000-09-004-023-017-013-00 | 31.4 | 1177.4
08:52:09:febtest:INFO: 07-06 | XA-000-09-004-023-002-014-02 | 25.1 | 1201.0
08:52:09:febtest:INFO: 14-07 | XA-000-09-004-023-014-013-08 | 28.2 | 1189.2
08:52:10:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
08:52:12:ST3_smx:INFO: chip: 1-0 37.726682 C 1171.483840 mV
08:52:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:52:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:52:12:ST3_smx:INFO: Electrons
08:52:12:ST3_smx:INFO: # loops 0
08:52:14:ST3_smx:INFO: # loops 1
08:52:16:ST3_smx:INFO: # loops 2
08:52:18:ST3_smx:INFO: Total # of broken channels: 0
08:52:18:ST3_smx:INFO: List of broken channels: []
08:52:18:ST3_smx:INFO: Total # of broken channels: 0
08:52:18:ST3_smx:INFO: List of broken channels: []
08:52:19:ST3_smx:INFO: chip: 8-1 34.556970 C 1177.390875 mV
08:52:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:52:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:52:19:ST3_smx:INFO: Electrons
08:52:19:ST3_smx:INFO: # loops 0
08:52:21:ST3_smx:INFO: # loops 1
08:52:23:ST3_smx:INFO: # loops 2
08:52:24:ST3_smx:INFO: Total # of broken channels: 0
08:52:24:ST3_smx:INFO: List of broken channels: []
08:52:24:ST3_smx:INFO: Total # of broken channels: 0
08:52:24:ST3_smx:INFO: List of broken channels: []
08:52:26:ST3_smx:INFO: chip: 3-2 47.250730 C 1141.874115 mV
08:52:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:52:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:52:26:ST3_smx:INFO: Electrons
08:52:26:ST3_smx:INFO: # loops 0
08:52:27:ST3_smx:INFO: # loops 1
08:52:29:ST3_smx:INFO: # loops 2
08:52:31:ST3_smx:INFO: Total # of broken channels: 0
08:52:31:ST3_smx:INFO: List of broken channels: []
08:52:31:ST3_smx:INFO: Total # of broken channels: 0
08:52:31:ST3_smx:INFO: List of broken channels: []
08:52:32:ST3_smx:INFO: chip: 10-3 34.556970 C 1189.190035 mV
08:52:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:52:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:52:32:ST3_smx:INFO: Electrons
08:52:32:ST3_smx:INFO: # loops 0
08:52:34:ST3_smx:INFO: # loops 1
08:52:36:ST3_smx:INFO: # loops 2
08:52:37:ST3_smx:INFO: Total # of broken channels: 0
08:52:37:ST3_smx:INFO: List of broken channels: []
08:52:37:ST3_smx:INFO: Total # of broken channels: 0
08:52:37:ST3_smx:INFO: List of broken channels: []
08:52:39:ST3_smx:INFO: chip: 5-4 40.898880 C 1171.483840 mV
08:52:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:52:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:52:39:ST3_smx:INFO: Electrons
08:52:39:ST3_smx:INFO: # loops 0
08:52:41:ST3_smx:INFO: # loops 1
08:52:42:ST3_smx:INFO: # loops 2
08:52:44:ST3_smx:INFO: Total # of broken channels: 0
08:52:44:ST3_smx:INFO: List of broken channels: []
08:52:44:ST3_smx:INFO: Total # of broken channels: 0
08:52:44:ST3_smx:INFO: List of broken channels: []
08:52:45:ST3_smx:INFO: chip: 12-5 31.389742 C 1195.082160 mV
08:52:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:52:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:52:45:ST3_smx:INFO: Electrons
08:52:45:ST3_smx:INFO: # loops 0
08:52:47:ST3_smx:INFO: # loops 1
08:52:49:ST3_smx:INFO: # loops 2
08:52:50:ST3_smx:INFO: Total # of broken channels: 0
08:52:50:ST3_smx:INFO: List of broken channels: []
08:52:50:ST3_smx:INFO: Total # of broken channels: 0
08:52:50:ST3_smx:INFO: List of broken channels: []
08:52:52:ST3_smx:INFO: chip: 7-6 28.225000 C 1212.728715 mV
08:52:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:52:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:52:52:ST3_smx:INFO: Electrons
08:52:52:ST3_smx:INFO: # loops 0
08:52:53:ST3_smx:INFO: # loops 1
08:52:55:ST3_smx:INFO: # loops 2
08:52:56:ST3_smx:INFO: Total # of broken channels: 0
08:52:56:ST3_smx:INFO: List of broken channels: []
08:52:56:ST3_smx:INFO: Total # of broken channels: 0
08:52:56:ST3_smx:INFO: List of broken channels: []
08:52:58:ST3_smx:INFO: chip: 14-7 31.389742 C 1200.969315 mV
08:52:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:52:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:52:58:ST3_smx:INFO: Electrons
08:52:58:ST3_smx:INFO: # loops 0
08:52:59:ST3_smx:INFO: # loops 1
08:53:01:ST3_smx:INFO: # loops 2
08:53:02:ST3_smx:INFO: Total # of broken channels: 0
08:53:02:ST3_smx:INFO: List of broken channels: []
08:53:02:ST3_smx:INFO: Total # of broken channels: 0
08:53:02:ST3_smx:INFO: List of broken channels: []
08:53:03:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:53:03:febtest:INFO: 01-00 | XA-000-09-004-023-011-014-03 | 40.9 | 1189.2
08:53:03:febtest:INFO: 08-01 | XA-000-09-004-023-014-014-08 | 37.7 | 1201.0
08:53:03:febtest:INFO: 03-02 | XA-000-09-004-023-008-014-13 | 50.4 | 1165.6
08:53:03:febtest:INFO: 10-03 | XA-000-09-004-023-017-014-00 | 34.6 | 1206.9
08:53:04:febtest:INFO: 05-04 | XA-000-09-004-023-005-014-10 | 40.9 | 1195.1
08:53:04:febtest:INFO: 12-05 | XA-000-09-004-023-017-013-00 | 34.6 | 1212.7
08:53:04:febtest:INFO: 07-06 | XA-000-09-004-023-002-014-02 | 28.2 | 1230.3
08:53:04:febtest:INFO: 14-07 | XA-000-09-004-023-014-013-08 | 31.4 | 1224.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_02_03-08_51_43
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3340| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5770', '1.850', '2.4430', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0320', '1.850', '2.3490', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9720', '1.850', '0.5268', '0.000', '0.0000', '0.000', '0.0000']