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FEB_3342 10.02.26 11:20:31
Info
11:20:31:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:20:32:ST3_Shared:INFO: FEB-Microcable
11:20:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:20:32:febtest:INFO: Testing FEB with SN 3342
11:20:33:smx_tester:INFO: Scanning setup
11:20:33:elinks:INFO: Disabling clock on downlink 0
11:20:33:elinks:INFO: Disabling clock on downlink 1
11:20:33:elinks:INFO: Disabling clock on downlink 2
11:20:33:elinks:INFO: Disabling clock on downlink 3
11:20:33:elinks:INFO: Disabling clock on downlink 4
11:20:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:20:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:20:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:20:33:elinks:INFO: Disabling clock on downlink 0
11:20:33:elinks:INFO: Disabling clock on downlink 1
11:20:33:elinks:INFO: Disabling clock on downlink 2
11:20:33:elinks:INFO: Disabling clock on downlink 3
11:20:33:elinks:INFO: Disabling clock on downlink 4
11:20:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:20:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:20:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
11:20:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
11:20:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
11:20:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
11:20:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
11:20:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
11:20:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
11:20:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
11:20:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:20:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:20:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:20:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:20:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:20:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:20:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:20:33:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:20:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:20:33:elinks:INFO: Disabling clock on downlink 0
11:20:33:elinks:INFO: Disabling clock on downlink 1
11:20:33:elinks:INFO: Disabling clock on downlink 2
11:20:33:elinks:INFO: Disabling clock on downlink 3
11:20:33:elinks:INFO: Disabling clock on downlink 4
11:20:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:20:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:20:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:20:34:elinks:INFO: Disabling clock on downlink 0
11:20:34:elinks:INFO: Disabling clock on downlink 1
11:20:34:elinks:INFO: Disabling clock on downlink 2
11:20:34:elinks:INFO: Disabling clock on downlink 3
11:20:34:elinks:INFO: Disabling clock on downlink 4
11:20:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:20:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:20:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:20:34:elinks:INFO: Disabling clock on downlink 0
11:20:34:elinks:INFO: Disabling clock on downlink 1
11:20:34:elinks:INFO: Disabling clock on downlink 2
11:20:34:elinks:INFO: Disabling clock on downlink 3
11:20:34:elinks:INFO: Disabling clock on downlink 4
11:20:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:20:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:20:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:20:34:setup_element:INFO: Scanning clock phase
11:20:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:20:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:20:34:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:20:34:setup_element:INFO: Eye window for uplink 0 : __________________________________________________________________________XXXXX_
Clock Delay: 36
11:20:34:setup_element:INFO: Eye window for uplink 1 : __________________________________________________________________________XXXXX_
Clock Delay: 36
11:20:34:setup_element:INFO: Eye window for uplink 2 : __________________________________________________________________________XXXXXX
Clock Delay: 36
11:20:34:setup_element:INFO: Eye window for uplink 3 : __________________________________________________________________________XXXXXX
Clock Delay: 36
11:20:34:setup_element:INFO: Eye window for uplink 4 : __________________________________________________________________________XXXXXX
Clock Delay: 36
11:20:34:setup_element:INFO: Eye window for uplink 5 : __________________________________________________________________________XXXXXX
Clock Delay: 36
11:20:34:setup_element:INFO: Eye window for uplink 6 : __________________________________________________________________________XXXXX_
Clock Delay: 36
11:20:34:setup_element:INFO: Eye window for uplink 7 : __________________________________________________________________________XXXXX_
Clock Delay: 36
11:20:34:setup_element:INFO: Eye window for uplink 8 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:20:34:setup_element:INFO: Eye window for uplink 9 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:20:34:setup_element:INFO: Eye window for uplink 10: __________________________________________________________________________XXXX__
Clock Delay: 35
11:20:34:setup_element:INFO: Eye window for uplink 11: __________________________________________________________________________XXXX__
Clock Delay: 35
11:20:34:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXX___
Clock Delay: 34
11:20:34:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXX___
Clock Delay: 34
11:20:34:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXX____
Clock Delay: 33
11:20:34:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXX____
Clock Delay: 33
11:20:34:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
11:20:34:setup_element:INFO: Scanning data phases
11:20:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:20:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:20:39:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:20:39:setup_element:INFO: Eye window for uplink 0 : _____________XXXXX______________________
Data delay found: 35
11:20:39:setup_element:INFO: Eye window for uplink 1 : __________XXXXX_________________________
Data delay found: 32
11:20:39:setup_element:INFO: Eye window for uplink 2 : _________XXXXX__________________________
Data delay found: 31
11:20:39:setup_element:INFO: Eye window for uplink 3 : ________XXXXX___________________________
Data delay found: 30
11:20:39:setup_element:INFO: Eye window for uplink 4 : _________XXXXX__________________________
Data delay found: 31
11:20:39:setup_element:INFO: Eye window for uplink 5 : ________XXXXX___________________________
Data delay found: 30
11:20:39:setup_element:INFO: Eye window for uplink 6 : _XXXXX__________________________________
Data delay found: 23
11:20:39:setup_element:INFO: Eye window for uplink 7 : XXXX__________________________________XX
Data delay found: 20
11:20:39:setup_element:INFO: Eye window for uplink 8 : ______________________________XXXXX_____
Data delay found: 12
11:20:39:setup_element:INFO: Eye window for uplink 9 : ________________________________XXXXX___
Data delay found: 14
11:20:39:setup_element:INFO: Eye window for uplink 10: _________________________________XXXXX__
Data delay found: 15
11:20:39:setup_element:INFO: Eye window for uplink 11: __________________________________XXXXX_
Data delay found: 16
11:20:39:setup_element:INFO: Eye window for uplink 12: _____________________________XXXXX______
Data delay found: 11
11:20:39:setup_element:INFO: Eye window for uplink 13: ______________________________XXXX______
Data delay found: 11
11:20:39:setup_element:INFO: Eye window for uplink 14: _____________________________XXXX_______
Data delay found: 10
11:20:39:setup_element:INFO: Eye window for uplink 15: _____________________________XXXXX______
Data delay found: 11
11:20:39:setup_element:INFO: Setting the data phase to 35 for uplink 0
11:20:39:setup_element:INFO: Setting the data phase to 32 for uplink 1
11:20:39:setup_element:INFO: Setting the data phase to 31 for uplink 2
11:20:39:setup_element:INFO: Setting the data phase to 30 for uplink 3
11:20:39:setup_element:INFO: Setting the data phase to 31 for uplink 4
11:20:39:setup_element:INFO: Setting the data phase to 30 for uplink 5
11:20:39:setup_element:INFO: Setting the data phase to 23 for uplink 6
11:20:39:setup_element:INFO: Setting the data phase to 20 for uplink 7
11:20:39:setup_element:INFO: Setting the data phase to 12 for uplink 8
11:20:39:setup_element:INFO: Setting the data phase to 14 for uplink 9
11:20:39:setup_element:INFO: Setting the data phase to 15 for uplink 10
11:20:39:setup_element:INFO: Setting the data phase to 16 for uplink 11
11:20:39:setup_element:INFO: Setting the data phase to 11 for uplink 12
11:20:39:setup_element:INFO: Setting the data phase to 11 for uplink 13
11:20:39:setup_element:INFO: Setting the data phase to 10 for uplink 14
11:20:39:setup_element:INFO: Setting the data phase to 11 for uplink 15
11:20:39:setup_element:INFO: Beginning SMX ASICs map scan
11:20:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:20:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:20:39:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:20:39:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:20:39:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:20:40:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:20:40:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:20:40:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:20:40:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:20:40:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:20:40:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:20:40:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:20:40:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:20:40:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:20:40:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:20:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:20:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:20:41:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:20:41:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:20:41:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:20:41:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:20:42:setup_element:INFO: Performing Elink synchronization
11:20:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:20:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:20:42:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:20:42:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:20:42:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:20:42:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
11:20:43:febtest:INFO: Init all SMX (CSA): 30
11:20:57:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:20:57:febtest:INFO: 01-00 | XA-000-09-004-023-011-003-03 | 44.1 | 1141.9
11:20:58:febtest:INFO: 08-01 | XA-000-09-004-023-011-002-03 | 53.6 | 1118.1
11:20:58:febtest:INFO: 03-02 | XA-000-09-004-023-008-003-13 | 50.4 | 1124.0
11:20:58:febtest:INFO: 10-03 | XA-000-09-004-023-008-002-13 | 47.3 | 1141.9
11:20:58:febtest:INFO: 05-04 | XA-000-09-004-023-013-026-01 | 31.4 | 1189.2
11:20:58:febtest:INFO: 12-05 | XA-000-09-004-023-014-012-08 | 47.3 | 1153.7
11:20:59:febtest:INFO: 07-06 | XA-000-09-004-023-010-027-09 | 37.7 | 1171.5
11:20:59:febtest:INFO: 14-07 | XA-000-09-004-023-008-012-13 | 44.1 | 1153.7
11:21:00:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:21:02:ST3_smx:INFO: chip: 1-0 44.073563 C 1159.654860 mV
11:21:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:21:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:21:02:ST3_smx:INFO: Electrons
11:21:02:ST3_smx:INFO: # loops 0
11:21:03:ST3_smx:INFO: # loops 1
11:21:05:ST3_smx:INFO: # loops 2
11:21:07:ST3_smx:INFO: Total # of broken channels: 0
11:21:07:ST3_smx:INFO: List of broken channels: []
11:21:07:ST3_smx:INFO: Total # of broken channels: 0
11:21:07:ST3_smx:INFO: List of broken channels: []
11:21:09:ST3_smx:INFO: chip: 8-1 56.797143 C 1135.937260 mV
11:21:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:21:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:21:09:ST3_smx:INFO: Electrons
11:21:09:ST3_smx:INFO: # loops 0
11:21:10:ST3_smx:INFO: # loops 1
11:21:12:ST3_smx:INFO: # loops 2
11:21:14:ST3_smx:INFO: Total # of broken channels: 0
11:21:14:ST3_smx:INFO: List of broken channels: []
11:21:14:ST3_smx:INFO: Total # of broken channels: 0
11:21:14:ST3_smx:INFO: List of broken channels: []
11:21:15:ST3_smx:INFO: chip: 3-2 53.612520 C 1141.874115 mV
11:21:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:21:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:21:15:ST3_smx:INFO: Electrons
11:21:15:ST3_smx:INFO: # loops 0
11:21:17:ST3_smx:INFO: # loops 1
11:21:18:ST3_smx:INFO: # loops 2
11:21:20:ST3_smx:INFO: Total # of broken channels: 0
11:21:20:ST3_smx:INFO: List of broken channels: []
11:21:20:ST3_smx:INFO: Total # of broken channels: 0
11:21:20:ST3_smx:INFO: List of broken channels: []
11:21:22:ST3_smx:INFO: chip: 10-3 53.612520 C 1159.654860 mV
11:21:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:21:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:21:22:ST3_smx:INFO: Electrons
11:21:22:ST3_smx:INFO: # loops 0
11:21:23:ST3_smx:INFO: # loops 1
11:21:25:ST3_smx:INFO: # loops 2
11:21:27:ST3_smx:INFO: Total # of broken channels: 0
11:21:27:ST3_smx:INFO: List of broken channels: []
11:21:27:ST3_smx:INFO: Total # of broken channels: 0
11:21:27:ST3_smx:INFO: List of broken channels: []
11:21:28:ST3_smx:INFO: chip: 5-4 37.726682 C 1206.851500 mV
11:21:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:21:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:21:28:ST3_smx:INFO: Electrons
11:21:28:ST3_smx:INFO: # loops 0
11:21:30:ST3_smx:INFO: # loops 1
11:21:32:ST3_smx:INFO: # loops 2
11:21:34:ST3_smx:INFO: Total # of broken channels: 0
11:21:34:ST3_smx:INFO: List of broken channels: []
11:21:34:ST3_smx:INFO: Total # of broken channels: 0
11:21:34:ST3_smx:INFO: List of broken channels: []
11:21:35:ST3_smx:INFO: chip: 12-5 53.612520 C 1165.571835 mV
11:21:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:21:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:21:35:ST3_smx:INFO: Electrons
11:21:35:ST3_smx:INFO: # loops 0
11:21:37:ST3_smx:INFO: # loops 1
11:21:38:ST3_smx:INFO: # loops 2
11:21:40:ST3_smx:INFO: Total # of broken channels: 0
11:21:40:ST3_smx:INFO: List of broken channels: []
11:21:40:ST3_smx:INFO: Total # of broken channels: 0
11:21:40:ST3_smx:INFO: List of broken channels: []
11:21:42:ST3_smx:INFO: chip: 7-6 44.073563 C 1200.969315 mV
11:21:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:21:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:21:42:ST3_smx:INFO: Electrons
11:21:42:ST3_smx:INFO: # loops 0
11:21:43:ST3_smx:INFO: # loops 1
11:21:45:ST3_smx:INFO: # loops 2
11:21:47:ST3_smx:INFO: Total # of broken channels: 0
11:21:47:ST3_smx:INFO: List of broken channels: []
11:21:47:ST3_smx:INFO: Total # of broken channels: 0
11:21:47:ST3_smx:INFO: List of broken channels: []
11:21:48:ST3_smx:INFO: chip: 14-7 53.612520 C 1165.571835 mV
11:21:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:21:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:21:48:ST3_smx:INFO: Electrons
11:21:48:ST3_smx:INFO: # loops 0
11:21:50:ST3_smx:INFO: # loops 1
11:21:52:ST3_smx:INFO: # loops 2
11:21:53:ST3_smx:INFO: Total # of broken channels: 0
11:21:53:ST3_smx:INFO: List of broken channels: []
11:21:53:ST3_smx:INFO: Total # of broken channels: 0
11:21:53:ST3_smx:INFO: List of broken channels: []
11:21:54:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:21:54:febtest:INFO: 01-00 | XA-000-09-004-023-011-003-03 | 53.6 | 1183.3
11:21:54:febtest:INFO: 08-01 | XA-000-09-004-023-011-002-03 | 60.0 | 1183.3
11:21:54:febtest:INFO: 03-02 | XA-000-09-004-023-008-003-13 | 60.0 | 1165.6
11:21:54:febtest:INFO: 10-03 | XA-000-09-004-023-008-002-13 | 60.0 | 1177.4
11:21:55:febtest:INFO: 05-04 | XA-000-09-004-023-013-026-01 | 44.1 | 1230.3
11:21:55:febtest:INFO: 12-05 | XA-000-09-004-023-014-012-08 | 56.8 | 1189.2
11:21:55:febtest:INFO: 07-06 | XA-000-09-004-023-010-027-09 | 44.1 | 1259.6
11:21:55:febtest:INFO: 14-07 | XA-000-09-004-023-008-012-13 | 56.8 | 1195.1
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_02_10-11_20_31
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3342| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5830', '1.850', '2.3920', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0490', '1.850', '2.3650', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9980', '1.850', '0.5288', '0.000', '0.0000', '0.000', '0.0000']