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FEB_3346 11.02.26 10:15:29
Info
10:15:29:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:15:29:ST3_Shared:INFO: FEB-Microcable
10:15:29:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:15:29:febtest:INFO: Testing FEB with SN 3346
10:15:31:smx_tester:INFO: Scanning setup
10:15:31:elinks:INFO: Disabling clock on downlink 0
10:15:31:elinks:INFO: Disabling clock on downlink 1
10:15:31:elinks:INFO: Disabling clock on downlink 2
10:15:31:elinks:INFO: Disabling clock on downlink 3
10:15:31:elinks:INFO: Disabling clock on downlink 4
10:15:31:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:15:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:15:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:15:31:elinks:INFO: Disabling clock on downlink 0
10:15:31:elinks:INFO: Disabling clock on downlink 1
10:15:31:elinks:INFO: Disabling clock on downlink 2
10:15:31:elinks:INFO: Disabling clock on downlink 3
10:15:31:elinks:INFO: Disabling clock on downlink 4
10:15:31:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:15:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:15:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
10:15:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
10:15:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
10:15:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
10:15:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
10:15:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
10:15:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
10:15:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
10:15:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
10:15:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
10:15:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
10:15:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
10:15:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
10:15:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
10:15:31:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
10:15:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:15:31:elinks:INFO: Disabling clock on downlink 0
10:15:31:elinks:INFO: Disabling clock on downlink 1
10:15:31:elinks:INFO: Disabling clock on downlink 2
10:15:31:elinks:INFO: Disabling clock on downlink 3
10:15:31:elinks:INFO: Disabling clock on downlink 4
10:15:31:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:15:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:15:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:15:31:elinks:INFO: Disabling clock on downlink 0
10:15:31:elinks:INFO: Disabling clock on downlink 1
10:15:31:elinks:INFO: Disabling clock on downlink 2
10:15:31:elinks:INFO: Disabling clock on downlink 3
10:15:31:elinks:INFO: Disabling clock on downlink 4
10:15:31:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:15:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:15:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:15:31:elinks:INFO: Disabling clock on downlink 0
10:15:31:elinks:INFO: Disabling clock on downlink 1
10:15:31:elinks:INFO: Disabling clock on downlink 2
10:15:31:elinks:INFO: Disabling clock on downlink 3
10:15:31:elinks:INFO: Disabling clock on downlink 4
10:15:31:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:15:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:15:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:15:31:setup_element:INFO: Scanning clock phase
10:15:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:15:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:15:32:setup_element:INFO: Clock phase scan results for group 0, downlink 1
10:15:32:setup_element:INFO: Eye window for uplink 1 : ___________________________________________________________________________XXXX_
Clock Delay: 36
10:15:32:setup_element:INFO: Eye window for uplink 2 : _________________________________________________________________________XXXX___
Clock Delay: 34
10:15:32:setup_element:INFO: Eye window for uplink 3 : _________________________________________________________________________XXXX___
Clock Delay: 34
10:15:32:setup_element:INFO: Eye window for uplink 4 : _________________________________________________________________________XXXX___
Clock Delay: 34
10:15:32:setup_element:INFO: Eye window for uplink 5 : _________________________________________________________________________XXXX___
Clock Delay: 34
10:15:32:setup_element:INFO: Eye window for uplink 6 : _________________________________________________________________________XXXXX__
Clock Delay: 35
10:15:32:setup_element:INFO: Eye window for uplink 7 : _________________________________________________________________________XXXXX__
Clock Delay: 35
10:15:32:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:15:32:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:15:32:setup_element:INFO: Eye window for uplink 10: _________________________________________________________________________XXXXX__
Clock Delay: 35
10:15:32:setup_element:INFO: Eye window for uplink 11: _________________________________________________________________________XXXXX__
Clock Delay: 35
10:15:32:setup_element:INFO: Eye window for uplink 12: __________________________________________________________________________XXXX__
Clock Delay: 35
10:15:32:setup_element:INFO: Eye window for uplink 13: __________________________________________________________________________XXXX__
Clock Delay: 35
10:15:32:setup_element:INFO: Eye window for uplink 14: _________________________________________________________________________XXXXXX_
Clock Delay: 35
10:15:32:setup_element:INFO: Eye window for uplink 15: _________________________________________________________________________XXXXXX_
Clock Delay: 35
10:15:32:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
10:15:32:setup_element:INFO: Scanning data phases
10:15:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:15:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:15:37:setup_element:INFO: Data phase scan results for group 0, downlink 1
10:15:37:setup_element:INFO: Eye window for uplink 1 : ___________XXXXX________________________
Data delay found: 33
10:15:37:setup_element:INFO: Eye window for uplink 2 : _______XXXXX____________________________
Data delay found: 29
10:15:37:setup_element:INFO: Eye window for uplink 3 : _______XXXX_____________________________
Data delay found: 28
10:15:37:setup_element:INFO: Eye window for uplink 4 : ____XXXX________________________________
Data delay found: 25
10:15:37:setup_element:INFO: Eye window for uplink 5 : ___XXXXX________________________________
Data delay found: 25
10:15:37:setup_element:INFO: Eye window for uplink 6 : XX___________________________________XXX
Data delay found: 19
10:15:37:setup_element:INFO: Eye window for uplink 7 : X__________________________________XXXXX
Data delay found: 17
10:15:37:setup_element:INFO: Eye window for uplink 8 : ___________________________XXXXXX_______
Data delay found: 9
10:15:37:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXXX_____
Data delay found: 12
10:15:37:setup_element:INFO: Eye window for uplink 10: _______________________________XXXXX____
Data delay found: 13
10:15:37:setup_element:INFO: Eye window for uplink 11: ________________________________XXXXX___
Data delay found: 14
10:15:37:setup_element:INFO: Eye window for uplink 12: _________________________________XXXX___
Data delay found: 14
10:15:37:setup_element:INFO: Eye window for uplink 13: _________________________________XXXXX__
Data delay found: 15
10:15:37:setup_element:INFO: Eye window for uplink 14: ______________________________XXXX______
Data delay found: 11
10:15:37:setup_element:INFO: Eye window for uplink 15: ______________________________XXXXX_____
Data delay found: 12
10:15:37:setup_element:INFO: Setting the data phase to 33 for uplink 1
10:15:37:setup_element:INFO: Setting the data phase to 29 for uplink 2
10:15:37:setup_element:INFO: Setting the data phase to 28 for uplink 3
10:15:37:setup_element:INFO: Setting the data phase to 25 for uplink 4
10:15:37:setup_element:INFO: Setting the data phase to 25 for uplink 5
10:15:37:setup_element:INFO: Setting the data phase to 19 for uplink 6
10:15:37:setup_element:INFO: Setting the data phase to 17 for uplink 7
10:15:37:setup_element:INFO: Setting the data phase to 9 for uplink 8
10:15:37:setup_element:INFO: Setting the data phase to 12 for uplink 9
10:15:37:setup_element:INFO: Setting the data phase to 13 for uplink 10
10:15:37:setup_element:INFO: Setting the data phase to 14 for uplink 11
10:15:37:setup_element:INFO: Setting the data phase to 14 for uplink 12
10:15:37:setup_element:INFO: Setting the data phase to 15 for uplink 13
10:15:37:setup_element:INFO: Setting the data phase to 11 for uplink 14
10:15:37:setup_element:INFO: Setting the data phase to 12 for uplink 15
10:15:37:setup_element:INFO: Beginning SMX ASICs map scan
10:15:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:15:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:15:37:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:15:37:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:15:37:uplink:INFO: Setting uplinks mask [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
10:15:37:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
10:15:37:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
10:15:37:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
10:15:37:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
10:15:38:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
10:15:38:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
10:15:38:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
10:15:38:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
10:15:38:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
10:15:38:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
10:15:38:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
10:15:38:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
10:15:38:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
10:15:38:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
10:15:38:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
10:15:40:setup_element:INFO: Performing Elink synchronization
10:15:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:15:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
10:15:40:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
10:15:40:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
10:15:40:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
10:15:40:uplink:INFO: Enabling uplinks [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 1 | [(0, 1)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
10:15:41:febtest:INFO: Init all SMX (CSA): 30
10:15:56:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:15:56:febtest:INFO: 01-00 | XA-000-09-004-017-004-009-05 | 40.9 | 1147.8
10:15:56:febtest:INFO: 08-01 | XA-000-09-004-017-010-008-12 | 44.1 | 1147.8
10:15:56:febtest:INFO: 03-02 | XA-000-09-004-017-007-009-11 | 47.3 | 1130.0
10:15:56:febtest:INFO: 10-03 | XA-000-09-004-017-013-008-04 | 44.1 | 1147.8
10:15:57:febtest:INFO: 05-04 | XA-000-09-004-017-010-009-12 | 56.8 | 1094.2
10:15:57:febtest:INFO: 12-05 | XA-000-09-004-017-016-008-15 | 31.4 | 1183.3
10:15:57:febtest:INFO: 07-06 | XA-000-09-004-017-013-009-04 | 37.7 | 1171.5
10:15:57:febtest:INFO: 14-07 | XA-000-09-004-017-016-009-15 | 31.4 | 1183.3
10:15:58:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
10:16:00:ST3_smx:INFO: chip: 1-0 40.898880 C 1165.571835 mV
10:16:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:16:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:16:00:ST3_smx:INFO: Electrons
10:16:00:ST3_smx:INFO: # loops 0
10:16:02:ST3_smx:INFO: # loops 1
10:16:04:ST3_smx:INFO: # loops 2
10:16:06:ST3_smx:INFO: Total # of broken channels: 0
10:16:06:ST3_smx:INFO: List of broken channels: []
10:16:06:ST3_smx:INFO: Total # of broken channels: 0
10:16:06:ST3_smx:INFO: List of broken channels: []
10:16:07:ST3_smx:INFO: chip: 8-1 44.073563 C 1159.654860 mV
10:16:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:16:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:16:07:ST3_smx:INFO: Electrons
10:16:07:ST3_smx:INFO: # loops 0
10:16:09:ST3_smx:INFO: # loops 1
10:16:11:ST3_smx:INFO: # loops 2
10:16:13:ST3_smx:INFO: Total # of broken channels: 0
10:16:13:ST3_smx:INFO: List of broken channels: []
10:16:13:ST3_smx:INFO: Total # of broken channels: 0
10:16:13:ST3_smx:INFO: List of broken channels: []
10:16:14:ST3_smx:INFO: chip: 3-2 47.250730 C 1141.874115 mV
10:16:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:16:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:16:14:ST3_smx:INFO: Electrons
10:16:14:ST3_smx:INFO: # loops 0
10:16:16:ST3_smx:INFO: # loops 1
10:16:17:ST3_smx:INFO: # loops 2
10:16:19:ST3_smx:INFO: Total # of broken channels: 0
10:16:19:ST3_smx:INFO: List of broken channels: []
10:16:19:ST3_smx:INFO: Total # of broken channels: 0
10:16:19:ST3_smx:INFO: List of broken channels: []
10:16:21:ST3_smx:INFO: chip: 10-3 44.073563 C 1165.571835 mV
10:16:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:16:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:16:21:ST3_smx:INFO: Electrons
10:16:21:ST3_smx:INFO: # loops 0
10:16:22:ST3_smx:INFO: # loops 1
10:16:24:ST3_smx:INFO: # loops 2
10:16:26:ST3_smx:INFO: Total # of broken channels: 0
10:16:26:ST3_smx:INFO: List of broken channels: []
10:16:26:ST3_smx:INFO: Total # of broken channels: 0
10:16:26:ST3_smx:INFO: List of broken channels: []
10:16:27:ST3_smx:INFO: chip: 5-4 56.797143 C 1112.140140 mV
10:16:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:16:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:16:27:ST3_smx:INFO: Electrons
10:16:27:ST3_smx:INFO: # loops 0
10:16:29:ST3_smx:INFO: # loops 1
10:16:31:ST3_smx:INFO: # loops 2
10:16:32:ST3_smx:INFO: Total # of broken channels: 0
10:16:32:ST3_smx:INFO: List of broken channels: []
10:16:32:ST3_smx:INFO: Total # of broken channels: 0
10:16:32:ST3_smx:INFO: List of broken channels: []
10:16:34:ST3_smx:INFO: chip: 12-5 34.556970 C 1200.969315 mV
10:16:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:16:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:16:34:ST3_smx:INFO: Electrons
10:16:34:ST3_smx:INFO: # loops 0
10:16:36:ST3_smx:INFO: # loops 1
10:16:38:ST3_smx:INFO: # loops 2
10:16:40:ST3_smx:INFO: Total # of broken channels: 0
10:16:40:ST3_smx:INFO: List of broken channels: []
10:16:40:ST3_smx:INFO: Total # of broken channels: 0
10:16:40:ST3_smx:INFO: List of broken channels: []
10:16:42:ST3_smx:INFO: chip: 7-6 37.726682 C 1183.292940 mV
10:16:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:16:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:16:42:ST3_smx:INFO: Electrons
10:16:42:ST3_smx:INFO: # loops 0
10:16:43:ST3_smx:INFO: # loops 1
10:16:45:ST3_smx:INFO: # loops 2
10:16:47:ST3_smx:INFO: Total # of broken channels: 0
10:16:47:ST3_smx:INFO: List of broken channels: []
10:16:47:ST3_smx:INFO: Total # of broken channels: 0
10:16:47:ST3_smx:INFO: List of broken channels: []
10:16:48:ST3_smx:INFO: chip: 14-7 34.556970 C 1195.082160 mV
10:16:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:16:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:16:48:ST3_smx:INFO: Electrons
10:16:48:ST3_smx:INFO: # loops 0
10:16:50:ST3_smx:INFO: # loops 1
10:16:53:ST3_smx:INFO: # loops 2
10:16:54:ST3_smx:INFO: Total # of broken channels: 0
10:16:54:ST3_smx:INFO: List of broken channels: []
10:16:54:ST3_smx:INFO: Total # of broken channels: 0
10:16:54:ST3_smx:INFO: List of broken channels: []
10:16:55:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:16:55:febtest:INFO: 01-00 | XA-000-09-004-017-004-009-05 | 44.1 | 1189.2
10:16:55:febtest:INFO: 08-01 | XA-000-09-004-017-010-008-12 | 44.1 | 1189.2
10:16:55:febtest:INFO: 03-02 | XA-000-09-004-017-007-009-11 | 50.4 | 1165.6
10:16:55:febtest:INFO: 10-03 | XA-000-09-004-017-013-008-04 | 47.3 | 1183.3
10:16:56:febtest:INFO: 05-04 | XA-000-09-004-017-010-009-12 | 56.8 | 1130.0
10:16:56:febtest:INFO: 12-05 | XA-000-09-004-017-016-008-15 | 34.6 | 1230.3
10:16:56:febtest:INFO: 07-06 | XA-000-09-004-017-013-009-04 | 40.9 | 1206.9
10:16:56:febtest:INFO: 14-07 | XA-000-09-004-017-016-009-15 | 37.7 | 1218.6
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_02_11-10_15_29
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
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| FEB_SN : 3346| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.5330', '1.850', '2.6890', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0180', '1.850', '2.3260', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9960', '1.850', '0.5319', '0.000', '0.0000', '0.000', '0.0000']